DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-7 are pending in this application.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statements (IDS) were submitted on 05/06/24, 12/20/24, and 02/06/25. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Drawings
The drawings were received on 03/16/26. The amendments are sufficient to overcome the objections from the previous office action. Accordingly the objections are withdrawn.
Response to Arguments
Applicant's arguments filed 03/16/26 have been fully considered but they are not persuasive. On page 6 of Remarks, applicant argues that Ryu combined with Orr do not teach the limitations of claim 1.
Ryu, as the primary reference and believed to be the closest prior art of reference, discloses a PFC converter 120, LLC converter 130, “auxiliary converter” 140, and secondary control unit 135. For the auxiliary conversion circuit of claim 1, the auxiliary circuit must be connected to the PFC converter and convert a first voltage into an auxiliary voltage for detection by the voltage tracking circuit. As outlined in the first office action, Ryu does disclose those features. Examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. In this case, Examiner utilizes Orr in combination with Ryu. Orr’s secondary side of transformer 39 and associated components would be obvious to combine with the primary side of Ryu’s transformer in converter 140 with the connection established to receive the output of the PFC converter and the provide an “auxiliary voltage”. Continuing with Orr fig. 1, examiner utilizes isolating V-I converter 52 to detect the “auxiliary voltage” input as in the instant application “voltage tracking circuit”. The isolating V-I converter 52 receives an input from the voltage at the junction between the resistors 45 and 46 representing the voltage at the DC output 43 and produces at its output an error current Fdbk. Par [0059] “input Fdbk of the control unit 14 for feedback control of the frequency of the LLC converter 11… feedback error current is proportional to a difference between the voltage at the junction between the resistors 45 and 46, supplied to the converter 52 and representing the voltage at the DC output 43, and a reference voltage (not shown), and can be produced in a frequency compensated manner…”. Orr references the frequency compensated manner to FIG. 1 of Application Note AN2321. PFC/LLC control unit 14 is further detailed in fig. 2. From fig. 2 you can see the inputs to the LLC control unit 61, which are OVL, Fdbk, Vfb, and Fmax. Par [0069] “The LLC control unit 61 is further supplied via the input OvL with the voltage dropped across the resistor 33 and representing input current of the LLC converter 11, and compares this with at least one threshold”, specifically from par [0052] a “voltage proportional to input current of the LLC converter 11”. According to par [0050] Vfb is “a voltage proportional to the output voltage Vp of the PFC converter 10”. Par [0059], Fmax represents “current which determines a desired maximum switching frequency of the LLC converter 11”. Continuing par [0059] “resistor 51 … supplies a current which determines a desired minimum switching frequency of the LLC converter 11”. LLC control unit utilizes the inputs above to produce (par [0066]) “produce a controlled frequency square waveform clock signal Lclk which is supplied to the LLC output stage 65, and also to the edge control unit 62. The LLC control unit 61 also produces a sawtooth or ramp signal Lrmp which is supplied to the edge control unit 62”. Par [0070] “edge control unit 62 compares the duty cycle signal Pmul with the LLC ramp signal Lrmp to produce a PFC PWM signal Ppwm with the desired duty cycle, this signal being supplied to the PFC output stage 64. The signal Ppwm is harmonically related to the LLC clock signal Lclk”. Harmonically related can be in phase, inverted (reverse waveform), same or multiple frequency. Par [0090] “An opposite (180.degree. different) phase relationship between the switching of the PFC and LLC converters 10 and 11 could alternatively be used, but is less advantageous because of relatively larger ripple of the PFC output voltage Vp.”. Par [0091] further explains compensation utilizing positive and negative ramps during the opposite phases of the LLC clock signal Lclk. Par [0092] “any other desired harmonic relationship can be provided between the switching frequencies of the converters 10 and 11”.
Given the inputs to the controller unit from both input and output of the LLC converter as well as the input and output of the PFC converter, the controller is able to minimize or suppress voltage ripple.
For the reasons above, examiner does believe that all limitations of claim 1 are taught in combination of Ryu and Orr.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Ryu et al. (US 20160079872 A1), hereinafter Ryu and further in view of Orr et al. (US 20090091957 A1).
Regarding claim 1, Ryu discloses a power supply apparatus (fig 1, power converter 100), comprising: a power factor correction circuit (fig 1, PFC power factor correction 120) configured to convert a DC link voltage into a first voltage (par [0039] “PFC (power factor correction) 120 can receive input DC”); an LLC converter (fig 1, converter unit 130) comprising a primary side circuit (fig 1, input to converter 130) and a secondary side circuit (fig1, output to converter 130), which are coupled with each other (fig 1, 120 and 130 are shown coupled), wherein the primary side circuit is electrically connected with the power factor correction circuit to receive the first voltage (fig 1, PFC 120 output is input to converter 130), the first voltage is converted into a second voltage by the LLC converter (fig 1, output of LLC 130), and the second voltage is outputted from the secondary side circuit (fig 1, output from rectifier side of LLC 130); an auxiliary conversion circuit (fig 1, converter 140) electrically connected with the power factor correction circuit (fig 1, shown electrically connected at node between 120 and input of 130) and configured to convert the first voltage into an auxiliary voltage (fig 1, receives “first voltage” from 120 and outputs an “auxiliary voltage” or a converted voltage); a secondary side controller (fig 1, second control unit 135) and configured to control operations of the LLC converter (fig 1, see input from 135 to 130.
Ryu does not disclose the secondary side controller disposed on a secondary side of the LLC converter, and a voltage tracking circuit electrically connected to the auxiliary conversion circuit and configured to detect the auxiliary voltage and issue a detection signal to the secondary side controller according to a result of detecting the auxiliary voltage, wherein according to the detection signal, the secondary side controller tracks a ripple change of the DC link voltage and instantly generates a reverse waveform opposite to a waveform of the DC link voltage, wherein the secondary side controller controls the operations of the LLC converter according to the reverse waveform, so that secondary side voltage ripples of the DC link voltage are suppressed.
Orr discloses power conversion system with power factor correction (PFC) circuit and an inductor-inductor-capacitor (LLC) converter architecture and control unit that controls independently the PFC and LLC converters. Par [0098] “not shown, which may be provided in addition to the PFC and LLC converters, for example to one or more flyback or other PWM converters that may be desired for providing additional supply voltages such as may be desired for standby and/or operating power for equipment powered by the power supply arrangement.” This statement suggests that the inventor Orr intended for at least an additional converter as claimed in the instant application “auxiliary converter”. Orr discloses the secondary side controller (fig 1 and fig 2, PFC & LLC control unit 14 further detailed in fig 2 as separate control units PFC control unit 60 and LLC control unit 61) disposed on a secondary side of the LLC converter (fig 2, LLC control unit 61 is connected to LLC output stage 65) configured to control operations of the LLC converter, and a voltage tracking circuit (fig 1, Isolating V-I converter 52) electrically connected to the auxiliary conversion circuit (fig 1, circuit including components 39, 42, 44, 45, and 46) and configured to detect the auxiliary voltage (fig 1, output of circuit including components 39, 42, 44, 45, and 46 is the input to converter 52; par [0059] “This feedback error current is proportional to a difference between the voltage at the junction between the resistors 45 and 46, supplied to the converter 52 and representing the voltage at the DC output 43, and a reference voltage (not shown), and can be produced in a frequency compensated manner”) and issue a detection signal (fig 1, input Fdbk to the control unit “Fdbk”) to the secondary side controller (fig 1, LLC controller 14) according to a result of detecting the auxiliary voltage (par [0059] “An electrically isolating voltage-to-current (V-I) converter 52 produces at its output an error current which is supplied via a series resistor 53 and a diode 54 to the input Fdbk of the control unit 14 for feedback control of the frequency of the LLC converter 11”), wherein according to the detection signal, the secondary side controller tracks a ripple change of the DC link voltage and instantly generates a reverse waveform opposite to a waveform of the DC link voltage (par [0090] describes the function of the LLC control unit 61. The function described “reduces ripple voltage for the LLC converter 11. An opposite (180.degree. different) phase relationship between the switching of the PFC and LLC converters 10 and 11 could alternatively be used, but is less advantageous because of relatively larger ripple of the PFC output voltage Vp.; par [0091] and par [0092] describe alternative solutions as well for desired harmonic relationship), wherein the secondary side controller controls the operations of the LLC converter according to the reverse waveform, so that secondary side voltage ripples of the DC link voltage are suppressed (par [0090] “reduces ripple voltage for the LLC converter 11” ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Ryu and incorporate a controller on the secondary side of the LLC converter, auxiliary converter and voltage tracking circuit as taught by Orr. The advantage of this design is to generate waveforms needed to suppress harmonics and efficiently control the LLC providing a specialized control of each stage.
Regarding claim 7, Ryu and Orr disclose the power supply apparatus according to claim 1, further comprising an auxiliary controller (Orr fig 2, edge control unit 62), which is electrically connected with the auxiliary conversion circuit for controlling the auxiliary conversion circuit (Orr fig 1 and fig 2, PFC & LLC Control Unit 14 of fig 1 (further detailed in fig 2) is electrically connected with “aux” circuit including components 39, 42, 44, 45, and 46; fig 2, edge control unit 2 receives signals from PFC and LLC control units to control the inputs to the components 39, 42, 44, 45, and 46).
Allowable Subject Matter
Claims 2-6 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 2, Ryu and Orr disclose the power supply apparatus according to claim 1, wherein the auxiliary conversion circuit comprises a transformer (Orr fig 1, transformer 38) and the transformer comprises a primary winding (Orr fig 1, left side of transformer 38) a first secondary winding (Orr fig 1, e.g. secondary windings 39, 40, 41) and a second secondary winding (Orr fig 1, e.g. secondary windings 39, 40, 41), wherein a first terminal and a second terminal of the primary winding are electrically connected with the power factor correction circuit (Orr fig 1, see electrical connection from output of PFC 10 to primary windings of transformer 38), a first terminal of the first secondary winding is electrically connected with a ground terminal (Orr fig 1, par [0057] “The secondary winding 41, to which no connections are shown in FIG. 1, is representative of any number of other secondary windings of the transformer 38 which may be used to provide other desired AC and/or DC outputs at high or low voltages, as may be desired.”; Orr’s description of no connection implies many possible connections are possible but not shown, a connection to ground would not be unreasonable).
Ryu and Orr do not disclose the primary winding is reversely coupled with the first secondary winding and the second secondary winding, a first terminal of the first secondary winding is electrically connected with a ground terminal, a second terminal of the first secondary winding is electrically connected with the voltage tracking circuit, and the auxiliary voltage is outputted from the second terminal of the first secondary winding.
Ye (US 20110216560 A1) discloses two stage isolated switch-mode AC/DC power converters with transformer. Ye discloses the primary winding is reversely coupled with the first secondary winding and the second secondary winding (fig 2, see primary side of transformer and secondary side with reverse dots depicting reverse coupling), a first terminal of the first secondary winding is electrically connected with a ground terminal (fig 2, see secondary side Ns2 connected to ground).
Ryu, Orr and Ye have been found to be the closest prior art.
However, none of the prior art, taken singly or in combination, teach “a second terminal of the first secondary winding is electrically connected with the voltage tracking circuit, and the auxiliary voltage is outputted from the second terminal of the first secondary winding”.
Regarding claims 3-6, they are allowable for their dependency on allowed claim 2.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Lauren A Shaw whose telephone number is (571)272-3074. The examiner can normally be reached Mon-Fri 7-5 EST.
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/LAUREN ASHLEY SHAW/Examiner, Art Unit 2838
/THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838