Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This office action is in response to the application filed on 05/07/2024.
Drawing Objection
The drawings filed on 05/07/2024 are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in claims 1 and 5. Therefore, the "input and output terminals” need to be referenced/labeled by a numerical or alphabetical character on figure 1.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered, and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/15/2024 is in compliance with the provisions of 37 C.F.R. § 1.97. Accordingly, the IDS has been considered by the examiner.
Claims 1-8 are pending and have been examined.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness
rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-8 are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al.
(EP 4239872 A1), hereinafter, Chen in view of Giuliano et al. (US 2020/0295587 A1).
In re to claim 1, Chen disclose an electrical circuit (i.e. fig. 6, see p. [0081]) comprising: an input terminal configured to receive a power signal as input (i.e. the input from 40, see p. [0082]); a rectifier bridge (i.e. 201) configured to receive the power signal from the input terminal (i.e. input from the AC source 40); a resistive load (i.e. Rp1) connected between the input terminal and the rectifier bridge (i.e. see fig. 6 and p. [0101]), the resistive load (i.e. Rp1) configured to control the current of the power signal to the rectifier bridge (i.e. 201, see p. [0101])). Except, Chen fail to explicitly disclose that a current limiter circuit configured to receive a constant current from the rectifier bridge; and an output terminal configured to provide an output power signal based on the constant current flowing through the current limiter circuit.
Whereas Edwards teaches that a current limiter circuit (i.e. 106, fig. 4, see col. 3, line 65 to col. 4, line 20) configured to receive a constant current from the rectifier bridge; and an output terminal configured to provide an output power signal based on the constant current flowing through the current limiter circuit (i.e. see col. 4, lines 3-34). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to integrate the current limiter circuit of Edwards to Chen’s electrical circuit to help maintain and control the output current to the load circuit; thereby providing an over-current protection to the load.
In re to claim 2, Chen discloses the electrical circuit (i.e. fig. 6, see p. [0081]) of claim 1. Except, Chen fail to explicitly disclose that wherein the rectifier bridge is configured to support at least twice a desired operating current value and twice a maximum input peak voltage. However, Chen discloses the claimed invention except for the desired operating current value and the maximum input peak voltage. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to implement the appropriate or desired operating current value and the maximum input peak voltage, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
In re to claim 3, Chen disclose the electrical circuit (i.e. fig. 6, see p. [0081]) of claim 1. Except, Chen fail to explicitly disclose that wherein the current limiter circuit comprises: a metal-oxide-semiconductor-field-effect transistor (MOSFET), the MOSFET configured as a constant current source for the current limiter circuit; a bipolar junction transistor (BJT), the BJT configured as a cut-off switch to adjust the MOSFET as a constant current driver for the current limiter circuit; a first resistor, the first resistor configured as a bias resistor for the MOSFET and BJT; a second resistor, the second resistor configured as a current resistor; and an enable transistor. Whereas Edwards teaches that wherein the current limiter circuit (i.e. 106, fig. 4, see col. 3, line 65 to col. 4, line 20) comprises: a metal-oxide-semiconductor-field-effect transistor (MOSFET) (i.e. 108), the MOSFET configured as a constant current source for the current limiter circuit (i.e. see col. 3, line 65 to col. 4, line 20); a bipolar junction transistor (BJT) (i.e. 109), the BJT configured as a cut-off switch to adjust the MOSFET as a constant current driver for the current limiter circuit (i.e. see col. 4, lines 6-14); a first resistor (i.e. 110), the first resistor configured as a bias resistor for the MOSFET and BJT (i.e. 110 control the current signal to the gate of Mosfet-108 and collector of BJT-109, see fig. 4); a second resistor (i.e. 113), the second resistor configured as a current resistor; and an enable transistor (i.e. see col. 4, lines 6-14). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to integrate the current limiter circuit of Edwards to Chen’s electrical circuit to help maintain and control the output current to the load circuit; thereby providing an over-current protection to the load.
In re to claim 4, Chen disclose the electrical circuit (i.e. fig. 6, see p. [0081]) of claim 3. Except, Chen fail to explicitly disclose that wherein the MOSFET, BJT and enable transistor are each configured to support at least twice a desired operating current value and twice a maximum input peak voltage. However, Chen discloses the claimed invention except for the desired operating current value and the maximum input peak voltage. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to implement the appropriate or desired operating current value and the maximum input peak voltage, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
In re to claim 5, Chen disclose an electrical apparatus (i.e. fig. 6, see p. [0081]) comprising: an input terminal configured to receive a power signal as input (i.e. the input from 40, see p. [0082]); a rectifier bridge (i.e. 201) configured to receive the power signal from the input terminal (i.e. input from the AC source 40); a resistive load (i.e. Rp1) connected between the input terminal and the rectifier bridge (i.e. see fig. 6 and p. [0101]), the resistive load (i.e. Rp1) configured to control the current of the power signal to the rectifier bridge (i.e. 201, see p. [0101])). Except, Chen fail to explicitly disclose that a current limiter circuit configured to receive a constant current from the rectifier bridge; and an output terminal configured to provide an output power signal based on the constant current flowing through the current limiter circuit.
Whereas Edwards teaches that a current limiter circuit (i.e. 106, fig. 4, see col. 3, line 65 to col. 4, line 20) configured to receive a constant current from the rectifier bridge; and an output terminal configured to provide an output power signal based on the constant current flowing through the current limiter circuit (i.e. see col. 4, lines 3-34). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to integrate the current limiter circuit of Edwards to Chen’s electrical circuit to help maintain and control the output current to the load circuit; thereby providing an over-current protection to the load.
In re to claim 6, Chen disclose the electrical apparatus (i.e. fig. 6, see p. [0081]) of claim 5. Except, Chen fail to explicitly disclose that wherein the rectifier bridge is configured to support at least twice a desired operating current value and twice a maximum input peak voltage. However, Chen discloses the claimed invention except for the desired operating current value and the maximum input peak voltage. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to implement the appropriate or desired operating current value and the maximum input peak voltage, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
In re to claim 7, Chen disclose the electrical apparatus (i.e. fig. 6, see p. [0081]) of claim 5. Except, Chen fail to explicitly disclose that wherein the current limiter circuit comprises: a metal-oxide-semiconductor-field-effect transistor (MOSFET), the MOSFET configured as a constant current source for the current limiter circuit; a bipolar junction transistor (BJT), the BJT configured as a cut-off switch to adjust the MOSFET as a constant current driver for the current limiter circuit; a first resistor, the first resistor configured as a bias resistor for the MOSFET and BJT; a second resistor, the second resistor configured as a current resistor; and an enable transistor. Whereas Edwards teaches that wherein the current limiter circuit (i.e. 106, fig. 4, see col. 3, line 65 to col. 4, line 20) comprises: a metal-oxide-semiconductor-field-effect transistor (MOSFET) (i.e. 108), the MOSFET configured as a constant current source for the current limiter circuit (i.e. see col. 3, line 65 to col. 4, line 20); a bipolar junction transistor (BJT) (i.e. 109), the BJT configured as a cut-off switch to adjust the MOSFET as a constant current driver for the current limiter circuit (i.e. see col. 4, lines 6-14); a first resistor (i.e. 110), the first resistor configured as a bias resistor for the MOSFET and BJT (i.e. 110 control the current signal to the gate of Mosfet-108 and collector of BJT-109, see fig. 4); a second resistor (i.e. 113), the second resistor configured as a current resistor; and an enable transistor (i.e. see col. 4, lines 6-14). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to integrate the current limiter circuit of Edwards to Chen’s electrical circuit to help maintain and control the output current to the load circuit; thereby providing an over-current protection to the load.
In re to claim 8, Chen disclose the electrical apparatus (i.e. fig. 6, see p. [0081]) of claim 7. Except, Chen fail to explicitly disclose that wherein the MOSFET, BJT and enable transistor are each configured to support at least twice a desired operating current value and twice a maximum input peak voltage. However, Chen discloses the claimed invention except for the desired operating current value and the maximum input peak voltage. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to implement the appropriate or desired operating current value and the maximum input peak voltage, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Remarks
The examiner has cited columns, line numbers, paragraph numbers, references, or
figures in the references applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses to fully consider the reference in entirety, as potentially teaching all or part of the claimed invention. See MPEP § 2141.02 and § 2123.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YEMANE MEHARI whose telephone number is (571)270-7603. The examiner can normally be reached M-F 9AM TO 6 PM.
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/YEMANE MEHARI/Primary Examiner, Art Unit 2838