Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to application No. 18/657,229 filed on August 18, 2026.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), No papers have been placed of record in the file.
Information Disclosure Statement
4. Acknowledgement is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS have been considered.
Specification
5. The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: “Vertical Memory Device Comprising Wavy-Shaped Word Line Cut in a Plan View .
Election/Restrictions
6. Applicant’s election with traverse of device claims 1-8, 10-11, 13-20, Species I (Figs. 1A-1C), in the reply filed on 08/18/2026 is acknowledged.
7. Claims 9, 12 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to nonelected species claims, there being no allowable generic or linking claim.
8. Applicant timely traversed the restriction (election) requirement in the reply filed on 08/18/2026 with remarks in pages 1-2, and were found persuasive, therefore, the restriction requirement posted on 07/16/2026 has been withdrawn.
Claim Rejections - 35 USC § 102
9. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
10. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
11. Claims 1-2, 6 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Sim et al. (US 2023/0262980 A1).
Regarding independent claim 1, Sim et al. teaches a vertical memory device comprising (Figs. 5-6, para [0050-0051]):
a substrate (10, Fig. 6);
a plurality of electrode structures (VS1, Fig. 5) extending in a vertical direction (D3) on the substrate (10);
a word line cut (SP called separation structure, see Fig. 5) disposed apart from the plurality of electrode structures (VS1) in a horizontal direction (D1) and extending in the vertical direction (D3); and
a gate stack structure (ST: ST1/ST2, para [0064]) comprising gate electrodes (Ela/ELb) and interlayer insulating layers (ILDa/ILDb) alternately stacked on the substrate (10) along a sidewall of each of the plurality of electrode structures (VS1) and the word line cut (SP), wherein the gate electrodes (Ela/ELb) are electrically connected to the plurality of electrode structures (VS1),
wherein, in a plan view (see Fig. 5, para [0075]), the word line cut (SP) is wavy-shaped (see Fig. 5).
Regarding claim 2, Sim et al. teaches wherein (Figs. 5-6), the plurality of electrode structures (VS1) constitutes a plurality of lines in a first horizontal direction (D1), and the word line cut (SP) extends in a second horizontal direction (D2) perpendicular to the first horizontal direction.
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Regarding claim 6, Sim et al. teaches wherein (Figs. 5-6), in the plan view (see Fig. 5), the plurality of electrode structures (VS1) are disposed in a hexagonal array (see the annotated figure in claim 2).
Allowable Subject Matter
12. Claims 7-20 are allowed.
Claim 7: the prior art of record alone or in combination neither teaches nor makes obvious of a vertical memory device, comprising:
…. a plurality of partition pillars extending on the substrate in the vertical direction and contacting at least one of the plurality of electrode structures;
Claim 14: the prior art of record alone or in combination neither teaches nor makes obvious of a vertical memory device, comprising:
…. a plurality of partition pillars each extending on the substrate in the vertical direction and contacting at least one of the plurality of electrode structures;
13. Claims 3-5: the prior art of record alone or in combination neither teaches nor makes obvious the vertical memory device, comprising:
Claim 3 recites….
a plurality of partition pillars each disposed between the plurality of electrode structures, and passing through at least a portion of the gate stack structure in the vertical direction.
14. The prior arts made of record in PTO-892 and not relied upon are considered pertinent to applicant’s disclosure: the prior art, Sim et al. (US 2023/0262980 A1) is a close prior art, which describes a vertical memory device comprising electrode structures, word line cut (word line separator) spaced apart and separating the electrode structures, gate stack structures stacked on the sidewall of the electrode structures, and the word line cut is wavy-shaped in the plan view (Fig. 5), however, Sim et al. does not disclose the limitations stated in sections 12-13, therefore, either by itself or in combination with other arts fail to disclose the above stated limitations in the sections 13-14.
Examiner’s Note
15. Applicant is reminded that the Examiner is entitled to give the broadest reasonable interpretation to the language of the claims. Furthermore, the Examiner is not limited to Applicants' definition which is not specifically set forth in the claims. See MPEP 2111, 2123, 2125, 2141.02 VI, and 2182.
Examiner has cited particular paragraphs and/or columns/lines in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. See MPEP 2141.02 VI.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Conclusion
16. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DIDARUL MAZUMDER whose telephone number is (571)272-8823. The examiner can normally be reached M-F 9-5.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
17. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at 571-270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DIDARUL A MAZUMDER/Primary Examiner, Art Unit 2812
