Prosecution Insights
Last updated: April 19, 2026
Application No. 18/658,350

ANTENNA-ON-PACKAGE INTEGRATED CIRCUIT DEVICE

Final Rejection §103§112
Filed
May 08, 2024
Examiner
KIM, SEOKJIN
Art Unit
2844
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Texas Instruments Incorporated
OA Round
2 (Final)
77%
Grant Probability
Favorable
3-4
OA Rounds
2y 4m
To Grant
91%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allow Rate
418 granted / 540 resolved
+9.4% vs TC avg
Moderate +14% lift
Without
With
+14.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
31 currently pending
Career history
571
Total Applications
across all art units

Statute-Specific Performance

§101
2.0%
-38.0% vs TC avg
§103
46.2%
+6.2% vs TC avg
§102
30.0%
-10.0% vs TC avg
§112
15.6%
-24.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 540 resolved cases

Office Action

§103 §112
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Response to Remarks/Arguments With respect to the rejection of claim 1 under 35 USC 102, Applicant's arguments filed 10/30/2025 have been fully considered but are moot in view of new grounds of rejection set forth herein as necessitated by Applicant's amendments. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION — The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 1-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claim 1 recites the limitation “the ground plane” in line 10. There is insufficient antecedent basis for this limitation in the claim. Claims 2-10 are rejected due to their dependencies to claim 1 above. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-5 are rejected under 35 U.S.C. 103 as being unpatentable over Dogiamis (US 2018/0331051 A1) in view of Thai (US 2019/0348749 A1). Regarding claim 1, Dogiamis teaches an integrated circuit package (Figs. 1-3) comprising: a first substrate (Fig. 1, substrate 150) including a set of conductor layers including first, second, and third conductor layers (153-155), and a first dielectric layer disposed between the first and second conductor layers and a second dielectric layer disposed between the second and third conductor layers ([0018] dielectric layers 162); antennas disposed in the first conductor layer ([0021] antenna unit 152); a ground plane structure (Fig. 3A, GND plane 355 and the upper conductor layer connected to GND 355, corresponding to 154 in Fig. 1) disposed in the second and third conductor layers (355 and the upper conductor layer), the ground plane structure including a first ground plane, a second ground plane, and a first set of vias (355, 154 and the via in between) a first set of package connectors (Fig. 1, 114, 142); a second substrate (Fig. 1, substrate 120) having a first side coupled to the first substrate via the first set of package connectors; an integrated circuit die (Fig. 1, 110, Fig. 3A, die 310) disposed between the first and second substrates, the integrated circuit die having a side that is coupled to the set of conductor layers ([0029] vias 325-328); and a second set of package connectors coupled to a second side of the second substrate (Fig. 1, solder balls under the substrate 120). However, Dogiamis does not explicitly teach the integrated circuit package comprising: the first set of vias arranged to define openings below the first conductor layer; and a second set of vias coupled between the antennas and a ground plane. Thai teaches an integrated circuit package comprising: a first set of vias (Fig. 17A, [0061] shield posts 134) arranged to define openings (the opening within 141, 139, 114 in which 104 resides) below a first conductor layer (104); and a second set of vias (Figs. 18-19, feed structure 118) coupled between an antennas (104) and a ground plane (120). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of claimed invention to apply the Faraday cage structure of Thai to the teachings of Dogiamis in order to reduce surface waves that cause undesirable coupling and degrade the impedance bandwidth of the antenna and increase the reflection level during beamforming, improving performance (Thai, [0052]). Regarding claim 2, all the limitations of claim 1 are taught by Dogiamis in view of Thai. Thai further teaches the integrated circuit package, wherein the antennas are respectively disposed in the openings (Fig. 17A, 104). Regarding claim 3, all the limitations of claim 1 are taught by Dogiamis in view of Thai. Thai further teaches the integrated circuit package, wherein the set of conductor layers further includes a fourth conductor layer, and the first substrate further includes a third dielectric layer disposed between the third and fourth conductor layers (Figs. 18-19). Regarding claim 4, all the limitations of claim 2 are taught by Dogiamis in view of Thai. Thai further teaches the integrated circuit package, wherein the first set of vias are configured to form a cavity within the at least the second dielectric layer (Fig. 17, 124). Regarding claim 5, all the limitations of claim 1 are taught by Dogiamis in view of Thai. Dogiamis further teaches the integrated circuit package, wherein the antennas include transmitter antennas and receiver antennas ([0025]). Claims 6 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Dogiamis (US 2018/0331051 A1) in view of Thai (US 2019/0348749 A1) as applied to claim 5 above, and further in view of Sato (US 2018/0226727 A1). Regarding claim 6, all the limitations of claim 5 are taught by Dogiamis in view of Thai. Dogiamis in view of Thai does not explicitly teach the package wherein of the transmitter antennas, a first transmitter antenna is offset from a second transmitter antenna in a first direction and is offset from a third transmitter antenna in a second direction perpendicular to the first direction. Sato teaches an integrated circuit package, wherein a first transmitter antenna of the transmitter antennas is offset from a second transmitter antenna of the transmitter antennas in a first direction (Fig. 2, 4a and 4b, [0043] transmitting antennas 4a to 4d) and is offset from a third transmitter antenna of the transmitter antennas in a second direction perpendicular to the first direction (Fig. 2, 4a and 4d). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of claimed invention to apply the antenna layout of Sato to the teachings of Dogiamis in view of Thai in order to take advantages of the highly accurate controllability of a beam radiation direction of MIMO radar method for automotive applications (Sato, [0002], [0052]). Regarding claim 7, all the limitations of claim 5 are taught by Dogiamis in view of Thai. Dogiamis in view of Thai does not explicitly teach the package wherein, of the receiver antennas, a first receiver antenna is offset from a second receiver antenna in a first direction and is offset from a third receiver antenna in a second direction perpendicular to the first direction. Sato teaches an integrated circuit package wherein a first receiver antenna of the receiver antennas is offset from a second receiver antenna of the receiver antennas in a first direction (Fig. 2, 5a and 5b, [0043] receiving antennas 5a to 5d), and is offset from a third receiver antenna of the receiver antennas in a second direction perpendicular to the first direction (Fig. 2, 5b and 5c). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of claimed invention to apply the antenna layout of Sato to the teachings of Dogiamis in view of Thai in order to take advantages of the highly accurate controllability of a beam radiation direction of MIMO radar method for automotive applications (Sato, [0002], [0052]). Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Dogiamis (US 2018/0331051 A1) in view of Thai (US 2019/0348749 A1) as applied to claim 5 above, and further in view of Nakamura (US 2018/0226727 A1). Regarding claim 8, all the limitations of claim 5 are taught by Dogiamis in view of Thai. Dogiamis in view of Thai does not explicitly teach the package wherein the set of conductor layers further includes an electromagnetic band gap structure, a portion of which is formed in the first conductor layer and disposed between at least one transmitter antenna of the transmitter antennas and the receiver antennas. Nakamura teaches an integrated circuit package wherein: the antenna comprising a transmitter antenna (Fig. 2(a), 2, [0022] 2 is a transmitting antenna) formed by a first conductor layer (Fig. 2(b), 2, 11, 3), a receiver antenna (Fig. 2(a), 3, [0022] 3 is a receiving antenna) formed by the first conductor layer (Fig. 2(b), 2, 11, 3); and an electromagnetic bandgap structure (Fig. 2, 10, [0022] isolation structure 10) is formed in part by the first, second and third conductor layers (Fig. 2, 10, Fig. 5, 20, [0031] another example of the isolation structure 20, a first to third conductor layers 21, 11, 4), a portion of the electromagnetic bandgap structure that is formed by the first conductor layer being disposed between the transmitter antenna and the receiver antenna (Fig. 2, 10, [0022] the isolation structure 10 is interposed between 2 and 3). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of claimed invention to integrate the electromagnetic bandgap structures of Nakamura with the antennas of Dogiamis in view of Thai in order to provide an antenna device with an isolation structure capable of effectively improving isolation (Nakamura [0002]). Claims 9 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Dogiamis (US 2018/0331051 A1) in view of Thai (US 2019/0348749 A1) and Nakamura (US 2018/0226727 A1), as applied to claim 8 above, and further in view of Lukyanov (US 2022/0131571 A1). Regarding claim 9, all the limitations of claim 8 are taught by Dogiamis in view of Thai and Nakamura. Dogiamis in view of Thai and Nakamura does not explicitly teach the package wherein the electromagnetic band gap structure includes a plurality of cells arranged in a two-dimensional grid. Lukyanov teaches a package wherein an electromagnetic band gap structure includes a plurality of cells arranged in a two-dimensional grid (Figs. 23A-23E, [0081] a two-dimensional period lattice). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of claimed invention to apply the two-dimensional EBG structure of Lukyanov to the teachings of Dogiamis in view of Thai and Nakamura in order to increase the versatility with the high efficiency in blocking the leakage of waves at desired frequencies from wireless channel to the external space ( Lukyanov, [0083]-[0086]). Regarding claim 10, all the limitations of claim 9 are taught by Dogiamis in view of Thai, Nakamura and Lukyanov. Lukyanov further teaches the package, wherein each cell of the plurality of cells includes: a first conductive portion of a first conductive layer of the set of conductive layers ([0098], Fig. 23B); a second conductive portion of a second conductive layer of the set of conductive layers, the second conductive portion coupled to the first conductive portion by a first via ([0098], Fig. 23B); and a third conductive portion of a third conductive layer of the set of conductive layers, the third conductive portion coupled to the second conductive portion by a second via ([0098], Fig. 23C). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SEOKJIN KIM whose telephone number is (571)272-1487. The examiner can normally be reached M-F: 8:30am-5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander H. Taningco can be reached at 571-272-8048. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SEOKJIN KIM/Primary Examiner, Art Unit 2844
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Prosecution Timeline

May 08, 2024
Application Filed
Jul 29, 2025
Non-Final Rejection — §103, §112
Oct 31, 2025
Response Filed
Feb 02, 2026
Final Rejection — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
77%
Grant Probability
91%
With Interview (+14.0%)
2y 4m
Median Time to Grant
Moderate
PTA Risk
Based on 540 resolved cases by this examiner. Grant probability derived from career allow rate.

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