Prosecution Insights
Last updated: May 29, 2026
Application No. 18/658,907

System and Method for Calibration and Modification of Game Controller and Peripherals

Non-Final OA §102§103
Filed
May 08, 2024
Priority
May 08, 2023 — provisional 63/464,669
Examiner
MCCLELLAN, JAMES S
Art Unit
3715
Tech Center
3700 — Mechanical Engineering & Manufacturing
Assignee
Hercule Engineering LLC
OA Round
1 (Non-Final)
79%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
658 granted / 832 resolved
+9.1% vs TC avg
Moderate +13% lift
Without
With
+12.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
35 currently pending
Career history
863
Total Applications
across all art units

Statute-Specific Performance

§101
5.8%
-34.2% vs TC avg
§103
68.2%
+28.2% vs TC avg
§102
20.6%
-19.4% vs TC avg
§112
2.3%
-37.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 832 resolved cases

Office Action

§102 §103
DETAILED ACTION Information Disclosure Statement Applicant’s submission of an Information Disclosure Statement on 7/17/2024 has been received and considered. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Patent Application Publication No. 2022/0379205 Corvi. With regard to claim 1, Corvi discloses a data processing unit (e.g., see Fig. 4A, including input processor system 407 and emulation processor system 409; see also paragraph 96 for discussion of input processor system 407 and emulation processor system 409), wherein the data processing unit is configured to: create input and output memory map files (e.g., see at least paragraph 215 that states, “Within the memory device 1316, a default mapping 1308 is stored”; it is noted that a long discussion about storing map data in paragraphs 215-315) monitor activity of a controller communicatively coupled to the data processing unit, wherein the activity of the controller comprises input data (e.g., see at least paragraphs 76 and 96 for discussion of user inputs, including user inputs 419; see also Fig. 4A for user input 419 from controller 414); determine a type of controller for the controller based on a first identification value associated with the controller (e.g., see at least paragraphs 292 to 297 that discusses “the use of different mappings with use of different types of hand-held controllers”); associate the controller with a second identification value, wherein the second identification value is associated with a first memory location in the input memory (e.g., see at least paragraph 296 for discussion of an “updated controller generates an identification signal having the type of the updated controller and sends the identification signal to the input processor system 407”); convert the input data of the controller to generic controller data (e.g., see at least paragraph 96 that discusses “the input processor 407 converts the user input 419 into a user input 420”); write the generic controller data to the first memory location in the input memory map based on the second identification value (e.g. see at least paragraph 212-220 that discusses converting user input and mapping it to memory device 1316); and continuously monitor the controller via a controller handler (e.g., see at least paragraph 314 that states the updates are made “during or before a play of a legacy game”, which indicates continuous monitoring, not just before the game starts since updating can also occur during the game); [claim 2] wherein the second identification value is derived from a standardized numerical range of second identification values and the first identification value is associated with an identification value provided by a manufacturer of the controller (e.g., see at least paragraph 296 for discussion of an “updated controller generates an identification signal having the type of the updated controller and sends the identification signal to the input processor system 407”); [claim 3] wherein the data processing unit executes commands via one or more processing threads (e.g., see at least paragraph 215 for discussion of input processor system 407 that includes default mappings and current mappings); and [claim 4] wherein each memory map file is partitioned into one or more memory blocks (e.g., see at least paragraph 212 for discussion of memory blocks). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Corvi in view of U.S. Patent No. 6,493,837 to Pang. With regard to claim 5, Corvi discloses the use of blocks, but fails to disclose the block has a size of at least 24 bytes. It is noted the Corvi discloses numerous blocks (e.g., see Fig. 4B, Basic Blocks 1, 2…n). In the same field of endeavor, Pang teaches memory blocks with a size of 24 bytes (e.g., see at least column 6, line 47, that states “expands the 24 byte block out to 32 bytes”). If you sum 4 or 5 blocks with 24 bytes or 32 bytes, the total exceeds 100 bytes. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the current invention to modify Corvi with at least 24 bytes blocks as taught by Pang in order to use a known technique to improve similar devices (methods, or products) in the same way. In this case, 64 bytes is a known standard and Pang discloses 24 (expanded to 32 bytes) as a matter of design choice especially when managing legacy architecture. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Corvi in view of U.S. Patent No. 6,640,268 to Kumar. With regard to claim 6, Corvi discloses modifying functions of a gaming controller based on a legacy conversion process, but fails to expressly disclose modifying a polling rate of the controller. In the same field of endeavor, Kumar teaches modifying a polling rate of the controller (e.g., see at least column 7, lines 44-46, that states “allows a stable change between polling rates”; see also the paragraph bridging columns 1 and 2 that states “the joystick will need to send data quite frequently to keep the host PC apprised of the position of the joystick and its buttons in order to accommodate the requirements of fast paced games”). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the current invention to modify Corvi with a modification of polling rates as taught by Kumar in order to use a known technique to improve similar devices (methods, or products) in the same way. In this case, modifying the polling rate is important for game controllers/joysticks in order to keep up with fast paced action games. Claims 7-20 are rejected under 35 U.S.C. 103 as being unpatentable over Corvi in view of U.S. Patent Application Publication No. 2014/0256257 to Thangella. With regard to claims 7 and 8, Corvi discloses modifying functions of a gaming controller, but fails to expressly disclose monitoring active and resting states of user input. Reasonably pertinent to problem faced, Thangella teaches monitoring input active and resting states in a gaming environment (e.g., see at least paragraphs 13 and 114 that discusses monitoring idle state 760 and active state 758 by user input data 328; see also the paragraph 29 that notes this disclosure is relevant to “a gaming system”). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the current invention to modify Corvi with active/resting state monitoring as taught by Thangella in order to use a known technique to improve similar devices (methods, or products) in the same way. In this case, monitoring active/resting states allows a system to preserve processing power and other computer resources by only acting during an active input state. With regard to claims 9, 12, and 14, the combination of Corvi and Thangella disclose a method as addressed above for claims 1, 2, 7, and 8, which are similar in claim scope. With regard to claims 10, 11, and 13, Corvi discloses what would be considered a corrective algorithm and a conversion algorithm (e.g., see at least paragraphs 138-140 that discuss parser/decoder 602). With regard to claims 15-17 and 20, the combination of Corvi and Thangella disclose a method as addressed above for claims 1-3, 7, and 8, which are similar in claim scope. It is noted that the Examiner equates a “waking signal” with an “active state” (see analysis of claims 7 and 8). With regard to claims 18 and 19, Corvi discloses what when input device conversion is necessary, which equates to flagging when converted output is needed (e.g., see at least paragraph 96 that discusses “the input processor 407 converts the user input 419 into a user input 420”). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. U.S. Patent Application Publication No. 2011/0136568 to Buhr discusses a game controller that converts button mapping data (e.g., see at least paragraph 33) U.S. Patent No. 12,472,426 to Banks discusses a game controller with device IDs that includes mapping/converting input data for gaming (e.g., see at least Fig. 9A) U.S. Patent Application Publication No. 2020/0298110 to Koziel discusses a universal game controller remapping device (e.g., see at least paragraph 124) U.S. Patent No. 8,214,539 to Kulanko discusses command mapping for gaming input devices (e.g., see at least Fig. 2) U.S. Patent Application Publication No. 2010/0075756 to Roberts discusses a secondary controller emulating a console controller (e.g., see at least Figs. 3 and 4) U.S. Patent No. 5,896,125 to Niedzwiecki discusses a configurable keyboard to personal computer video game controller adapter for use with various types of game controllers (e.g., see at least Fig. 2) Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMES S MCCLELLAN whose telephone number is (571)272-7167. The examiner can normally be reached Monday-Friday (8:30AM-5:00PM). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kang Hu can be reached at 571-270-1344. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /James S. McClellan/Primary Examiner, Art Unit 3715
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Prosecution Timeline

May 08, 2024
Application Filed
May 15, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
79%
Grant Probability
92%
With Interview (+12.9%)
2y 9m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 832 resolved cases by this examiner. Grant probability derived from career allowance rate.

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