Prosecution Insights
Last updated: April 19, 2026
Application No. 18/660,642

BURN-IN BOARD AND BURN-IN TEST METHOD USING THE SAME

Non-Final OA §103
Filed
May 10, 2024
Examiner
NGUYEN, VINH P
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
99%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
1169 granted / 1355 resolved
+18.3% vs TC avg
Strong +16% interview lift
Without
With
+16.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
23 currently pending
Career history
1378
Total Applications
across all art units

Statute-Specific Performance

§101
3.4%
-36.6% vs TC avg
§103
45.8%
+5.8% vs TC avg
§102
8.6%
-31.4% vs TC avg
§112
24.7%
-15.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1355 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the feature of “inner space” as recited in claim 1 and the feature of “an inlet side”? as recited in claim 2 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 1-2,4-7,10-14,16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Hwang et al (Pat# 6,723,964). As to claim 1, Hwang et al disclose a burn-in board as shown in figures 1-2, comprising: a substrate (B) having a first surface and a second surface opposite to each other; a thermal conductive heating plate (2) installed adjacent on a cooling plate (1), an electric heating plate (2), a thermal conductive mounting plate (3) with recesses (31) for receiving semiconductor devices under test and a wall (9) surrounding the heating plate (2), the cooling plate (1) and the thermal conductive mounting plate (3) with recesses (31) . It is noted that Hwang et al do not explicitly mention about socket configured to receive a semiconductor device on or at the first surface of the substrate (B) and a guide portion including an extension portion extending in a first direction and having an inner space on or at the first surface of the substrate. However, it would have been obvious for one of ordinary skill in the art to recognize that the combination of the heating plate (2), the cooling plate (1) and the thermal conductive mounting plate (3) is a socket because it is used to hold semiconductor devices under test with different temperature controls (heat or cool). Furthermore, it would have been obvious for one of ordinary skill in the art to recognize that the wall (9) is a guide portion since it includes an extension portion extending in a first direction and having an inner space on or at the first surface of the substrate (B). As to claim 2, Hwang et al disclose a burn-in board as mentioned in claim 1, wherein the guide portion or the extension portion (9) extends from an inlet side (an inside surface of the wall) to an opposite side opposite (an opposite surface of another inside surface of wall) to the inlet side, the inlet side configured to have air inflow during a burn-in test. As to claim 4, Hwang et al disclose a burn-in board as mentioned in claim 1, wherein the guide portion or the extension portion (9) extends from an inlet side (an inside surface of the wall) to an opposite side opposite (an opposite surface of another inside surface of wall) but do not explicitly mention about the guide portion (9) includes a groove having the inner space on or at the first surface of the substrate. However, it would have been obvious for one of ordinary skill in the art to recognize that a space surrounding the inside guide portion (9) is a groove for the purpose of provide additional cool air to the semiconductor under test. As claim 5, Hwang et al disclose a burn-in board as mentioned in claim 1 wherein the guide portion (9) includes a guide structure (wall structure) on the first surface of the substrate (B). In claim 6, Hwang et al disclose a burn-in board as mentioned in claim 1 but do not explicitly mention about a width of the inner space is greater than a depth of the inner space. However, it appears that the width of the inner space (inner perimeter space of the wall (9) is greater than a depth/height of the inner space. As to claim 7, Wang et al disclose a burn-in board as mentioned in claim 1 including a heating plate (2) on the first surface of the substrate and spaced apart from the first surface of the substrate. As to claim 10, Hwang et al disclose a burn-in board as mentioned in claim 1 including a temperature sensor (6a,7a,8a) on or in the substrate as shown in figure 1, wherein the temperature sensor is electrically connected to a wiring of the substrate. As to claim 11, Wang et al disclose a burn-in board as mentioned in claim 1 including a heating plate (2) on the first surface of the substrate and spaced apart from the first surface of the substrate, wherein the heating plate includes a plurality of heating portions corresponding to a plurality of areas of the substrate, respectively. `As to claim 12, Hwang et al disclose a burn-in board as mentioned in claim 1 including a temperature sensor (6,7a,8a) on or in the substrate, wherein the temperature sensor includes a plurality of temperature sensors (6a,7a,8a) corresponding to the plurality of areas of the substrate, respectively. As to claim 13, Wang et al disclose a burn-in board as mentioned in claim 1 but do not explicitly mention about the socket includes a socket connector, and the socket connector is at an edge of the socket parallel to the first direction. However, it would have been well known in the art to recognize that the socket would include a socket connector for the purpose of electrically contact conductive parts of the device under test during the test operation. As to claim 14, Hwang et al disclose a burn-in board as shown in figures 1-2, comprising: a substrate (B) having a first surface and a second surface opposite to each other; an electric heating plate (2), a thermal conductive mounting plate (3) with recesses (31) for receiving semiconductor devices under test. It is noted that Hwang et al do not explicitly mention about socket configured to receive a semiconductor device on or at the first surface of the substrate (B). However, it would have been obvious for one of ordinary skill in the art to recognize that the thermal conductive mounting plate (3) with recesses (31) is a socket because it serves the same purpose as a socket for holding semiconductor devices under test. As to claim 16, Hwang et al disclose a burn-in board as mentioned in claim 14 including a temperature sensor (6a,7a,8a)) on or in the substrate (B), wherein the temperature sensor is electrically connected to a wiring of the substrate (B). As to claim 17, herein the heating plate (2) includes a plurality of heating portions (S-shape” corresponding to a plurality of areas of the substrate (B), respectively, and the temperature sensor includes a plurality of temperature sensors (6a,7a,8a) corresponding to the plurality of areas of the substrate (B), respectively. Claims 14 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Wong et al (Pat# 8,008,934). AS to claim 14, Wong et al disclose a burn-in board as shown in figure 1, comprising a substrate (34) having a first surface and a second surface opposite to each other; a socket (36) configured to receive a semiconductor device (38) on or at the first surface of the substrate (34) ; and a heating plate/element (36) disposed within an enclosure (12). Wong et al do not mention about the heating plate (36) on the first surface of the substrate (34). However, since the enclosure containing the heating plate (36) is positioned on the first surface of the substrate (34), therefore it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to consider that the heating plate (36) is located on the first surface of the substrate (34) for the purpose of heating the semiconductor device under test (38). As to claim 16, Wong et al disclose a burn-in board as mentioned in claim 14 including a temperature sensor (18) on or in the substrate (34), wherein the temperature sensor is electrically connected to a wiring of the substrate (34). Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Lopez et al (Pat# 7,042,240). As to claim 18, Lopez et al disclose a burn-in board as shown in figures 3 and 5 having a substrate (32), a heat plate (46,44),a test socket (20) on which a semiconductor device (54) is mounted, a temperature detector (48) for detecting the temperature of the semiconductor device (54). According to Lopez et al, the apparatus as shown in figures 3 and 5 performs a burn-in test of the semiconductor device in a state that air for the burn-in test is supplied and detecting the temperature of each IC package (54) and the temperature of each IC package is controlled by a controller (42) in response to the temperature detector (48). It is noted that Lopez et al do not explicitly mention about detecting a temperature of the substrate, and operating the heating plate in response to the temperature of the substrate being lower than a reference temperature, the heating plate increasing the temperature of the substrate. However, t would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to recognize that the temperature measured by the temperature detector (48) would inherently include the temperature of the substrate (32) and the temperature of the heating plate ((46,44) is adjusted by a controller (42). Allowable Subject Matter Claims 3,8-9,15 and 19-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The prior art does not disclose the socket includes a plurality of sockets arranged in a second direction transverse to the first direction in a plan view, and the guide portion is between two sockets of the plurality of sockets adjacent to each other in the second direction or between one socket of the plurality of sockets and an edge of the substrate as recited in claim 3 and in combined with the limitation of claim 1. The prior art does not disclose the burn-in board further having a hinge member fixed to a side surface of the substrate and a side surface of the heating plate, wherein the heating plate is rotatably mounted to the hinge member; and a support member configured to support the heating plate on the first surface of the substrate as recited in claims 8 and 15 respectively and in combined with the limitations of claims 1&7 and claim 14 respectively . Claim 9 depends from objected claim 8, it is also objected. The prior art does not disclose the heating plate includes a plurality of heating portions corresponding to a plurality of areas of the substrate, respectively, and in the burn-in test, in response to a substandard area having a temperature lower than a reference temperature existing among the plurality of areas, the method includes operating a corresponding heating portion, among the plurality of heating portions, corresponding to the substandard area to selectively increase the temperature of the substandard area as recited in claim 19 and in combined with the limitation of claim 18 The prior art does not disclose the heating plate includes a plurality of heating portions corresponding to a plurality of areas of the substrate, respectively, and in the burn-in test, the method includes operating at least two of the plurality of heating portions individually to maintain burn-in test temperatures of the at least two of the plurality of areas to be different as recited in claim 20 and in combined with the limitation of claim 18. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Hashinaga et al (Pat# 5,359,285) disclose Method And Apparatus For Varying Temperature And Electronic Load Conditions Of A Semiconductor Device In A Burn-in Test Chamber While Performing A Burn-in Test. Yu et al (Pat# 11,614,483) disclose a test Apparatus For Testing Semiconductor Packages And Automatic Test Equipment Having The Same. Gopal (Pat# 11,719,743) disclose Method And Apparatus For Conducting Burn-in Testing Of Semiconductor Devices. Any inquiry concerning this communication or earlier communications from the examiner should be directed to VINH P NGUYEN whose telephone number is (571)272-1964. The examiner can normally be reached M-F 6:00am-4:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Phan Huy can be reached on 571-272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /VINH P NGUYEN/Primary Examiner, Art Unit 2858
Read full office action

Prosecution Timeline

May 10, 2024
Application Filed
Feb 25, 2026
Non-Final Rejection — §103
Apr 13, 2026
Applicant Interview (Telephonic)
Apr 13, 2026
Examiner Interview Summary

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
99%
With Interview (+16.3%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 1355 resolved cases by this examiner. Grant probability derived from career allow rate.

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