DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed on 04/22/2026 have been fully considered but they are not persuasive due to the following: -
With respect to (Applicant respectfully, ---, this reason. /A; The Applicant argues in bullet A, pages 2-3 of Remarks filed on 04/22/2026. In accordance with broadest reasonable interpretation, the Examiner respectfully disagrees because the combination of Lamar and Franck does teach and suggest every single limitation/feature recited in claim 1. In other words, the Applicant's conclusion "die terminal T of Figure 2A of Lamar does not convey a signal" is incorrect by all means, because VCC of Lamar fig. 2A is powering on the entire circuit via terminal T, and the Clamp Control Circuit 214 of Lamar fig. 2A is conditioning the signal also via terminal T, which is the exact layout of the Applicant's drawings, in particular, fig. 3 as VDD is the VCC and block 331 is the conditioner circuit 214. In other words, without terminal T, there will be no signal to convey in the first place.
With respect to (In summary, ---, this reason. /B; The Applicant argues in bullet B, pages 3-4 of Remarks filed on 04/22/2026. {See the above discussion of bullet A}
Therefore, for the reasons mentioned above, the rejection still stands.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 8-10, 12-13 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Lamar et al (US Publication No. 20180083442) in view of Franck et al (US Publication No. 20190214378).
Regarding claim 1, Lamar discloses an integrated circuit (i.e., 200'; see for example fig. 2A as shown below, para. [0046]- [0050]) comprising: a first die terminal (T) configured to convey a first signal (210); a first termination circuit (Bs) electrically coupled to the first die terminal (T) to provide a selectable termination resistance (TRs) to the first die terminal (T), the first termination circuit (Bs) including a plurality of termination blocks (B), each termination block (B) of the plurality (Bs) including: a resistive circuit (250) including a first terminal (X) and a second terminal (Y), the resistive circuit (250) coupled to the first die terminal (T) at its first terminal (i.e., 250 terminal Y is connected to T via SS and terminal X is connected to the ground terminal GND); a selection switch (SS) including a first current terminal (Y) and a second current terminal (Z), the selection switch (SS) coupled to the second terminal (Y) of the resistive circuit (250) of the termination block (B) at its first current terminal (Y) and coupled to a supply voltage terminal (Vee) at its second current terminal (Z), the selection switch (SS) including a control terminal (C) to receive a selection signal (220a, 266a) of a plurality of selection signals (202a, 258a), wherein the selection signal (220a, 266a) is asserted to make the selection switch (SS) conductive for implementing a path (P) from the second terminal (Y) of the resistive circuit (250) to the supply voltage terminal (Vee) to implement a resistance (R) of the resistive circuit (250) in a terminal resistance (TR) of the first die terminal
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(T).
Lamar does not explicitly disclose a string of one or more diodes connected in series in a cathode to anode configuration, the string is coupled to the resistive circuit at an anode of a first diode of the string and is coupled to the supply voltage terminal at a cathode of the last diode of the string such that the string is located in a path between the resistive circuit and the supply voltage terminal, wherein the string is nonconductive during normal operation.
Franck discloses an IC ESD protection circuit (i.e.,100; see for example fig. 1A as shown below, para. [0030]- [0047]); wherein a string (S) of one or more diodes (D1, D2) connected in series in a cathode (K) to anode (A) configuration, the string (S) is coupled to the resistive circuit (R) at an anode (A1) of a first diode (D1) of the string (S) and is coupled to the supply voltage terminal (Vee) at a cathode (K2) of the last diode (D2) of the string (S) such that the string (S) is located in a path (P) between the resistive circuit (R) and the supply voltage terminal (Vee), wherein the string (S) is nonconductive (i.e., such as open; see for example the expected results table in fig. 5, para. [0055]- [0058]) during normal operation (i.e., such as during normal operation; see for example the expected results table in fig. 5, para. [0055]- [0058]).
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Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the diode string device in Lamar, as taught by Franck, as it provides the advantage of optimizing the circuit design towards efficient protection, voltage regulation, and current steering.
Regarding claim 2, Lamar in view of Franck and the teachings of Lamar as modified by Franck have been discussed above.
Franck further discloses the IC ESD protection circuit (i.e.,100; see for example fig. 1A as shown above, para. [0030]- [0047]); wherein during an ESD event (i.e., such as testing an ESD event; see for example the expected results table in fig. 5, para. [0055]- [0058]) of a sufficient voltage (i.e., such as a sufficient voltage; see for example the expected results table in fig. 5, para. [0055]- [0058]) affecting the first die terminal (i.e., 110a; see for example fig. 1A as shown above, para. [0030]- [0047]), ESD current flows (i.e., such as ESD current flows; see for example the expected results table in fig. 5, para. [0055]- [0058]) from the second terminal (i.e., such as terminal 1/0 test pad 250; see for example fig. 1A as shown above, para. [0030]- [0047]) of the resistive circuit (i.e., R; see for example fig. 1A as shown above, para. [0030]- [0047]) of the termination block (i.e., 102; see for example fig. 1A as shown above, para. [0030]- [0047]) through the string (i.e., S; see for example fig. 1A as shown above, para. [0030]- [0047]) to the supply voltage terminal (i.e., Vee; see for example fig. 1A as shown above, para. [0030]- [0047]) when the selection switch (i.e., such as the rail switches diodes of the test pad 250; see for example fig. 1A as shown above, para. [0030]- [0047]) of the termination block (i.e., 102; see for example fig. 1A as shown above, para. [0030]- [0047]) is nonconductive (i.e., such as open; see for example the expected results table in fig. 5, para. [0055]- [0058]).
Regarding claim 8, Lamar in view of Franck and the teachings of Lamar as modified by Franck have been discussed above.
Franck further discloses the IC ESD protection circuit (i.e., 100; see for example fig. 1A as shown above, para. [0030]- [0047]); wherein the first signal (i.e., 110a; see for example fig. 1A as shown above, para. [0030]- [0047]) is characterized as a serial signal (i.e., such as a serial signal; see for example para. [0044]).
Regarding claim 9, Lamar in view of Franck and the teachings of Lamar as modified by Franck have been discussed above.
Lamar further discloses the integrated circuit (i.e., 200'; see for example fig. 2A as shown below, para. [0046]- [0050]); wherein the integrated circuit (i.e., 200'; see for example fig. 2A as shown above, para. [0046]- [0050]) receives an external signal (i.e., such as receiving external signals from 210 and/or 214; see for example fig. 2A as shown above, para. [0046]- [0050]) at the first die terminal (i.e., T; see for example fig. 2A as shown above, para. [0046]- [0050]).
Regarding claim 10, Lamar in view of Franck and the teachings of Lamar as modified by Franck have been discussed above.
Franck further discloses the IC ESD protection circuit (i.e.,100; see for example fig. 1A as shown above, para. [0030]- [0047]); wherein the integrated circuit (i.e.,100; see for example fig. 1A as shown above, para. [0030]- [0047]) transmits (i.e., such as configured to receive and/or transmit data from/to a network and/or any other device; see for example para. [0044]) a signal (i.e., such as configured to transmit a signal; see for example para. [0044]) at the first die terminal (i.e.,110a; see for example fig. 1A as shown above, para. [0030]- [0047]).
Regarding claim 12, Lamar in view of Franck and the teachings of Lamar as modified by Franck have been discussed above.
Franck further discloses the IC ESD protection circuit (i.e., 100; see for example fig. 1A as shown above, para. [0030]- [0047]); wherein the first die terminal (i.e., 110a; see for example fig. 1A as shown above, para. [0030]- [0047]) is coupled to a first input (i.e., 112; see for example fig. 1A as shown above, para. [0030]- [0047]) of a differential amplifier (i.e., 108; see for example fig. 1A as shown above, para. [0030]- [0047]).
Regarding claim 13, Lamar in view of Franck and the teachings of Lamar as modified by Franck have been discussed above.
Franck further discloses the IC ESD protection circuit (i.e.,100; see for example fig. 1A as shown above, para. [0030]- [0047]); wherein the first die terminal (i.e., 110a; see for example fig. 1A as shown above, para. [0030]- [0047]) is coupled to the input (i.e., 112; see for example fig. 1A as shown above, para. [0030]- [ 0047]) of the differential amplifier (i.e., 108; see for example fig. 1A as shown above, para. [0030]- [0047]) through a resistive circuit (i.e., Rand 106; see for example fig. 1A as shown above, para. [0030]- [0047]).
Regarding claim 20, Lamar in view of Franck and the teachings of Lamar as modified by Franck have been discussed above.
Lamar further discloses the integrated circuit (i.e., 200'; see for example fig. 2A as shown above, para. [0046]- [0050]); and Franck furthermore discloses the IC ESD protection circuit (i.e.,100; see for example fig. 1A as shown above, para. [0030]- [0047]); wherein during an ESD event (i.e., such as an ESD event; see for example the expected results table in fig. 5, para. [0055]- [0058]) of a sufficient voltage (i.e., such as a sufficient voltage; see for example the expected results table in fig. 5, para. [0055]- [0058]) affecting the first die terminal (i.e., 110a; see for example fig. lA as shown above, para. [0030]- [0047]), ESD current flows (i.e., such as ESD current flows; see for example the expected results table in fig. 5, para. [0055]- [0058]) from the resistive circuit (i.e., R; see for example fig. 1A as shown above, para. [0030]- [0047]) of the termination block (i.e., 102; see for example fig. 1A as shown above, para. [0030]- [0047]) through the string (i.e., S; see for example fig. 1A as shown above, para. [0030]- [0047]) to the supply voltage terminal (i.e., Vee; see for example fig. 1A as shown above, para. [0030]- [0047]) when the selection switch (i.e., such as the rail switches diodes of test pad 250; see for example fig. 1A as shown above, para. [0030]- [0047]) of the termination block (i.e., 102; see for example fig. 1A as shown above, para. [0030]- [0047]) is nonconductive (i.e., such as open; see for example the expected results table in fig. 5, para. [0055]- [0058]). And, for the rest of the limitations/features in claim 20 is rejected for the same reasons that have already been stated/discussed above in rejected claim 1. {See rejection of claim 1}
Allowable Subject Matter
Claims 3-7, 11 and 14-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 3, Lamar in view of Franck teaches the invention set forth above. However, neither Lamar nor Franck particularly teaches wherein a resistive circuit for a first termination block of the plurality is of a first resistance and a resistive circuit of a second termination block of the plurality is of a second resistance that is less than the first resistance, wherein a string of diodes of the first termination block has a smaller current carrying capability than a string of diodes of the second termination block.
Hence claim 3 will be deemed allowable if rewritten in an independent form.
Regarding claim 4, Lamar in view of Franck teaches the invention set forth above. However, neither Lamar nor Franck particularly teaches wherein for each termination block of the plurality, the cathode of the last diode of the string is connected to the supply voltage terminal.
Hence claim 4 will be deemed allowable if rewritten in an independent form.
Regarding claim 5, Lamar in view of Franck teaches the invention set forth above. However, neither Lamar nor Franck particularly teaches wherein for each termination block of the plurality, the string of diodes has a cumulative threshold voltage of the one or more diodes of the string that is greater than a greatest operating volage across the selection switch of the termination block from its first current terminal to its second current terminal when the selection switch is nonconductive during normal operation.
Hence claim 5 will be deemed allowable if rewritten in an independent form.
Regarding claim 6, Lamar in view of Franck teaches the invention set forth above. However, neither Lamar nor Franck particularly teaches wherein for each termination block of the plurality, a cathode of a last diode of the string is connected to an anode of a first diode of a common string of one or more diodes, wherein a cathode of a last diode of the common string is connected to the supply voltage terminal.
Hence claim 6 will be deemed allowable if rewritten in an independent form.
Claim 7 depends on objected claim 6, consequently claim 7 will also be deemed allowable.
Regarding claim 11, Lamar in view of Franck teaches the invention set forth above. However, neither Lamar nor Franck particularly teaches wherein the first signal has an operating frequency of 1000 MHz or greater.
Hence claim 11 will be deemed allowable if rewritten in an independent form.
Regarding claim 14, Lamar in view of Franck teaches the invention set forth above. However, neither Lamar nor Franck particularly teaches further comprising: a second die terminal configured to convey a second signal; a second termination circuit electrically coupled to the second die terminal to provide a selectable termination resistance to the second die terminal, the second termination circuit including a second plurality of termination blocks, each termination block of the second plurality including: a resistive circuit including a first terminal and a second terminal, the resistive circuit coupled to the second die terminal at its first terminal; a selection switch including a first current terminal and a second current terminal, the selection switch coupled to the second terminal of the resistive circuit of the termination block at its first current terminal and coupled to the supply voltage terminal at its second current terminal, the selection switch including a control terminal to receive a selection signal of a second plurality of selection signals, wherein the selection signal is asserted to make the selection switch conductive for implementing a path from the second terminal of the resistive circuit to the supply voltage terminal to implement a resistance of the resistive circuit in a terminal resistance of the second die terminal; a string of one or more diodes connected in series in a cathode to anode configuration, the string is coupled to the resistive circuit at an anode of a first diode of the string and is coupled to the supply voltage terminal at a cathode of the last diode of the string such that the string is located in a path between the resistive circuit and the supply voltage terminal, wherein the string is nonconductive during normal operation.
Hence claim 14 will be deemed allowable if rewritten in an independent form.
Claims 15-16 depend on objected claim 14, consequently claims 15-16 will also be deemed allowable.
Regarding claim 17, Lamar in view of Franck teaches the invention set forth above. However, neither Lamar nor Franck particularly teaches wherein the first signal has an operating frequency in a range of 5000- 6000 MHz.
Hence claim 17 will be deemed allowable if rewritten in an independent form.
Regarding claim 18, Lamar in view of Franck teaches the invention set forth above. However, neither Lamar nor Franck particularly teaches wherein the diodes of the one or more diodes of the string are characterized as gated diodes.
Hence claim 18 will be deemed allowable if rewritten in an independent form.
Regarding claim 19, Lamar in view of Franck teaches the invention set forth above. However, neither Lamar nor Franck particularly teaches wherein for each termination block of the plurality, the string of one or more diodes has a cumulative threshold voltage of the one or more diodes of the string that is greater than a greatest operating volage difference between a voltage on the first die terminal and the supply voltage terminal during normal operation.
Hence claim 19 will be deemed allowable if rewritten in an independent form.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MUAAMAR Q AL-TAWEEL whose telephone number is (571)270-0339. The examiner can normally be reached 0730-1700.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu V Tran can be reached at (571) 270- 1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MUAAMAR QAHTAN AL-TAWEEL/Examiner, Art Unit 2838
/THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838
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