DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 16 is objected to because of the following informalities: Claim 16, line 9 recites “multiple cycles”, which appears to be a typographical error of space of --multiple cycles--.
Appropriate correction is required.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 2-21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-18 of U.S. Patent No. US 11,996,687. Although the claims at issue are not identical, they are not patentably distinct from each other because:
Regarding claim 2, the U.S. Patent discloses an electronic control circuit for one or more protective relays in a power distribution system circuit interrupting device, the electronic control circuit comprising: a boost circuit configured to increase a DC input voltage to a DC output voltage that is greater than the DC input voltage and greater than a threshold voltage used to drive the one or more protective relays; a capacitor storage unit electrically coupled to the boost circuit, the capacitor storage unit is configured to store the DC output voltage of the boost circuit and to output a fixed DC voltage that is greater than the threshold voltage; and a pulse width modulator control circuit electrically coupled to the capacitor storage unit and configured to receive the fixed DC voltage from the capacitor storage unit, the pulse width modulator control circuit being responsive to one or more input pulses from a control and enable circuit to turn the pulse width modulator control circuit “on” and “off” to selectively enable energy from the capacitor storage unit to energize the one or more protective relays without waiting for the capacitor storage unit to charge to output the fixed DC voltage (see claim 1);
Regarding claim 3, the U.S. Patent discloses the DC input voltage is in the range of about 12 VDC to about 24 VDC (see claim 2);
Regarding claim 4, the U.S. Patent discloses the DC output voltage is in the range of about 180 VDC to about 260 VDC (see claim 3);
Regarding claim 5, the U.S. Patent discloses the fixed DC voltage is in the range of about 180 VDC to about 260 VDC (see claim 4);
Regarding claim 6, the U.S. Patent discloses the pulse width modulator control circuit regulates energy delivered from the capacitor storage unit to the one or more protective relays by limiting current flow to the one or more protective relays to a predefined steady state value (see claim 5);
Regarding claim 7, the U.S. Patent discloses the pulse width modulator control circuit regulates energy delivered from the capacitor storage unit to the one or more protective relays by generating a pulse width modulated signal that is based on the current flow to the one or more protective relays (see claim 6);
Regarding claim 8, the U.S. Patent discloses the pulse width modulator control circuit uses feedback from one or more current sensors in the one or more protective relays to regulate energy delivered from the capacitor storage unit to the one or more protective relays (see claim 7);
Regarding claim 9, the U.S. Patent discloses an electronic control circuit for one or more protective relays in a power distribution system circuit interrupting device, the electronic control circuit comprising: a boost circuit configured to increase a low DC input voltage to a higher DC output voltage that is greater than a threshold voltage used to drive the one or more protective relays; a capacitor storage unit electrically coupled to the boost circuit, the capacitor storage unit is configured to store the higher DC output voltage of the boost circuit and to output a fixed DC voltage that is greater than the threshold voltage; and a pulse width modulator control circuit electrically coupled to the capacitor storage unit and configured to receive the fixed DC voltage from the capacitor storage unit, the pulse width modulator control circuit outputs a PWM signal that regulates the ON and OFF periods when energy from the capacitor storage unit is delivered to the one or more protective relays without waiting for the capacitor storage unit to charge to output the fixed DC voltage (see claim 8);
Regarding claim 10, the U.S. Patent discloses the low DC input voltage is in the range of about 12 VDC to about 24 VDC (see claim 9);
Regarding claim 11, the U.S. Patent discloses the higher DC output voltage is in the range of about 180 VDC to about 260 VDC (see claim 10);
Regarding claim 12, the U.S. Patent discloses the fixed DC voltage is in the range of about 180 VDC to about 260 VDC (see claim 11);
Regarding claim 13, the U.S. Patent discloses the pulse width modulator control circuit regulates energy delivered from the capacitor storage unit to the one or more protective relays by limiting current flow to the one or more protective relays to a predefined steady state value (see claim 5);
Regarding claim 14, the U.S. Patent discloses the pulse width modulator control circuit regulates energy delivered from the capacitor storage unit to energize the one or more protective relays by generating a pulse width modulated signal that is based on the current flow to the one or more protective relays (see claim 12);
Regarding claim 15, the U.S. Patent discloses the pulse width modulator control circuit uses feedback current received from one or more current sensors in the one or more protective relays to regulate energy delivered from the capacitor storage unit to energize the one or more protective relays (see claim 13);
Regarding claim 16, the U.S. Patent discloses an electronic control circuit for one or more protective relays in a power distribution system circuit interrupting device, the electronic control circuit comprising: a capacitor storage unit configured to store a higher DC voltage and output a fixed DC voltage that is greater than a threshold voltage used to drive the one or more protective relays; and a pulse width modulator control circuit electrically coupled to the capacitor storage unit and configured to receive the fixed DC voltage from the capacitor storage unit, the pulse width modulator control circuit generates a PWM signal to regulate energy delivered from the capacitor storage unit to the one or more protective relays for multiple cycles of turning “on” and “off” the voltage to the one or more protective relays without waiting for the capacitor storage unit to charge to output the fixed DC voltage (see claim 14);
Regarding claim 17, the U.S. Patent discloses the low DC input voltage is in the range of about 12 VDC to about 24 VDC (see claim 15);
Regarding claim 18, the U.S. Patent discloses the higher DC output voltage is in the range of about 180 VDC to about 260 VDC (see claim 16);
Regarding claim 19, the U.S. Patent discloses the fixed DC voltage is in the range of about 180 VDC to about 260 VDC (see claim 17);
Regarding claim 20, the U.S. Patent discloses the pulse width modulator control circuit regulates energy delivered from the capacitor storage unit to the one or more protective relays by limiting current flow to the one or more protective relays to a predefined steady state value (see claim 5);
Regarding claim 21, the U.S. Patent discloses the pulse width modulator control circuit uses feedback from one or more current sensors in the one or more protective relays to regulate energy delivered from the capacitor storage unit to energize the one or more protective relays (see claim 18).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2, 3, 6, 9, 10, 13, 16, 17 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Naiva et al. (US 2012/0001764), hereinafter Naiva, in view of Riley (US 2019/0080868), and further in view of Flaherty et al. (US 2012/0019971), hereinafter Flaherty.
Regarding claim 2, Naiva discloses (see figures 1-3) an electronic control circuit (figure 1, part electronic control circuit at 4) for one or more protective relays (figure 1, part 24) in a power system circuit interrupting device (figure 1) (paragraph [0016]; An improved overload relay 4 in accordance with the disclosed and claimed concept is depicted schematically in FIG. 1. The overload relay 4 monitors and controls a circuit that comprises three phases 8A, 8B, and 8C, collectively referred to hereinafter with the numeral 8, that extend between a power source 12 and a load 16 which, in the depicted exemplary embodiment, is an electric motor. The circuit also includes a main disconnect 20 that can be manually operated as well as a contactor apparatus 24 that is operated by the overload relay 4 to interrupt the circuit), the electronic control circuit (figure 1, part electronic control circuit at 4) comprising: a boost circuit (figure 1, part 32) configured to increase an input voltage (figure 1, part input voltage at boost 32) to a DC output voltage (figure 1, part output voltage of boost 32) that is greater than the input voltage (figure 1, part input voltage at boost 32; by step-up operation) and greater than a threshold voltage (figure 1, part output voltage of boost 32; predetermined threshold that typically will be just above the amount of energy required to energize the solenoid 52) used to drive the one or more protective relays (figure 1, part 24) (paragraphs [0025]-[0029]; the capacitor 36 has reached a desirable level of charge and has stored therein enough energy to reliably energize the solenoid 52… the capacitor analysis circuit 48 is operable to determine the energy storage capability of the capacitor 36 in order to generate an alarm or perform some type of predetermined action when the energy storage capability has dropped to a predetermined threshold. The predetermined threshold typically will be just above the amount of energy required to energize the solenoid 52. That is, the predetermined action is performed if the capacitor 36 reaches a condition where its ability to energize the solenoid 52 is potentially questionable); a capacitor storage unit (figure 1, part 36) electrically coupled to the boost circuit (figure 1, part 32), the capacitor storage unit (figure 1, part 36) is configured to store the DC output voltage of the boost circuit (figure 1, part output voltage of boost 32) and to output a fixed DC voltage (figure 1, part fixed DC voltage stored at 36) that is greater than the threshold voltage (figure 1, part fixed DC voltage stored at 36; predetermined threshold that typically will be just above the amount of energy required to energize the solenoid 52) (paragraphs [0025]-[0029]); and a pulse control circuit (figure 1, part pulse control circuit generated by switch between 36 and 52, 52, 56 and 60) electrically coupled to the capacitor storage unit (figure 1, part 36; through switch between 36 and 52) and configured to receive the fixed DC voltage (figure 1, part fixed DC voltage stored at 36) from the capacitor storage unit (figure 1, part 36), the pulse control circuit (figure 1, part pulse control circuit generated by switch between 36 and 52, 52, 56 and 60) being responsive to one or more input pulses (figure 1, part pulses from 44 to switch between 36 and 52) from a control and enable circuit (figure 1, part control and enable circuit generated by 48 and 44) to turn the pulse control circuit “on” and “off” (figure 1, part pulse control circuit generated by switch between 36 and 52, 52, 56 and 60; through on/off of switch between 36 and 52) to selectively enable energy from the capacitor storage unit (figure 1, part 36; through switch between 36 and 52) to energize the one or more protective relays (figure 1, part 24; through 52 and 56) without waiting for the capacitor storage unit (figure 1, part 36) to charge to output the fixed DC voltage (figure 1, part fixed DC voltage stored at 36; because the extra charge at 36 above the predetermined threshold that is above the amount of energy required to energize the solenoid 52) (paragraphs [0019]-[0030]; The overload relay 4 further comprises a protective device in the form of a solenoid 52 which is of a latching type. In certain predefined circumstances, the processor 44 can cause the solenoid 52 to be energized by the capacitor 36).
Naiva does not expressly disclose a power distribution system circuit; a DC input voltage; and a pulse width modulator control circuit.
Riley teaches (see figures 1-6) a boost circuit (figure 1, part 16) (figure 5, part 216) configured to increase a DC input voltage (figure 1, part DC input voltage to boost circuit 16) (figure 5, part DC input voltage to boost circuit 216) to a DC output voltage (figure 1, part higher DC output voltage at 32; example 30V) (figure 1, part higher DC output voltage from 216) that is greater than the DC input voltage (figure 1, part DC input voltage to boost circuit 16; example 12V) (figure 5, part DC input voltage to boost circuit 216) (paragraph [0029]; the input voltage (e.g., the voltage level available on the first power rail 20) is increased to a higher level (described in greater detail below), which higher level is used to operate the bi-stable relay 12 and/or charge an energy storage device. The boost converter 16 is then configured to “boost” (i.e., increases) the voltage supplied on the first power rail 20 and make this increased voltage available on the second power rail 32. For example, in some embodiments, the first power rail 20 may be electrically coupled to an input power source configured to supply power having a voltage of 12 Volts. The boost converter 16 may be configured to increase the 12 Volts supplied on the first power rail 20 to 30 Volts, which is made available on the second power rail 32) and greater than a threshold voltage (figure 1, part threshold voltage generated used to drive the bistable relay between 24 and 26) used to drive the one or more protective relays (figure 1, part bistable relay between 24 and 26) (paragraphs [0032]-[0036]; the trigger circuit 14 may include a comparator to detect the threshold voltage, which may then trigger a one-shot circuit to pulse the actuator 18 .. the trigger circuit 14 may also monitor the voltage output from the boost converter 16 to ensure that there is enough energy stored in an energy storage device 44 (e.g., a capacitor) to actuate the bi-stable relay 12. With some examples, the trigger circuit 14 may be configured to not close (or open) the bi-stable relay 12 until there is enough energy stored in the energy storage device 44 to trigger the open (or close) event); and a pulse width modulator control circuit (figure 2, part pulse width modulator control circuit generated by 46) (figure 5, part pulse width modulator control circuit generated by 250 and 252) (paragraph [0048]; The analog circuitry (e.g., the open relay driver circuit 250 or the closed relay driver circuit 252) of the bi-stable relay control circuit 207 generates the proper pulse width for each solenoid winding, allowing the signal input to be latched in the same manner as a traditional normally open relay, but with the low continuous current consumption of a bi-stable relay) electrically coupled to the capacitor storage unit (figure 2, part capacitor storage unit at 44) (figure 5, part 244) and configured to receive the fixed DC voltage (figure 2, part output voltage of capacitor storage unit at 44) from the capacitor storage unit (figure 2, part capacitor storage unit at 44) (figure 5, part 244), the pulse width modulator control circuit (figure 2, part pulse width modulator control circuit generated by 46) (figure 5, part pulse width modulator control circuit generated by 250 and 252) being responsive to one or more input pulses from a control and enable circuit (figure 2, part one or more input pulses from a control and enable circuit 14) (paragraphs [0031]- [0033]; the trigger circuit 14 may be realized from a voltage detection circuit with a fixed width pulse generator... the trigger circuit 14 may include a comparator to detect the threshold voltage, which may then trigger a one-shot circuit to pulse the actuator 18) to turn the pulse width modulator control circuit (figure 2, part pulse width modulator control circuit generated by 46) (figure 5, part pulse width modulator control circuit generated by 250 and 252) "on" and "off' to selectively enable energy (figure 5, part through on and off operation of the open relay driver circuit 250 or the closed relay driver circuit 252) from the capacitor storage unit (figure 2, part capacitor storage unit at 44) (figure 5, part 244) to energize the one or more protective relays (figures 1 and 2, part bistable relay between 24 and 26; specific first and second coils 34 and 36) (paragraph [0035]; the relay energizer module 46 is configured to supply a sufficient energy pulse to the coils 34, 36 to cause the bi-stable relay 100 to change state. More particularly, the relay energizer module 46 may be configured to energize either the coil 34 or the coil 36 (depending upon whether the bi-stable relay 12 is being opened or closed) upon being signaled by the condition detection module 38).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the boost circuit and control circuit of Naiva with the boost circuit and the pulse width modulator control circuit features as taught Riley, because it provides more accurate and efficient power for proper operation of the device (paragraph [0005]).
Flaherty teaches (see figures 1-5) one or more protective relays (figure 2, part relay K1) in a power distribution system circuit interrupting device (figure 2) (paragraph [0042]; an autorecloser breaker circuit that may be used, for example, to control AC power distribution to a customer); and a pulse width modulator control circuit (figure 2, part the pulse width modulator control circuit generated by Q5, C9, R7, D8, Q4, Q3, C6, D4, C10 and D5) being responsive to one or more input pulses (figure 2, part input pulses to gate of Q4) (paragraphs [0039]-[0041] and claim 18; The pulse width modulator circuit of FIG. 2 further includes a duty cycle capacitor C6 that discharges a current to the base of the drive transistor 95 during the positive half of the AC power source... a pulse width modulator circuit configured to generate a pulse width modulated signal having a pulse width that varies responsive to an average voltage across a relay coil of the electromagnetic relay, the pulse width modulator including a voltage averaging circuit including a capacitor coupled in parallel with the relay coil).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the combination of Naiva and Riley with the PWM control circuit in the power distribution system circuit interrupting device features as taught Flaherty and obtain an electronic control circuit for one or more protective relays in a power distribution system circuit interrupting device, the electronic control circuit comprising: a boost circuit configured to increase a DC input voltage to a DC output voltage that is greater than the DC input voltage and greater than a threshold voltage used to drive the one or more protective relays; a capacitor storage unit electrically coupled to the boost circuit, the capacitor storage unit is configured to store the DC output voltage of the boost circuit and to output a fixed DC voltage that is greater than the threshold voltage; and a pulse width modulator control circuit electrically coupled to the capacitor storage unit and configured to receive the fixed DC voltage from the capacitor storage unit, the pulse width modulator control circuit being responsive to one or more input pulses from a control and enable circuit to turn the pulse width modulator control circuit “on” and “off” to selectively enable energy from the capacitor storage unit to energize the one or more protective relays without waiting for the capacitor storage unit to charge to output the fixed DC voltage, because it provides more efficient control in order to obtain a protection device that is more energy efficient for power distribution system (paragraph [0043]).
Regarding claim 3, Naiva, Riley and Flaherty teach everything claimed as applied above (see claim 2). Further, Naiva discloses (see figures 1-3) an input voltage (figure 1, part input voltage at boost 32). However, Naiva does not expressly disclose the DC input voltage is in the range of about 12 VDC to about 24 VDC.
Riley teaches (see figures 1-6) the DC input voltage is in the range of about 12 VDC to about 24 VDC (figure 1, part DC input voltage at 20; 12VDC) (paragraph [0029]; the input voltage (e.g., the voltage level available on the first power rail 20) is increased to a higher level (described in greater detail below), which higher level is used to operate the bi-stable relay 12 and/or charge an energy storage device. The boost converter 16 is then configured to “boost” (i.e., increases) the voltage supplied on the first power rail 20 and make this increased voltage available on the second power rail 32. For example, in some embodiments, the first power rail 20 may be electrically coupled to an input power source configured to supply power having a voltage of 12 Volts. The boost converter 16 may be configured to increase the 12 Volts supplied on the first power rail 20 to 30 Volts, which is made available on the second power rail 32).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the boost circuit of Naiva with the boost circuit features as taught Riley, because it provides more accurate and efficient power for proper operation of the device (paragraph [0005]).
Regarding claim 6, Naiva, Riley and Flaherty teach everything claimed as applied above (see claim 2). Further, Naiva discloses (see figures 1-3) the pulse control circuit (figure 1, part pulse control circuit generated by switch between 36 and 52, 52, 56 and 60) regulates energy delivered from the capacitor storage unit (figure 1, part 36; through switch between 36 and 52) to the one or more protective relays (figure 1, part 24; through 52 and 56) by limiting current (figure 1, part through switch between 36 and 52, 52 and 56) flow to the one or more protective relays to a predefined steady state value (figure 1, part 24 to steady state value) (paragraphs [0019]-[0030]; The overload relay 4 further comprises a protective device in the form of a solenoid 52 which is of a latching type. In certain predefined circumstances, the processor 44 can cause the solenoid 52 to be energized by the capacitor 36). However, Naiva does not expressly disclose the pulse width modulator control circuit.
Riley teaches (see figures 1-6) the pulse width modulator control circuit (figure 2, part pulse width modulator control circuit generated by 46) regulates energy delivered (figure 5, part through open relay driver circuit 250 and closed relay driver circuit 252) from the capacitor storage unit (figure 2, part capacitor storage unit at 44) (figure 5, part 244) to the one or more protective relays (figures 1 and 2, part bistable relay between 24 and 26) by limiting current (figure 5, part through open relay driver circuit 250 and closed relay driver circuit 252) (paragraph [0048]; The analog circuitry (e.g., the open relay driver circuit 250 or the closed relay driver circuit 252) of the bi-stable relay control circuit 207 generates the proper pulse width for each solenoid winding, allowing the signal input to be latched in the same manner as a traditional normally open relay, but with the low continuous current consumption of a bi-stable relay) flow to the one or more protective relays (figures 1 and 2, part bistable relay between 24 and 26) to a predefined steady state value (paragraphs [0035]-[0036]; the relay energizer module 46 may include an open relay driver circuit 50 and a closed relay driver circuit 52 electrically coupled with the energy storage device 44 and the boost converter 16 via a 3-jack connector 54... the energy storage device 44 may be any device capable of storing energy (e.g., a capacitor, rechargeable battery, or the like). The energy storage device 44 is then charged to the nominal voltage level available on the second power rail 32 (i.e., the boosted input voltage level). Subsequently, when the input power is interrupted, the energy stored in the energy storage device 44 is used to energize either of the coils 34 or 36).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the boost circuit and control circuit of Naiva with the boost circuit and the pulse width modulator control circuit features as taught Riley and obtain the pulse width modulator control circuit regulates energy delivered from the capacitor storage unit to the one or more protective relays by limiting current flow to the one or more protective relays to a predefined steady state value, because it provides more accurate and efficient power for proper operation of the device (paragraph [0005]).
Regarding claim 9, Naiva discloses (see figures 1-3) an electronic control circuit (figure 1, part electronic control circuit at 4) for one or more protective relays (figure 1, part 24) in a power system circuit interrupting device (figure 1) (paragraph [0016]; An improved overload relay 4 in accordance with the disclosed and claimed concept is depicted schematically in FIG. 1. The overload relay 4 monitors and controls a circuit that comprises three phases 8A, 8B, and 8C, collectively referred to hereinafter with the numeral 8, that extend between a power source 12 and a load 16 which, in the depicted exemplary embodiment, is an electric motor. The circuit also includes a main disconnect 20 that can be manually operated as well as a contactor apparatus 24 that is operated by the overload relay 4 to interrupt the circuit), the electronic control circuit (figure 1, part electronic control circuit at 4) comprising: a boost circuit (figure 1, part 32) configured to increase a low input voltage (figure 1, part input voltage at boost 32) to a higher DC output voltage (figure 1, part output voltage of boost 32) that is greater than a threshold voltage (figure 1, part output voltage of boost 32; predetermined threshold that typically will be just above the amount of energy required to energize the solenoid 52) used to drive the one or more protective relays (figure 1, part 24) (paragraphs [0025]-[0029]; the capacitor 36 has reached a desirable level of charge and has stored therein enough energy to reliably energize the solenoid 52… the capacitor analysis circuit 48 is operable to determine the energy storage capability of the capacitor 36 in order to generate an alarm or perform some type of predetermined action when the energy storage capability has dropped to a predetermined threshold. The predetermined threshold typically will be just above the amount of energy required to energize the solenoid 52. That is, the predetermined action is performed if the capacitor 36 reaches a condition where its ability to energize the solenoid 52 is potentially questionable); a capacitor storage unit (figure 1, part 36) electrically coupled to the boost circuit (figure 1, part 32), the capacitor storage unit (figure 1, part 36) is configured to store the higher DC output voltage of the boost circuit (figure 1, part output voltage of boost 32) and to output a fixed DC voltage (figure 1, part fixed DC voltage stored at 36) that is greater than the threshold voltage (figure 1, part fixed DC voltage stored at 36; predetermined threshold that typically will be just above the amount of energy required to energize the solenoid 52) (paragraphs [0025]-[0029]); and a pulse control circuit (figure 1, part pulse control circuit generated by switch between 36 and 52, 52, 56 and 60) electrically coupled to the capacitor storage unit (figure 1, part 36; through switch between 36 and 52) and configured to receive the fixed DC voltage (figure 1, part fixed DC voltage stored at 36) from the capacitor storage unit (figure 1, part 36), the pulse control circuit (figure 1, part pulse control circuit generated by switch between 36 and 52, 52, 56 and 60) output pulse signal (figure 1, part through switch between 36 and 52 that receive pulses from 44) that control the ON and OFF periods (figure 1, part through ON/OFF periods at the switch between 36 and 52) when energy from the capacitor storage unit (figure 1, part 36; through switch between 36 and 52) is delivered to the one or more protective relays (figure 1, part 24; through 52 and 56) without waiting for the capacitor storage unit (figure 1, part 36) to charge to output the fixed DC voltage (figure 1, part fixed DC voltage stored at 36; because the extra charge at 36 above the predetermined threshold that is above the amount of energy required to energize the solenoid 52) (paragraphs [0019]-[0030]; The overload relay 4 further comprises a protective device in the form of a solenoid 52 which is of a latching type. In certain predefined circumstances, the processor 44 can cause the solenoid 52 to be energized by the capacitor 36).
Naiva does not expressly disclose a power distribution system circuit; a low DC input voltage; and a pulse width modulator control circuit, the pulse width modulator control circuit outputs a PWM signal that regulates the ON and OFF periods.
Riley teaches (see figures 1-6) a boost circuit (figure 1, part 16) (figure 5, part 216) configured to increase a low DC input voltage (figure 1, part DC input voltage to boost circuit 16) (figure 5, part DC input voltage to boost circuit 216) to a higher DC output voltage (figure 1, part higher DC output voltage at 32; example 30V) (figure 1, part higher DC output voltage from 216) (paragraph [0029]; the input voltage (e.g., the voltage level available on the first power rail 20) is increased to a higher level (described in greater detail below), which higher level is used to operate the bi-stable relay 12 and/or charge an energy storage device. The boost converter 16 is then configured to “boost” (i.e., increases) the voltage supplied on the first power rail 20 and make this increased voltage available on the second power rail 32. For example, in some embodiments, the first power rail 20 may be electrically coupled to an input power source configured to supply power having a voltage of 12 Volts. The boost converter 16 may be configured to increase the 12 Volts supplied on the first power rail 20 to 30 Volts, which is made available on the second power rail 32) that is greater than a threshold voltage (figure 1, part threshold voltage generated used to drive the bistable relay between 24 and 26) used to drive the one or more protective relays (figure 1, part bistable relay between 24 and 26) (paragraphs [0032]-[0036]; the trigger circuit 14 may include a comparator to detect the threshold voltage, which may then trigger a one-shot circuit to pulse the actuator 18 .. the trigger circuit 14 may also monitor the voltage output from the boost converter 16 to ensure that there is enough energy stored in an energy storage device 44 (e.g., a capacitor) to actuate the bi-stable relay 12. With some examples, the trigger circuit 14 may be configured to not close (or open) the bi-stable relay 12 until there is enough energy stored in the energy storage device 44 to trigger the open (or close) event); and a pulse width modulator control circuit (figure 2, part pulse width modulator control circuit generated by 46) (figure 5, part pulse width modulator control circuit generated by 250 and 252) (paragraph [0048]; The analog circuitry (e.g., the open relay driver circuit 250 or the closed relay driver circuit 252) of the bi-stable relay control circuit 207 generates the proper pulse width for each solenoid winding, allowing the signal input to be latched in the same manner as a traditional normally open relay, but with the low continuous current consumption of a bi-stable relay) electrically coupled to the capacitor storage unit (figure 2, part capacitor storage unit at 44) (figure 5, part 244) and configured to receive the fixed DC voltage (figure 2, part output voltage of capacitor storage unit at 44) from the capacitor storage unit (figure 2, part capacitor storage unit at 44) (figure 5, part 244), the pulse width modulator control circuit (figure 2, part pulse width modulator control circuit generated by 46) (figure 5, part pulse width modulator control circuit generated by 250 and 252) outputs a PWM signal (figure 5, part PWM signal to switches at the pulse width modulator control circuit generated by 250 and 252) that regulates the ON and OFF periods (figure 5, part through on and off operation of the open relay driver circuit 250 or the closed relay driver circuit 252) when energy from the capacitor storage unit (figure 2, part capacitor storage unit at 44) (figure 5, part 244) is delivered to the one or more protective relays (figures 1 and 2, part bistable relay between 24 and 26; specific first and second coils 34 and 36) (paragraph [0035]; the relay energizer module 46 is configured to supply a sufficient energy pulse to the coils 34, 36 to cause the bi-stable relay 100 to change state. More particularly, the relay energizer module 46 may be configured to energize either the coil 34 or the coil 36 (depending upon whether the bi-stable relay 12 is being opened or closed) upon being signaled by the condition detection module 38).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the boost circuit and control circuit of Naiva with the boost circuit and the pulse width modulator control circuit features as taught Riley, because it provides more accurate and efficient power for proper operation of the device (paragraph [0005]).
Flaherty teaches (see figures 1-5) one or more protective relays (figure 2, part relay K1) in a power distribution system circuit interrupting device (figure 2) (paragraph [0042]; an autorecloser breaker circuit that may be used, for example, to control AC power distribution to a customer); and a pulse width modulator control circuit (figure 2, part the pulse width modulator control circuit generated by Q5, C9, R7, D8, Q4, Q3, C6, D4, C10 and D5), the pulse width modulator control circuit (figure 2, part the pulse width modulator control circuit generated by Q5, C9, R7, D8, Q4, Q3, C6, D4, C10 and D5) outputs a PWM signal that regulates the ON and OFF periods (figure 2, part PWM signal that regulates the ON and OFF periods of Q5) (paragraphs [0039]-[0041] and claim 18; The pulse width modulator circuit of FIG. 2 further includes a duty cycle capacitor C6 that discharges a current to the base of the drive transistor 95 during the positive half of the AC power source... a pulse width modulator circuit configured to generate a pulse width modulated signal having a pulse width that varies responsive to an average voltage across a relay coil of the electromagnetic relay, the pulse width modulator including a voltage averaging circuit including a capacitor coupled in parallel with the relay coil).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the combination of Naiva and Riley with the PWM control circuit in the power distribution system circuit interrupting device features as taught Flaherty and obtain an electronic control circuit for one or more protective relays in a power distribution system circuit interrupting device, the electronic control circuit comprising: a boost circuit configured to increase a low DC input voltage to a higher DC output voltage that is greater than a threshold voltage used to drive the one or more protective relays; a capacitor storage unit electrically coupled to the boost circuit, the capacitor storage unit is configured to store the higher DC output voltage of the boost circuit and to output a fixed DC voltage that is greater than the threshold voltage; and a pulse width modulator control circuit electrically coupled to the capacitor storage unit and configured to receive the fixed DC voltage from the capacitor storage unit, the pulse width modulator control circuit outputs a PWM signal that regulates the ON and OFF periods when energy from the capacitor storage unit is delivered to the one or more protective relays without waiting for the capacitor storage unit to charge to output the fixed DC voltage, because it provides more efficient control in order to obtain a protection device that is more energy efficient for power distribution system (paragraph [0043]).
Regarding claim 10, claim 3 has the same limitations, based on this is rejected for the same reasons.
Regarding claim 13, claim 6 has the same limitations, based on this is rejected for the same reasons.
Regarding claim 16, claim 9 has the same limitations, based on this is rejected for the same reasons.
Regarding claim 17, claim 3 has the same limitations, based on this is rejected for the same reasons.
Regarding claim 20, claim 6 has the same limitations, based on this is rejected for the same reasons.
Claims 4, 5, 11, 12, 18 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Naiva et al. (US 2012/0001764), hereinafter Naiva, in view of Riley (US 2019/0080868), and further in view of Flaherty et al. (US 2012/0019971), hereinafter Flaherty, and further in view of Billings (US 4,704,652).
Regarding claim 4, Naiva, Riley and Flaherty teach everything claimed as applied above (see claim 2). Further, Naiva discloses (see figures 1-3) the DC output voltage (figure 1, part output voltage of boost 32). However, Naiva does not expressly disclose the DC output voltage is in the range of about 180 VDC to about 260 VDC.
Billings teaches (see figures 1-4) the DC output voltage (figure 3, part 16 output; +DC 150V) is in the range of about 150 VDC to about 260 VDC (figure 3, part 16 output; +DC 150V).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the boost circuit of Naiva with the DC output voltage features as taught by Billings and obtain the DC output voltage is in the range of about 180 VDC to about 260 VDC, because it provides more accurate voltage operation in order to meet with the design requirements (column 3; lines 47-53). Furthermore, In re Aller, 105 USPQ 233 (MPEP 2144.05 (II)) discloses discovering the optimum or workable ranges involves only routine skill in the art. Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.
Regarding claim 5, Naiva, Riley and Flaherty teach everything claimed as applied above (see claim 2). Further, Naiva discloses (see figures 1-3) the fixed DC voltage (figure 1, part fixed DC voltage stored at 36). However, Naiva does not expressly disclose the fixed DC voltage is in the range of about 180 VDC to about 260 VDC.
Billings teaches (see figures 1-4) the fixed DC voltage (figure 3, part the fixed DC voltage at C3; +DC 150V) is in the range of about 150 VDC to about 260 VDC (figure 3, part the fixed DC voltage at C3; +DC 150V).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the boost circuit and capacitor storage unit of Naiva with the fixed DC voltage features as taught by Billings and obtain the fixed DC voltage is in the range of about 180 VDC to about 260 VDC, because it provides more accurate voltage operation in order to meet with the design requirements (column 3; lines 47-53). Furthermore, In re Aller, 105 USPQ 233 (MPEP 2144.05 (II)) discloses discovering the optimum or workable ranges involves only routine skill in the art. Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.
Regarding claim 11, claim 4 has the same limitations, based on this is rejected for the same reasons.
Regarding claim 12, claim 5 has the same limitations, based on this is rejected for the same reasons.
Regarding claim 18, claim 4 has the same limitations, based on this is rejected for the same reasons.
Regarding claim 19, claim 5 has the same limitations, based on this is rejected for the same reasons.
Claims 7, 8, 14, 15 and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Naiva et al. (US 2012/0001764), hereinafter Naiva, in view of Riley (US 2019/0080868), and further in view of Flaherty et al. (US 2012/0019971), hereinafter Flaherty, and further in view of DuBose (US 2010/0332865).
Regarding claim 7, Naiva, Riley and Flaherty teach everything claimed as applied above (see claim 2). Further, Naiva discloses (see figures 1-3) the pulse control circuit (figure 1, part pulse control circuit generated by switch between 36 and 52, 52, 56 and 60) regulates energy delivered from the capacitor storage unit (figure 1, part 36; through switch between 36 and 52) to the one or more protective relays (figure 1, part 24; through 52 and 56) (paragraphs [0019]-[0030]; The overload relay 4 further comprises a protective device in the form of a solenoid 52 which is of a latching type. In certain predefined circumstances, the processor 44 can cause the solenoid 52 to be energized by the capacitor 36). However, Naiva does not expressly disclose the pulse width modulator control circuit regulates energy delivered from the capacitor storage unit to the one or more protective relays by generating a pulse width modulated signal that is based on the current flow to the one or more protective relays.
Riley teaches (see figures 1-6) the pulse width modulator control circuit (figure 2, part pulse width modulator control circuit generated by 46) (figure 5, part pulse width modulator control circuit generated by 250 and 252) regulates energy delivered (figure 5, part through open relay driver circuit 250 and closed relay driver circuit 252) from the capacitor storage unit (figure 2, part capacitor storage unit at 44) (figure 5, part 244) to the one or more protective relays (figures 1 and 2, part bistable relay between 24 and 26) by generating a pulse width modulated signal (figure 5, part PWM signal at open relay driver circuit 250 and closed relay driver circuit 252) (paragraph [0048]; The analog circuitry (e.g., the open relay driver circuit 250 or the closed relay driver circuit 252) of the bi-stable relay control circuit 207 generates the proper pulse width for each solenoid winding, allowing the signal input to be latched in the same manner as a traditional normally open relay, but with the low continuous current consumption of a bi-stable relay).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the boost circuit and control circuit of Naiva with the boost circuit and the pulse width modulator control circuit features as taught Riley, because it provides more accurate and efficient power for proper operation of the device (paragraph [0005]).
Flaherty teaches (see figures 1-5) the pulse width modulator control circuit (figure 2, part the pulse width modulator control circuit generated by Q5, C9, R7, D8, 4, Q3, C6, D4, C10 and D5) regulates energy delivered from the capacitor storage unit (figure 2, part C5) to the one or more protective relays (figure 2, part relay K1) by generating a pulse width modulated signal (figure 2, part PWM signal input to Q5) (paragraphs [0039]-[0041] and claim 18; The pulse width modulator circuit of FIG. 2 further includes a duty cycle capacitor C6 that discharges a current to the base of the drive transistor 05 during the positive half of the AC power source... a pulse width modulator circuit configured to generate a pulse width modulated signal having a pulse width that varies responsive to an average voltage across a relay coil of the electromagnetic relay, the pulse width modulator including a voltage averaging circuit including a capacitor coupled in parallel with the relay coil).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the combination of Naiva and Riley with the PWM control circuit in the power distribution system circuit interrupting device features as taught Flaherty, because it provides more efficient control in order to obtain a protection device that is more energy efficient for power distribution system (paragraph [0043]).
DuBose teaches (see figures 1-4) the pulse width modulator control circuit (figure 4, part pulse width modulator control circuit generated by 216) regulates energy delivered (figure 4, part through on/off operation of 313) from the capacitor storage unit (figure 4, part 214) by generating a pulse width modulated signal (figure 4, part 311; output PWM at DRV) that is based on the current flow (figure 4, part current flow through R1; input to CS) (paragraph [0021]; primary circuit 210 can also be configured with modulator 216 having a Pulse Width Modulator (PWM) controller 311 and a MOSFET 313).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the combination of Naiva, Riley and Flaherty with current feedback features as taught by DuBose and obtain the pulse width modulator control circuit regulates energy delivered from the capacitor storage unit to the one or more protective relays by generating a pulse width modulated signal that is based on the current flow to the one or more protective relays, because it provides more efficient and stable switching control.
Regarding claim 8, Naiva, Riley and Flaherty teach everything claimed as applied above (see claim 2). Further, Naiva disclose