DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 12/17/2025 have been fully considered but they are not persuasive.
Applicant argues that the sign vector of Steiner is a sign vector of a codeword, and not a “sign vector associated with a plurality of LLR ratios” because Steiner separately teaches an “LLR sign”.
The Examiner asserts that the “sign vector of codeword” described by Steiner in col. 24, lines 34-45 are indeed a “sign vector associated with a plurality of LLR ratios” as would be understood by a person of ordinary skill in the art at the time the invention was filed. A sign vector is simply the vector of the signs of each LLR corresponding to each respective bit of the codeword. The “sign vector of codeword” discussed by Steiner only makes sense in this context: In other words, Steiner’s “sign vector of codeword” is the vector of the “LLR sign” of each bit.
Claim Objections
Claim 17 recites in part, “the error vector representing a difference between a codeword vector and a sign vector associated with the plurality of log likelihood ratios”. This limitation does not further limit the decoder of claim 17 because the manner of operating the device does not differentiate the claim from the prior art (MPEP 2114 II). In this case, what the error vector is intended to represent does not impart any structural change on the decoder itself, because it is merely an interpretation of the data.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 2, 4, 6, 7, 11, 12, 17, 18, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gunnam et al (US. Pat. Pub. 2010/0042896; hereinafter referred to as Gunnam) in view of Steiner et al (US. Pat. 12/050/514; hereinafter referred to as Steiner).
As per claim 1:
Gunnam teaches an apparatus, comprising:
one or more memories storing processor-executable code (Fig. 5, 504); and
one or more processors coupled with the one or more memories (Fig. 1, 120; paragraph 25) and individually or collectively operable to execute the code to cause the apparatus to:
receive a signal comprising a plurality of encoded bits (Fig. 1, y);
generate, from the signal, a plurality of log likelihood ratios of the plurality of encoded bits (Fig. 2, Lch), wherein the plurality of log likelihood ratios comprise a sign associated with the plurality of log likelihood ratios and a plurality of log likelihood ratio magnitudes associated with the plurality of log likelihood ratios (paragraph 23);
compute a plurality of syndromes (paragraph 38) based at least in part on the sign (paragraph 23; sign determines hard decision which is used to calculate syndrome according to paragraph 38 above).
Not explicitly disclosed is:
a sign vector;
compute an error vector based at least in part on the plurality of syndromes and the plurality of log likelihood ratio magnitudes; and
output a plurality of information bits based at least in part on the error vector and the sign vector.
However, Steiner in an analogous art teaches a sign vector (col. 24, lines 41-42; an updated sign vector necessarily implies an originally computed sign vector) associated with a plurality of LLRs (Fig. 14, 1410); computing an error vector (Fig. 14, 1420) based at least in part on the plurality of syndromes and the plurality of log likelihood ratio magnitudes (col. 32, lines 51-57); and outputting a plurality of information bits based at least in part on the error vector and the sign vector (Fig. 14, 1440).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to use the teachings of Gunnam to generate the LLRs of Steiner. This modification would have been obvious for one of ordinary skill in the art at the time of filing because Steiner required LLRs (Fig. 14, 141), and Gunnam teaches a method of generating the necessary LLRs (paragraph 23).
As per claim 2: Steiner further teaches the apparatus of claim 1, wherein the one or more processors are individually or collectively further operable to execute the code to cause the apparatus to: output, to a decoder, the plurality of syndromes and the plurality of log likelihood ratio magnitudes (Fig. 7, input to 711), wherein to compute the error vector, the one or more processors are individually or collectively further operable to execute the code to cause the apparatus to: compute, by the decoder, the error vector (Fig. 14, 1420) based at least in part on the plurality of syndromes and the plurality of log likelihood ratio magnitudes (col. 32, lines 51-57), and wherein, to compute the plurality of syndromes, the one or more processors are individually or collectively further operable to execute the code to cause the apparatus to: compute a product of a parity check matrix and a hard decision of the plurality of log likelihood ratios (col. 3, lines 39-41).
As per claim 4: Steiner further teaches the apparatus of claim 2, wherein the decoder is a forward error correction decoder associated with a forward error correction code used to generate the plurality of encoded bits (col. 8, lines 8-12).
As per claim 6: Gunnam further teaches the apparatus of claim 1, wherein, to compute the error vector, the one or more processors are individually or collectively operable to execute the code to cause the apparatus to: perform belief propagation (paragraph 32) on a tanner graph (Fig. 2; paragraph 34), wherein the tanner graph comprises a plurality of check nodes each corresponding to one of the plurality of syndromes (Fig. 2, m) and a plurality of variable nodes each corresponding to one of the plurality of log likelihood ratio magnitudes (Fig. 2, n).
As per claim 7: Steiner further teaches the apparatus of claim 1, wherein, to output the plurality of information bits, the one or more processors are individually or collectively operable to execute the code to cause the apparatus to: compute a codeword vector (Fig. 14, 1440), wherein the codeword vector comprises a sum of the error vector and the sign vector (col. 3, lines 52-62; the sign vector indicates the hard decision as explained by Gunnam in paragraph 23).
As per claim 11: Gunnam teaches a modem of a wireless device, comprising: one or more memories storing processor-executable code; and one or more processors coupled with the one or more memories and individually or collectively operable to execute the code to cause the modem of a wireless device to:
receive a signal comprising a plurality of encoded bits (Fig. 1, y);
generate, from the signal, a plurality of log likelihood ratios of the plurality of encoded bits (Fig. 2, Lch), wherein the plurality of log likelihood ratios comprise a sign associated with the plurality of log likelihood ratios and a plurality of log likelihood ratio magnitudes associated with the plurality of log likelihood ratios (paragraph 23);
compute a plurality of syndromes (paragraph 38) based at least in part on the sign (paragraph 23; sign determines hard decision which is used to calculate syndrome according to paragraph 38 above).
Not explicitly disclosed is:
a sign vector;
output the plurality of syndromes and the plurality of log likelihood ratio magnitudes;
obtain an error vector based at least in part on the plurality of syndromes and the plurality of log likelihood ratio magnitudes; and
output a plurality of information bits based at least in part on the error vector and the sign vector.
However, Steiner in an analogous art teaches a sign vector (col. 24, lines 41-42; an updated sign vector necessarily implies an originally computed sign vector) associated with a plurality of LLRs (Fig. 14, 1410); outputting a plurality of syndromes and log likelihood ratio magnitudes (Fig. 7, input to 711); computing an error vector (Fig. 14, 1420) based at least in part on the plurality of syndromes and the plurality of log likelihood ratio magnitudes (col. 32, lines 51-57); and outputting a plurality of information bits based at least in part on the error vector and the sign vector (Fig. 14, 1440).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to use the teachings of Gunnam to generate the LLRs of Steiner. This modification would have been obvious for one of ordinary skill in the art at the time of filing because Steiner required LLRs (Fig. 14, 141), and Gunnam teaches a method of generating the necessary LLRs (paragraph 23).
As per claim 12: Steiner further teaches the modem of a wireless device of claim 11, wherein, to output the plurality of information bits, the one or more processors are individually or collectively operable to execute the code to cause the modem of a wireless device to: compute a codeword vector (Fig. 14, 1440), wherein the codeword vector comprises a sum of the error vector and the sign vector (col. 3, lines 52-62; the sign vector indicates the hard decision as explained by Gunnam in paragraph 23).
As per claim 17: Gunnam teaches a decoder, comprising:
one or more memories storing processor-executable code (Fig. 5, 504); and
one or more processors coupled with the one or more memories (Fig. 1, 120; paragraph 25) and individually or collectively operable to execute the code to cause the decoder to:
obtain a plurality of syndromes (paragraph 38) associated with a signal and a plurality of log likelihood ratio magnitudes that correspond to a plurality of log likelihood ratios associated with the signal (paragraph 23), the signal comprising a plurality of encoded bits (Fig. 1, y), wherein the plurality of log likelihood ratios and the plurality of syndromes are associated with the plurality of encoded bits (paragraph 34).
Not explicitly disclosed is:
compute an error vector based at least in part on the plurality of syndromes and the plurality of log likelihood ratio magnitudes; and
output the error vector.
However, Steiner in an analogous art teaches computing an error vector (Fig. 14, 1420) based at least in part on the plurality of syndromes and the plurality of log likelihood ratio magnitudes (col. 32, lines 51-57); and outputting the error vector (Fig. 14, output of 1420).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to use the teachings of Gunnam to generate the LLRs of Steiner. This modification would have been obvious for one of ordinary skill in the art at the time of filing because Steiner required LLRs (Fig. 14, 141), and Gunnam teaches a method of generating the necessary LLRs (paragraph 23).
As per claim 18: Gunnam further teaches the decoder of claim 17, wherein, to compute the error vector, the one or more processors are individually or collectively operable to execute the code to cause the decoder to: perform belief propagation (paragraph 32) on a tanner graph (Fig. 2; paragraph 34), wherein the tanner graph comprises a plurality of check nodes each corresponding to one of the plurality of syndromes (Fig. 2, m) and a plurality of variable nodes each corresponding to one of the plurality of log likelihood ratio magnitudes (Fig. 2, n).
As per claim 20: Steiner further teaches the decoder of claim 17, wherein the decoder is a forward error correction decoder associated with a forward error correction code used to generate the plurality of encoded bits (col. 8, lines 8-12).
Claim(s) 3, 16, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Steiner in view of Gunnam in view of Jo et al (US Pat. Pub. 2020/0313693; hereinafter referred to as Jo) in view of Moon et al (US Pat. Pub. 2007/0086541; hereinafter referred to as Moon).
As per claim 3: Gunnam et al teach the apparatus of claim 2. Not explicitly disclosed is wherein, to output the plurality of syndromes and the plurality of log likelihood ratio magnitudes, the one or more processors are individually or collectively operable to execute the code to cause the apparatus to: output a quantity of bits that is less than a product of a code length associated with the signal and a quantization level associated with the signal, wherein the quantity of bits is based at least in part on a coding rate of the signal. However, Jo in an analogous art teaches outputting a quantity of bits (Fig. 6, 8 bits) that is less than a product of a code length (paragraph 37; n=7) and a quantization level (Fig. 6, 8 quantization levels).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to use the quantization levels of JO for determining the LLRs of Steiner. This modification would have been obvious for one of ordinary skill in the art at the time of filing because quantization of LLRs would have been necessary in Steiner, and it would have enabled the number of buffers required for error correction decoding to be reduced (paragraph 5).
Also not explicitly disclosed is the quantity of bits is based at least in part on a coding rate of the signal. However, Moon in an analogous art teaches determining LLR quantization levels using an environment factor according to a code rate (paragraphs 51-53). Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to use the environment factor of Moon to determine quantization levels. This modification would have been obvious for one of ordinary skill in the art at the time of filing because it would have allowed the decoder to adaptively operate according to various channel environments (paragraph 53).
As per claim 16: Gunnam et al teach the modem of the wireless device of claim 11. Not explicitly disclosed is wherein, to output the plurality of syndromes and the plurality of log likelihood ratio magnitudes, the one or more processors are individually or collectively operable to execute the code to cause the modem of the wireless device to: output a quantity of bits that is less than a product of a code length associated with the signal and a quantization level associated with the signal, wherein the quantity of bits is based at least in part on a coding rate of the signal. However, Jo in an analogous art teaches outputting a quantity of bits (Fig. 6, 8 bits) that is less than a product of a code length (paragraph 37; n=7) and a quantization level (Fig. 6, 8 quantization levels).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to use the quantization levels of JO for determining the LLRs of Steiner. This modification would have been obvious for one of ordinary skill in the art at the time of filing because quantization of LLRs would have been necessary in Steiner, and it would have enabled the number of buffers required for error correction decoding to be reduced (paragraph 5).
Also not explicitly disclosed is the quantity of bits is based at least in part on a coding rate of the signal. However, Moon in an analogous art teaches determining LLR quantization levels using an environment factor according to a code rate (paragraphs 51-53). Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to use the environment factor of Moon to determine quantization levels. This modification would have been obvious for one of ordinary skill in the art at the time of filing because it would have allowed the decoder to adaptively operate according to various channel environments (paragraph 53).
As per claim 19: Gunnam et al teach the decoder of claim 17. Not explicitly disclosed is wherein, to obtain the plurality of syndromes and the plurality of log likelihood ratio magnitudes, the one or more processors are individually or collectively operable to execute the code to cause the decoder to: obtain a quantity of bits that is less than a product of a code length associated with the signal and a quantization level associated with the signal, wherein the quantity of bits is based at least in part on a coding rate of the signal. However, Jo in an analogous art teaches outputting a quantity of bits (Fig. 6, 8 bits) that is less than a product of a code length (paragraph 37; n=7) and a quantization level (Fig. 6, 8 quantization levels).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to use the quantization levels of JO for determining the LLRs of Steiner. This modification would have been obvious for one of ordinary skill in the art at the time of filing because quantization of LLRs would have been necessary in Steiner, and it would have enabled the number of buffers required for error correction decoding to be reduced (paragraph 5).
Also not explicitly disclosed is the quantity of bits is based at least in part on a coding rate of the signal. However, Moon in an analogous art teaches determining LLR quantization levels using an environment factor according to a code rate (paragraphs 51-53). Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to use the environment factor of Moon to determine quantization levels. This modification would have been obvious for one of ordinary skill in the art at the time of filing because it would have allowed the decoder to adaptively operate according to various channel environments (paragraph 53).
Claim(s) 5 is rejected under 35 U.S.C. 103 as being unpatentable over Steiner in view of Gunnam in view of Bhatia et al (US. Pat. Pub. 2019/0068219; hereinafter referred to as Bhatia).
As per claim 5: Steiner et al teach the apparatus of claim 1. Not explicitly disclosed is wherein the one or more processors are individually or collectively further operable to execute the code to cause the apparatus to: output, by a decoder to a modem, the error vector, wherein, to output the plurality of information bits, the one or more processors are individually or collectively further operable to execute the code to cause the apparatus to: output, by the modem, the plurality of information bits based at least in part on the error vector. However, Bhatia in an analogous art teaches outputting to a communication interface including a modem (Fig. 9, 950; paragraph 88).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to output decoded data to a modem as taught by Bhatia. This modification would have been obvious for one of ordinary skill in the art at the time of filing because any number of suitable communication interface, including a modem (as taught by Bhatia in paragraph 88), could have been used with expected results without changing the principle of operation.
Claim(s) 8, 10, 13, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Steiner in view of Gunnam in view of Zamir et al (US. Pat. Pub. 2022/0058083; hereinafter referred to as Zamir).
As per claim 8: Gunnam et al teach the apparatus of claim 1. Not explicitly disclosed is wherein, to receive the signal comprising the plurality of encoded bits, the one or more processors are individually or collectively operable to execute the code to cause the apparatus to: receive the plurality of encoded bits comprising one or more punctured bits, wherein the sign vector is generated based at least in part on the one or more punctured bits. However, Zamir in an analogous art teaches receiving a plurality of punctured encoded bits (Fig. 4, 402), and generating a sign vector based on the punctured bits (Fig. 4, 408; paragraph 36).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to puncture the bits of Gunnam et al. This modification would have been obvious for one of ordinary skill in the art at the time of filing because puncturing would have allowed for adjusting the code rate and code length of error correcting codes and improved code performance (paragraph 3).
As per claim 10:
Zamir further teaches the apparatus of claim 8, wherein, to generate the sign vector, the one or more processors are individually or collectively operable to execute the code to cause the apparatus to: generate the sign vector, wherein one or more values of the sign vector corresponding to the one or more punctured bits are equal to a predefined value (paragraph 23).
As per claim 13: Gunnam et al teach the modem of a wireless device of claim 11, wherein, to receive the signal comprising the plurality of encoded bits, the one or more processors are individually or collectively operable to execute the code to cause the modem of a wireless device to: receive the plurality of encoded bits comprising one or more punctured bits, wherein generating the sign vector is based at least in part on the one or more punctured bits. However, Zamir in an analogous art teaches receiving a plurality of punctured encoded bits (Fig. 4, 402), and generating a sign vector based on the punctured bits (Fig. 4, 408; paragraph 36).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to puncture the bits of Gunnam et al. This modification would have been obvious for one of ordinary skill in the art at the time of filing because puncturing would have allowed for adjusting the code rate and code length of error correcting codes and improved code performance (paragraph 3).
As per claim 15: Zamir further teaches the modem of a wireless device of claim 13, wherein, to generate the sign vector, the one or more processors are individually or collectively operable to execute the code to cause the modem of a wireless device to: generate the sign vector, wherein one or more values of the sign vector corresponding to the one or more punctured bits are equal to 0 (paragraph 23).
Claim(s) 9 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Steiner in view of Gunnam in view of Zamir in view of Danjean et al (US. Pat. 10,177,787; hereinafter referred to as Danjean).
As per claim 9: Gunnam et al teach the apparatus of claim 8. Not explicitly disclosed is wherein, to generate the sign vector, the one or more processors are individually or collectively operable to execute the code to cause the apparatus to: generate, using a random value generator, one or more sign values corresponding to each of the one or more punctured bits. However, Danjean in an analogous art teaches using random values for punctured bits (col. 9, lines 27-30).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to generate sign values using a random value generator as taught by Danjean. This modification would have been obvious for one of ordinary skill in the art at the time of filing because the sign values would have determined the bit values in punctured locations (as explained by Gunnam in paragraph 23), and these value could have been made random to produce expected results without changing the principle of operation (as explained by Danjean above).
As per claim 14: Gunnam et al teach the modem of a wireless device of claim 13, wherein, to generate the sign vector, the one or more processors are individually or collectively operable to execute the code to cause the modem of a wireless device to: generate, using a random value generator, one or more sign values corresponding to each of the one or more punctured bits. However, Danjean in an analogous art teaches using random values for punctured bits (col. 9, lines 27-30).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to generate sign values using a random value generator as taught by Danjean. This modification would have been obvious for one of ordinary skill in the art at the time of filing because the sign values would have determined the bit values in punctured locations (as explained by Gunnam in paragraph 23), and these value could have been made random to produce expected results without changing the principle of operation (as explained by Danjean above).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEVE N NGUYEN whose telephone number is (571)272-7214. The examiner can normally be reached M-F 9-5.
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/STEVE N NGUYEN/Primary Examiner, Art Unit 2111
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