DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group II in the reply filed on 4/13/26 is acknowledged.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 5/15/24 has been considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 10-11 are rejected under 35 U.S.C. 102a1 as being anticipated by Lu (US 10,686,377).
With respect to claim 10, Lu discloses a voltage converter (Fig. 6 600), comprising: a boost converter (Fig. 6 602,604,608) having an input (Fig. 6 612) and an output (Fig. 6 614); a first transistor (Fig. 6 616; column 6, lines 30-31 “switch 616 may be implemented by a N-type transistor switch such as a N-type MOSFET switch.”) having a control input (Fig. 6 CL1), a first terminal (Fig. 6 612), and a second terminal (Fig. 6 610), the first terminal coupled to the input (Fig. 6 12) of the boost converter, the second terminal coupled (Fig. 6 610 coupled to 614 through 608) to the output of the boost converter; a driver (Fig. 6 620,626) having a first input (Fig. 6 636), a first output (Fig. 6 CL3), and a second output (Fig. 6 CL1), the first output coupled to the boost converter (Fig. 6 604), and the second output coupled to the control input (Fig. 6 CL1) of the first transistor; and a charge pump (Fig. 6 622,624,630) having an input (Fig. 6 6 Vbst in 630) and output (Fig. 6 636), the input of the charge pump coupled to the output (Fig. 6 614 Vbst) of the boost converter, and the output of the charge pump coupled to the first input (Fig. 6 input to 626) of the driver.
With respect to claim 11, Lu discloses the voltage converter of claim 10, wherein the first transistor is an n-channel field effect transistor (Fig. 6 616; column 6, lines 30-31 “switch 616 may be implemented by a N-type transistor switch such as a N-type MOSFET switch.”).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 10-12, 16 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Oikarinen (US 2013/0249438) in view of Lu (US 10,686,377).
With respect to claim 10, Oikarinen discloses a voltage converter (Fig. 1 100), comprising: a boost converter (Fig. 1 L,111-112) having an input (Fig. 1 105) and an output (Fig. 1 106); a first transistor (Fig. 1 Q3) having a control input (Fig. 1 gate of Q3), a first terminal (Fig. 1 105), and a second terminal (Fig. 1 106), the first terminal coupled to the input of the boost converter, the second terminal coupled to the output of the boost converter. Oikarinen remains silent as to the details of the driver.
Lu discloses a driver (Fig. 6 626, Fig. 12 1206) having a first input (Fig. 6 636), a first output (Fig.6 626 to 608), and a second output (Fig. 12 1206 output), the first output coupled to the boost converter (Fig. 6 608), and the second output coupled to the control input (Fig. 12 gate 1202) of the first transistor; and a charge pump (Fig. 6 622,624,630) having an input and output, the input (Fig. 6 Vbst of 630) of the charge pump coupled to the output of the boost converter, and the output (Fig. 6 636) of the charge pump coupled to the first input of the driver. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement a driver having a first input, a first output, and a second output, the first output coupled to the boost converter, and the second output coupled to the control input of the first transistor; and a charge pump having an input and output, the input of the charge pump coupled to the output of the boost converter, and the output of the charge pump coupled to the first input of the driver, in order to raise the gate signal of the first transistor to a voltage higher than the output voltage in order to turn on the first transistor.
With respect to claim 11, Oikarinen in view of Lu make obvious the voltage converter of claim 10, wherein the first transistor is an n-channel field effect transistor (Fig. 1 Q3).
With respect to claim 12, Oikarinen in view of Lu make obvious the voltage converter of claim 10, wherein: the boost converter has a high side (HS) transistor (Fig. 1 Q2) and a low side (LS) transistor (Fig. 1 Q1), the HS transistor having a control input (Fig. 1 gate of Q2) coupled to the first output (Lu Fig. 6 output of 626) of the driver; the driver has a second input (as in Lu Fig. 20 CL4’ ; Fig. 12 CL1) and a third input (Fig. 1 BYPASS), the driver configured to: in response to a first control signal (Fig. 1 gate signal to Q2) at the second input being at a first logic state (Fig. 1 Q2 ON) and a second control signal (Fig. 1 BYPASS) at the third input being at a second logic state (Fig. 1 BYPASS OFF), turn on the HS transistor and turn off the first transistor; and in response to the first control signal being at a second logic state (Fig. 1 Q2 OFF) and the second control signal being at the first logic state (Fig. 1 BYPASS ON), turn on the first transistor and turn off the HS transistor.
With respect to claims 16 and 18, Oikarinen in view of Lu make obvious the voltage converter as set forth above. See claims 10,12 and 11, respectively, for additional details.
Claim(s) 13 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Oikarinen (US 2013/0249438) in view of Lu (US 10,686,377) and further in view of Oporta (US 11,606,031).
With respect to claim 13, Oikarinen in view of Lu make obvious the voltage converter of claim 12 as set forth above, and do not detail the driver at the transistor level, which was well known before the effective filing date of the claimed invention.
Oporta discloses wherein the driver comprises: a first transistor (Fig. 4 Q9) having a first terminal (Fig. 4 Q9 source) and a second terminal (Fig. 4 Q9 drain); a second transistor (Fig. 4 Q6) having a first terminal (Fig. 4 Q6 source) and a second terminal (Fig. 4 Q6 drain), the first terminal of the second transistor coupled to the first terminal of the first transistor; and a third transistor (Fig. 4 Q7) having a first terminal (Fig. 4 Q7 source) and a second terminal (Fig. 4 Q7 drain), the second terminal of the third transistor coupled to the second terminal of the second transistor. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement wherein the driver comprises: a first transistor having a first terminal and a second terminal; a second transistor having a first terminal and a second terminal, the first terminal of the second transistor coupled to the first terminal of the first transistor; and a third transistor having a first terminal and a second terminal, the second terminal of the third transistor coupled to the second terminal of the second transistor, in order to implement the driver with the required gate driving characteristics.
With respect to claim 19, Oikarinen in view of Lu and Oporta make obvious the voltage converter as set forth above. See claims 13 for additional details.
Allowable Subject Matter
Claims 14-15, 17 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter:
With respect to claim 14, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily, wherein the first transistor has a control input, the second transistor has a control input, and the third transistor has a control input, and the voltage converter further comprising: a level shifter having an input coupled to the third input of the driver, and having first, second, and third outputs coupled to respective control inputs of the first, second, and third transistors.
Claim 20 is indicated as possessing allowable subject matter primarily for the same reasons as claim 14 above.
With respect to claim 15, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily, a logic circuit having a first input, a second input, and an output, the first input of the logic circuit coupled to the second input of the driver, the second input of the logic circuit coupled to the third input of the driver; and a capacitor having a first terminal and a second terminal, the first terminal of the capacitor coupled to the first terminal of the first transistor and to the first terminal of the second transistor, and the second terminal of the capacitor coupled to the output of the logic circuit.
With respect to claim 17, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily, wherein: the driver includes a capacitor; and the charge pump is configured to charge the capacitor while turning on the first transistor.
The aforementioned limitations in combination with all remaining limitations of the respective claims are believed to render the aforementioned indicated claim and any dependent claims thereof patentable over the art of record.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Murtojarvi (US 2008/0278136) discloses a voltage converter with a boost converter and bypass switch in Figure 2.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HARRY RAYMOND BEHM whose telephone number is (571)272-8929. The examiner can normally be reached M-F: 8-5 EST.
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/HARRY R BEHM/Primary Examiner, Art Unit 2838
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