DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 04/24/2026 has been entered.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1, 9, and 16 have been considered but are moot in view of the new grounds of rejection necessitated by the amendment to the claims.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claim 1, 6, 7 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims (4 and 5), 4, and 5 of U.S. Patent No. 12022216. Although the claims at issue are not identical, they are not patentably distinct from each other because the instant application claims are generally broader than the patent claims. Note that a potential of a contact point between the drain of the MOS transistor and the high-impedance element is output as a signal indicating an overlight amount detection result (patent claim 1), the overlight amount detection result is output to a counter (patent claim 4) or a comparator (patent claim 5).
Claim 9 is rejected on the ground of nonstatutory double patenting as being unpatentable over claims (4 and 5) of U.S. Patent No. 12022216. Although the claims at issue are not identical, they are not patentably distinct from each other because the instant application claim is generally broader than the patent claims with the exception of reciting an element substrate in which a photoelectric conversion unit is provided; and a circuit board, wherein the circuit board includes an overlight amount detection circuit. Official Notice is taken that it was well known before the effective filing date of the claimed invention to include using semiconductor image sensor substrate for photoelectric conversion units and circuit boards for processing image sensor signals. This is advantageous in that integrated circuits can be used to minimize circuit design. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include using semiconductor image sensor substrate for photoelectric conversion units and circuit boards for processing image sensor signals. Note that the overlight amount detection circuit is a circuit for processing sensor signals and that the patent claim contains the overlight amount detection circuit. Note that a potential of a contact point between the drain of the MOS transistor and the high-impedance element is output as a signal indicating an overlight amount detection result (patent claim 1), the overlight amount detection result is output to a counter (patent claim 4) or a comparator (patent claim 5).
Claim 16 is rejected on the ground of nonstatutory double patenting as being unpatentable over claims (4 and 5) of U.S. Patent No. 12022216. Although the claims at issue are not identical, they are not patentably distinct from each other because the instant application claim is generally broader than the patent claims with the exception of reciting an optical system; a photoelectric conversion unit that photoelectrically converts light incident through the optical system; a signal processing circuit that signal-processes a signal charge into which the light is photoelectrically converted by the photoelectric conversion unit. Official Notice is taken that it was well known before the effective filing date of the claimed invention to include an optical system; a photoelectric conversion unit that photoelectrically converts light incident through the optical system; a signal processing circuit that signal-processes a signal charge into which the light is photoelectrically converted by the photoelectric conversion unit. This is advantageous in that focusing images can be captured and stored for later retrieval. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include an optical system; a photoelectric conversion unit that photoelectrically converts light incident through the optical system; a signal processing circuit that signal-processes a signal charge into which the light is photoelectrically converted by the photoelectric conversion unit. Note that a potential of a contact point between the drain of the MOS transistor and the high-impedance element is output as a signal indicating an overlight amount detection result (patent claim 1), the overlight amount detection result is output to a counter (patent claim 4) or a comparator (patent claim 5).
Allowable Subject Matter
Claims 2-5, 8, and 10-13 and 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 2, no prior art could be located that teaches or fairly suggests high-impedance element is a capacitor, in combination with the rest of the limitations of the claim and parent claim.
Regarding claim 3, no prior art could be located that teaches or fairly suggests high-impedance element is a resistor, in combination with the rest of the limitations of the claim and parent claim.
Regarding claim 4, no prior art could be located that teaches or fairly suggests imaging element of the image sensor is an electron sensor that converts incident light into electrons, and the MOS transistor is an N-channel MOS transistor, in combination with the rest of the limitations of the claim and parent claim.
Regarding claim 5, no prior art could be located that teaches or fairly suggests imaging element of the image sensor is a hall sensor that converts incident light into holes, and the MOS transistor is a P-channel MOS transistor, in combination with the rest of the limitations of the claim and parent claim.
Regarding claim 8, no prior art could be located that teaches or fairly suggests wherein when it is detected that light is received in an overlight amount, a dummy potential signal is output to the comparator instead of the potential of the vertical signal line, in combination with the rest of the limitations of the claim and parent claim.
Regarding claim 10, no prior art could be located that teaches or fairly suggests circuit board includes: a transfer transistor of which a source is connected to the photoelectric conversion unit; a reset transistor of which a source is connected to a drain of the transfer transistor; and an amplification transistor of which a gate is connected to the drain of the transfer transistor, in combination with the rest of the limitations of the claim and parent claim.
Claims 11-13 depend on claim 10 and therefore are objected to.
Regarding claim 15, no prior art could be located that teaches or fairly suggests a counter connected to the comparator, in combination with the rest of the limitations of the claim and parent claim.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NICHOLAS G GILES whose telephone number is (571)272-2824. The examiner can normally be reached M-F 6:45AM-3:15PM EST (HOTELING).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Twyler Haskins can be reached at 571-272-7406. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/NICHOLAS G GILES/ Primary Examiner, Art Unit 2639
Prosecution Insights