DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 and 2 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Park et al (2009/0207895).
-Regarding claim 1, Park et al teaches data alignment system (101) (see figure 2) comprising:
a bit alignment detector (132) configured to detect bit-wise alignment of a plurality of transmission signals (Rx-D1, Rx_D2,…, Rx_Dn) provided from a respective plurality of transmit channels (indicated by a respective plurality of parallel transmission paths between (101) and (201)) based on a receiver signal (being/comprising component signals (RxD-D1, RxD_D2,…, RxD_Dn) provided by a remote receiver (201),
wherein the bit alignment detection is occurred when respective bits (“d0”, [0085]) of the plurality of transmission signals are in synchronized with the rising edge of a frame clock signal (clk_f) (referred to the rising edge of the frame clock signal clk_f “, [0085]), (see [0062-0070, 0085]),
wherein the transmission signals being combined to generate the receiver signal via a data combiner in the remote receiver, in a manner that the transmission signals are configured for one data frame (“one data frame”, [0077]), and the transmission signals are combined, via a data combiner/controller (20-1,.., 20-n, 210) of the remote receiver, into the received signal as a data signal (“data signal”,[0054]) to be stored in the remote receiver at a write address (“address signal”, [0054]), (see [0054, 0077]);
a data alignment detector (140) configured to detect alignment (being a frame alignment) of data in each of the transmission signals (see [0049, 0061, 0085]); and
a delay controller (132, 120-1,…, 120-n) configured to provide at least one delay signal (C1,… and/or Cn) to at least one of the transmit channels to selectively delay a respective at least one of the transmission signals in response to at least one of the bit alignment detector failing to detect the bit-wise alignment of the transmission signals (indicated by results of (lock_sig)) and the data alignment detector failing to detect alignment of the data in each of the transmission signals (indicated by results of (err)) (see [0047-0049, 0062-0070, 0085]).
-Regarding claim 2, Park et al teaches that each of the transmission signals has a predetermined logic pattern (“predetermined pattern”, [0046]), wherein the bit alignment detector is configured to detect the predetermined logic pattern in the receiver signal to detect the bit-wise alignment of the transmission signals (see [0046, 0080, 0085]).
Allowable Subject Matter
Claims 11-20 are allowed.
Claims 3-10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PHUONG M PHU whose telephone number is (571)272-3009. The examiner can normally be reached 8:00-16:00.
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/PHUONG PHU/
Primary Examiner
Art Unit 2632
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