DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is in response to the original application filed on May 17th, 2024.
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. JP2023-087411, filed on May, 29th, 2023.
Specification Objection - Title
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Specification Objection - Specification
The disclosure is objected to because of the following informalities:
[0015] recites a typo, “The neural network structure proposal device according to the present invention includes operational efficiency analysis means for calculating, for each of a plurality of layers of a neural network having different parameters, an estimated amount of execution time of the layer and operational efficiency corresponding to the computation amount per unit time on ae target device, and layer structure replacing means for replacing the layer with the large estimated amount of execution time and low operational efficiency with another layer, and outputting neural network structure information indicating structure of the neural network.” (Emphasis added).
[0093] recites a typo, “A neural network structure proposal device, comprising: operational efficiency analysis means for calculating, for each of a plurality of layers of a neural network having different parameters, an estimated amount of execution time of the 5 layer and operational efficiency corresponding to the computation amount per unit time on ae target device, and …” (Emphasis added)
Appropriate correction is required.
Claim Objections
Claims 2, 12, and 14 are objected to because of the following informalities:
Claim 2 recites, “wherein the one or more processors are configured to execute the software instructions to attempt to replace the layer for which the operational efficiency is below a threshold in descending order of of the estimated amount of execution time.” (Emphasis added). As highlighted, the claim recites repeated words, which appears to be unintentional.
Claim 12 recites, “wherein the computer attempts to replace the layer for which the operational efficiency is below a threshold in descending order of of the estimated amount of execution time.” As highlighted, the claim recites repeated words, which appears to be unintentional.
Claim 14 recites, “wherein the neural network structure proposal program causes the computer to execute attempting to replace the layer for which the operational efficiency is below a threshold in descending order of of the estimated amount of execution time.” As highlighted, the claim recites repeated words, which appears to be unintentional.
Appropriate correction is required.
Claim Rejections - 35 USC § 101 – Software per se
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 13 and 14 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. The claim does not fall within at least one of the four categories of patent eligible subject matter.
Claim 13 recites:
“storage medium for storing a neural network structure proposal”
“neural network structure proposal program”
Claim 14 recites:
“neural network structure proposal program”
The submitted specification recites, “It can also be assumed that the neural network structure proposal program is stored in a temporary computer readable medium. In that case, the neural network structure proposal program is transferred to the memory 1003, for example, through a wired or wireless communication channel, i.e., through electric signals, optical signals, or electromagnetic waves.” (pp. 15, [0086], Lns. 26-29). The specification states the proposed system could be in a non-physical or non-tangible form, such as a computer program. Therefore, these claims would not fall under the four categories of patent eligible subject matter per MPEP 2106.03(I) which states, “The other three categories (machines, manufactures and compositions of matter) define the types of physical or tangible "things" or "products" that Congress deemed appropriate to patent. […] Thus, when determining whether a claimed invention falls within one of these three categories, examiners should verify that the invention is to at least one of the following categories and is claimed in a physical or tangible form. […] Non-limiting examples of claims that are not directed to any of the statutory categories include: Products that do not have a physical or tangible form, such as information (often referred to as "data per se") or a computer program per se (often referred to as "software per se") when claimed as a product without any structural recitations;”.
Claim Rejections - 35 USC § 101 – Abstract Idea
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-14 are rejected under 35 U.S.C 101 because the claimed invention is directed to an abstract idea without significantly more. The analysis of the claims will follow the 2019 Revised Patent Subject Matter Eligibility Guidance, 84 Fed. Reg. 50 (“2019 PEG”).
Claim 1
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
Claim 1 recites, "A neural network structure proposal device, comprising:
a memory storing a software instruction, and" therefore it is directed to the statutory category of a machine.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“calculate, for each of multiple layers of a neural network having different parameters, an estimated amount of execution time of the layer and operational efficiency of the layer corresponding to a computation amount per unit time on a target device, and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate and observe a computers processing time and operational efficiency of a function using generic computer functions or with the assistance of pen and paper. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “A neural network structure proposal device, comprising: a memory storing a software instruction, and” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“replace the layer with the large estimated amount of execution time and low operational efficiency with another layer, and output neural network structure information indicating structure of the neural network.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “A neural network structure proposal device, comprising: a memory storing a software instruction, and” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“replace the layer with the large estimated amount of execution time and low operational efficiency with another layer, and output neural network structure information indicating structure of the neural network.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 2
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein the one or more processors are configured to execute the software instructions to attempt to replace the layer for which the operational efficiency is below a threshold in descending order of of the estimated amount of execution time.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein the one or more processors are configured to execute the software instructions to attempt to replace the layer for which the operational efficiency is below a threshold in descending order of of the estimated amount of execution time.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 3
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein the one or more processors are configured to execute the software instruction to calculate the estimated amount of execution time and the operational efficiency for input neural network structure information.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to observe and evaluate a devices processing time using generic computer functions. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 4
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein the one or more processors are configured to execute the software instruction to calculate the estimated amount of execution time and the operational efficiency for input neural network structure information.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to observe and evaluate a devices processing time using generic computer functions. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 5
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“the one or more processors are configured to execute the software instruction to calculate the estimated amount of execution time with reference to the execution time in the target device characteristic information.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to observe and evaluate a devices processing time using generic computer functions with given device parameters. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “comprising a first storage that stores target device characteristic information including at least information indicating the execution time of each layer in the target device, wherein” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “comprising a first storage that stores target device characteristic information including at least information indicating the execution time of each layer in the target device, wherein” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 6
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“the one or more processors are configured to execute the software instruction to calculate the estimated amount of execution time with reference to the execution time in the target device characteristic information.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to observe and evaluate a devices processing time using generic computer functions with given device parameters. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “comprising a first storage that stores target device characteristic information including at least information indicating the execution time of each layer in the target device, wherein” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “comprising a first storage that stores target device characteristic information including at least information indicating the execution time of each layer in the target device, wherein” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 7
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “comprising a second storage that stores layer replacement candidate information represented by a replacement condition consisting of a set of pairs of a replacement condition consisting of conditions for one or more parameters and replacement parameter information representing parameters after the change, wherein” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“the one or more processors are configured to execute the software instruction to replace the layer with reference to the layer replacement candidate information.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “comprising a second storage that stores layer replacement candidate information represented by a replacement condition consisting of a set of pairs of a replacement condition consisting of conditions for one or more parameters and replacement parameter information representing parameters after the change, wherein” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“the one or more processors are configured to execute the software instruction to replace the layer with reference to the layer replacement candidate information.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 8
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “comprising a second storage that stores layer replacement candidate information represented by a replacement condition consisting of a set of pairs of a replacement condition consisting of conditions for one or more parameters and replacement parameter information representing parameters after the change, wherein” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“the one or more processors are configured to execute the software instruction to replace the layer with reference to the layer replacement candidate information.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “comprising a second storage that stores layer replacement candidate information represented by a replacement condition consisting of a set of pairs of a replacement condition consisting of conditions for one or more parameters and replacement parameter information representing parameters after the change, wherein” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“the one or more processors are configured to execute the software instruction to replace the layer with reference to the layer replacement candidate information.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 9
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein the one or more processors are configured to execute the software instructions to replace the layer in the neural network structure with a layer such that a similarity between a structure of the layer before replacement and the structure of the layer after replacement satisfies a predetermined decision condition.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein the one or more processors are configured to execute the software instructions to replace the layer in the neural network structure with a layer such that a similarity between a structure of the layer before replacement and the structure of the layer after replacement satisfies a predetermined decision condition.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 10
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein the one or more processors are configured to execute the software instructions to replace the layer in the neural network structure with a layer such that a similarity between a structure of the layer before replacement and the structure of the layer after replacement satisfies a predetermined decision condition.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein the one or more processors are configured to execute the software instructions to replace the layer in the neural network structure with a layer such that a similarity between a structure of the layer before replacement and the structure of the layer after replacement satisfies a predetermined decision condition.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 11
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
Claim 11 recites, "A neural network structure proposal method implemented in a computer, comprising:" therefore it is directed to the statutory category of a process.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“calculating, or each of multiple layers of a neural network having different parameters, an estimated amount of execution time of the layer and operational efficiency of the layer corresponding to a computation amount per unit time on a target device, and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate and observe a computers processing time and operational efficiency of a function using generic computer functions or with the assistance of pen and paper. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “replacing the layer with the large estimated amount of execution time and low operational efficiency with another layer, and output neural network structure information indicating structure of the neural network.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “replacing the layer with the large estimated amount of execution time and low operational efficiency with another layer, and output neural network structure information indicating structure of the neural network.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 12
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein the computer attempts to replace the layer for which the operational efficiency is below a threshold in descending order of of the estimated amount of execution time.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein the computer attempts to replace the layer for which the operational efficiency is below a threshold in descending order of of the estimated amount of execution time.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 13
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
This claim is not directed to one of the four categories of statutory subject matter per MPEP 2106.03(I). However, for compact prosecution, the examiner will interpret this claim as falling under one of the four categories to further evaluate the claim using the Alice/Mayo test.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“calculating, or each of multiple layers of a neural network having different parameters, an estimated amount of execution time of the layer and operational efficiency of the layer corresponding to a computation amount per unit time on a target device, and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate and observe a computers processing time and operational efficiency of a function using generic computer functions or with the assistance of pen and paper. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “replacing the layer with the large estimated amount of execution time and low operational efficiency with another layer, and output neural network structure information indicating structure of the neural network.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “replacing the layer with the large estimated amount of execution time and low operational efficiency with another layer, and output neural network structure information indicating structure of the neural network.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 14
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
This claim is not directed to one of the four categories of statutory subject matter per MPEP 2106.03(I). However, for compact prosecution, the examiner will interpret this claim as falling under one of the four categories to further evaluate the claim using the Alice/Mayo test.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein the neural network structure proposal program causes the computer to execute attempting to replace the layer for which the operational efficiency is below a threshold in descending order of of the estimated amount of execution time” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein the neural network structure proposal program causes the computer to execute attempting to replace the layer for which the operational efficiency is below a threshold in descending order of of the estimated amount of execution time” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-14 are rejected under 35 U.S.C. 103 as being unpatentable over Tatsumi et al, (Tatsumi et al, “STRUCTURE TRANSFORMATION DEVICE, STRUCTURE TRANSFORMATION METHOD, AND COMPUTER READABLE MEDIUM”, US 20220309351 A1, Filed Jun. 14th, 2022, hereinafter “Tatsumi”) in view of Zhang et al, (Zhang et al, “Fast Hardware-Aware Neural Architecture Search”, 2020, hereinafter “Zhang”).
Regarding claim 1, Tatsumi discloses, “A neural network structure proposal device, comprising: a memory storing a software instruction, and one or more processors configured to execute the software instruction to” (Description of Embodiment, pp. 1, [0018]-[0020]; “With reference to FIG. 1, an example of a hardware configuration of a structure transformation device 10 according to Embodiment 1 will be described. The structure transformation device 10 is a computer to transform a structure of a neural network. The structure transformation device 10 includes a processor 11, a storage device 12, and a computing unit 13 for learning, as hardware. The processor 11 is connected to other hardware through signal lines so as to control the other hardware.” The system proposed in this article contains processors connected to memory systems to execute the program stored in system memory, see Fig. 1)
“calculate, for each of multiple layers of a neural network having different parameters, an estimated amount of execution time of the layer and operational efficiency of the layer corresponding to a computation amount per unit time on a target device, and” (Description of Embodiments, pp. 3, [0065]-[0066]; “The processing time calculation unit 221 calculates processing time for the entire neural network by totaling the processing time to be taken by processing for every layer configuring the neural network, as expressed by expression 1. [See Expression 1]. The processing time calculation unit 221 sets each of the plurality of layers configuring the neural network as an object layer and calculates processing time for the object layer by dividing a computation amount for the object layer by computational performance of the implementation destination computing unit, as expressed by expression 2. [See Expression 2]” This system is able to calculate the processing time of each layer of a neural network. This also teaches that the computation amount of each layer is evaluated based on the performance of the layers on the destination computing unit.) and (Description of Embodiments, pp. 4, [0075]; “The shortening efficiency calculation unit 223 calculates shortening efficiency for the object layer. The shortening efficiency is a ratio of a shortening amount in the processing time, to be taken in case where a reduction by the reduction number y of parameters is made, to the current parameter reduction rate
∆
α
x
2
” This system is able to evaluate a model’s efficiency and accuracy on given hardware. This process is performed to determine a quantitative value to reduce the network by for the given hardware.)
Tatsumi fails to explicitly disclose:
“replace the layer with the large estimated amount of execution time and low operational efficiency with another layer, and output neural network structure information indicating structure of the neural network.”
However, Zheng discloses, “replace the layer with the large estimated amount of execution time and low operational efficiency with another layer,” (Hardware-aware Search Space Generation, pp. 4; “To reduce the cost while improving the search space efficiency, we propose a layer wise hardware aware search space generation approach to generate specialized search space for every target hardware platform. Unlike the previous methods that apply same operators for all layers, we select the most efficient operators for every layer by real hardware deployment score. We benchmark all the 32 operators’ layer-by-layer and sort each layers’ candidate operators in non-increasing order of their scores in Equation 2: [see Equation (2)].” This article discloses a process of replacing and testing different layers and structures for a neural network on the given hardware. Each layer can be replaced with a different operator, see Table 2.)
“and output neural network structure information indicating structure of the neural network.” (Two-Stage NAS Acceleration, pp. 5; “Second, Stage2 starts with the new winning architecture awin1 and searches for earlier t layers. The later n−t layers are fixed to the corresponding layer operator of awin1 and the earlier t layers are active for another one-shot search. Stage2 returns the final architecture awin2.” This process will evaluate the modifications to the network and output the final architecture awin2.)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application to combine Tatsumi and Zheng. Tatsumi teaches a system that is able to modify a machine learning model to execute on a given computing device and further optimize the model for the computing device. Zheng teaches a system that is able to evaluate a computing device and generate, or modify, a machine learning model to execute on the given computing device and further optimize the model for that device. One of ordinary skill would have motivation to combine systems that are able to consider the hardware, which the model will be applied to, and generate, or modify, a machine learning model and optimize that model for a target computing device, “On all search spaces, our proposed method could achieve not only higher accuracy but also less search cost for the target hardware under the latency constraint. In addition, only one step search (Stage1) of HURRICANE could achieve a comparable top- 1 accuracy (with an average of 0.23% loss), but the number of training iterations is significantly reduced (60%-77.5%). This indicates that operators in later CNN layers are more critical for final accuracy.” (Zheng, Effectiveness of Two-Stage Search Algorithm, pp. 8).
Regarding claim 2, Tatsumi discloses, “wherein the one or more processors are configured to execute the software instructions to attempt to replace the layer for which the operational efficiency is below a threshold in descending order of of the estimated amount of execution time.” (Description of Embodiments, pp. 2, [0049]; “The structure transformation unit 225 of the analysis unit 22 identifies a layer whose evaluated value calculated in step S14 is the highest, as a reduction layer. That is, the structure transformation unit 225 identifies the layer having the highest reduction priority, as the reduction layer. [0050] Then, the structure transformation unit 225 makes a reduction by a reduction number of parameters in the reduction layer.” This system will evaluate the different layers of a network and identify the layers which have the highest priority for reduction. This teaches a system which evaluates and ranks layers and stores the results in a data structure where a computed layer can be selected based on given criteria.) and (Description of Embodiments, pp. 2, [0040]; “The processing time calculation unit 221 of the analysis unit 22 refers to the structural information 31 and the performance information 32 and calculates processing time to be taken for a recognition process by the neural network in case where the neural network is implemented in the implementation destination computing unit.” The information from the transformation unit is used along with the time calculation unit to alter and replace values of a neural network to optimize a model for given hardware.)
Regarding claim 3, Tatsumi discloses, “wherein the one or more processors are configured to execute the software instruction to calculate the estimated amount of execution time and the operational efficiency for input neural network structure information.” (Description of Embodiments, pp. 3, [0065]; “The processing time calculation unit 221 calculates processing time for the entire neural network by totaling the processing time to be taken by processing for every layer configuring the neural network, as expressed by expression 1. [See Expression 1]” This system uses a time calculation unit that is able to evaluate and calculate the processing time of layer of a neural network.) and (Description of Embodiments, pp. 4, [0075]; “The shortening efficiency calculation unit 223 calculates shortening efficiency for the object layer. The shortening efficiency is a ratio of a shortening amount in the processing time, to be taken in case where a reduction by the reduction number y of parameters is made, to the current parameter reduction rate
∆
α
x
2
.” This system is able to evaluate the efficiency of a layer, which is later used to determine the reductions which can be performed on given layers.)
Regarding claim 4, Tatsumi discloses, “wherein the one or more processors are configured to execute the software instruction to calculate the estimated amount of execution time and the operational efficiency for input neural network structure information.” (Description of Embodiments, pp. 3, [0065]; “The processing time calculation unit 221 calculates processing time for the entire neural network by totaling the processing time to be taken by processing for every layer configuring the neural network, as expressed by expression 1. [See Expression 1]” This system uses a time calculation unit that is able to evaluate and calculate the processing time of layer of a neural network.) and (Description of Embodiments, pp. 4, [0075]; “The shortening efficiency calculation unit 223 calculates shortening efficiency for the object layer. The shortening efficiency is a ratio of a shortening amount in the processing time, to be taken in case where a reduction by the reduction number y of parameters is made, to the current parameter reduction rate
∆
α
x
2
.” This system is able to evaluate the efficiency of a layer, which is later used to determine the reductions which can be performed on given layers.)
Regarding claim 5, Tatsumi discloses, “comprising a first storage that stores target device characteristic information including at least information indicating the execution time of each layer in the target device, wherein” (Description of Embodiments, pp. 1, [0022]; “The storage device 12 is a device to store data. Specific examples of the storage device 12 are RAM (Random Access Memory), ROM (Read Only Memory), and HDD (Hard Disk Drive).” This system consists of processors which are connected to storage devices and processing units. The instructions would be stored on the memory device. During runtime of this article the processing time of each layer is calculated and would be stored in system memory for later evaluation.)
“the one or more processors are configured to execute the software instruction to calculate the estimated amount of execution time with reference to the execution time in the target device characteristic information.” (Description of Embodiments, pp. 2, [0040]; “The processing time calculation unit 221 of the analysis unit 22 refers to the structural information 31 and the performance information 32 and calculates processing time to be taken for a recognition process by the neural network in case where the neural network is implemented in the implementation destination computing unit.” This system is able to calculate the processing time of each layer in a neural network. This system uses information from the computing unit, which would be the target device, to optimize a given model for the hardware.) and (Description of Embodiments, pp. 2, [0028]; “The structure transformation device 10 uses structural information 31, performance information 32, requirement information 33, and a data set 34 for learning, as input, and outputs new structural information 35 transformed from the structural information 31.” As stated above the system uses information from different sources including structural information of the computing device.)
Regarding claim 6, Tatsumi discloses, “comprising a first storage that stores target device characteristic information including at least information indicating the execution time of each layer in the target device, wherein” (Description of Embodiments, pp. 1, [0022]; “The storage device 12 is a device to store data. Specific examples of the storage device 12 are RAM (Random Access Memory), ROM (Read Only Memory), and HDD (Hard Disk Drive).” This system consists of processors which are connected to storage devices and processing units. The instructions would be stored on the memory device. During runtime of this article the processing time of each layer is calculated and would be stored in system memory for later evaluation.)
“the one or more processors are configured to execute the software instruction to calculate the estimated amount of execution time with reference to the execution time in the target device characteristic information.” (Description of Embodiments, pp. 2, [0040]; “The processing time calculation unit 221 of the analysis unit 22 refers to the structural information 31 and the performance information 32 and calculates processing time to be taken for a recognition process by the neural network in case where the neural network is implemented in the implementation destination computing unit.” This system is able to calculate the processing time of each layer in a neural network. This system uses information from the computing unit, which would be the target device, to optimize a given model for the hardware.) and (Description of Embodiments, pp. 2, [0028]; “The structure transformation device 10 uses structural information 31, performance information 32, requirement information 33, and a data set 34 for learning, as input, and outputs new structural information 35 transformed from the structural information 31.” As stated above the system uses information from different sources including structural information of the computing device.)
Regarding claim 7, Zhang discloses, “comprising a second storage that stores layer replacement candidate information represented by a replacement condition consisting of a set of pairs of a replacement condition consisting of conditions for one or more parameters and replacement parameter information representing parameters after the change, wherein” (Methodology, pp. 3; “In this paper, HURRICANE aims to search the following architectures for a given hardware platform h (any of CPU, DSP, NPU, VPU, etc.) and the latency constant
T
c
(
h
)
: [See Equation (1)]” This system is able to execute on different hardware which contain their own memory sources, which can be separate from the primary memory source.) and (Hardware-aware Search Space, pp. 3; “In our experiment, FLOPs and memory access cost of an operator leverage different impacts to the latency on three hardware platforms. As a result, our pool contains up to 32 operators (detailed in Table 2) with different levels of computation and memory complexity. They are built upon the following 4 basic structures from current efficient models:” This system discloses the use of different layers which can contain different blocks used to generate a network for the given hardware) and (Hardware-aware Search Space, pp. 4; “Since exploring operator is mainly for better accuracy, its score could be not so top ranked. For our backbone network (shown in Table 1), it is natural to add the exploring operator to the last 4 layers because of their smallest feature map size.” As seen in table 1 and 2, the layers consist of different components and can be used to generate optimized models for a given hardware. The tables represent the different layers paired with the structure of the layer and its requirements.)
“the one or more processors are configured to execute the software instruction to replace the layer with reference to the layer replacement candidate information.” (Hardware-aware Search Space, pp. 4; “In summary, we construct three different search spaces for our hardware platforms as shown in Table 1. For every specialized search space, it contains n = 20 learnable layers, and each layer can choose from 4 or 5 candidate operators from the Table 1. Each search space contains 416 × 54
≈
2 × 1013 possible architectures, which is approximately twice the size of SPOS’s search space.” This system is able to replace layers with other layers based on the given information. This model will have a set of layer structures to choose from, see Table 2, and is able to swap different layer structure for another.)
Regarding claim 8, Zheng discloses, “comprising a second storage that stores layer replacement candidate information represented by a replacement condition consisting of a set of pairs of a replacement condition consisting of conditions for one or more parameters and replacement parameter information representing parameters after the change, wherein” (Methodology, pp. 3; “In this paper, HURRICANE aims to search the following architectures for a given hardware platform h (any of CPU, DSP, NPU, VPU, etc.) and the latency constant
T
c
(
h
)
: [See Equation (1)]” This system is able to execute on different hardware which contain their own memory sources, which can be separate from the primary memory source.) and (Hardware-aware Search Space, pp. 3; “In our experiment, FLOPs and memory access cost of an operator leverage different impacts to the latency on three hardware platforms. As a result, our pool contains up to 32 operators (detailed in Table 2) with different levels of computation and memory complexity. They are built upon the following 4 basic structures from current efficient models:” This system discloses the use of different layers which can contain different blocks used to generate a network for the given hardware) and (Hardware-aware Search Space, pp. 4; “Since exploring operator is mainly for better accuracy, its score could be not so top ranked. For our backbone network (shown in Table 1), it is natural to add the exploring operator to the last 4 layers because of their smallest feature map size.” As seen in table 1 and 2, the layers consist of different components and can be used to generate optimized models for a given hardware. The tables represent the different layers paired with the structure of the layer and its requirements.)
“the one or more processors are configured to execute the software instruction to replace the layer with reference to the layer replacement candidate information.” (Hardware-aware Search Space, pp. 4; “In summary, we construct three different search spaces for our hardware platforms as shown in Table 1. For every specialized search space, it contains n = 20 learnable layers, and each layer can choose from 4 or 5 candidate operators from the Table 1. Each search space contains 416 × 54
≈
2 × 1013 possible architectures, which is approximately twice the size of SPOS’s search space.” This system is able to replace layers with other layers based on the given information. This model will have a set of layer structures to choose from, see Table 2, and is able to swap different layer structure for another.)
Regarding claim 9, Zheng discloses, “wherein the one or more processors are configured to execute the software instructions to replace the layer in the neural network structure with a layer such that a similarity between a structure of the layer before replacement and the structure of the layer after replacement satisfies a predetermined decision condition.” (Hardware-aware Search Space, pp. 4; “To reduce the cost while improving the search space efficiency, we propose a layer wise hardware aware search space generation approach to generate specialized search space for every target hardware platform. Unlike the previous methods that apply same operators for all layers, we select the most efficient operators for every layer by real hardware deployment score. We benchmark all the 32 operators’ layer-by-layer and sort each layers’ candidate operators in non-increasing order of their scores in Equation 2: [See Equation (2)] where Fop and Pop are the FLOPs count and number of parameters of operator op respectively,
l
i
a
=
o
p
means architecture a whose i-th learnable layer is op. Parameter α is non-negative constant. The score of candidate operator op at the i-th learnable layer
(
s
c
o
r
e
o
p
(
i
)
)
considers both representation capacity (approximately) and real hardware performance.” This system is able to replace network layers based on an evaluations and scores. The model will replace a given layer or operators based on an evaluation, which is interpreted to a decision condition.)
Regarding claim 10, Zheng discloses, “wherein the one or more processors are configured to execute the software instructions to replace the layer in the neural network structure with a layer such that a similarity between a structure of the layer before replacement and the structure of the layer after replacement satisfies a predetermined decision condition.” (Hardware-aware Search Space, pp. 4; “To reduce the cost while improving the search space efficiency, we propose a layer wise hardware aware search space generation approach to generate specialized search space for every target hardware platform. Unlike the previous methods that apply same operators for all layers, we select the most efficient operators for every layer by real hardware deployment score. We benchmark all the 32 operators’ layer-by-layer and sort each layers’ candidate operators in non-increasing order of their scores in Equation 2: [See Equation (2)] where Fop and Pop are the FLOPs count and number of parameters of operator op respectively,
l
i
a
=
o
p
means architecture a whose i-th learnable layer is op. Parameter α is non-negative constant. The score of candidate operator op at the i-th learnable layer
(
s
c
o
r
e
o
p
(
i
)
)
considers both representation capacity (approximately) and real hardware performance.” This system is able to replace network layers based on an evaluations and scores. The model will replace a given layer or operators based on an evaluation, which is interpreted to a decision condition.)
Regarding claim 11, Tatsumi discloses, “A neural network structure proposal method implemented in a computer, comprising:” (Description of Embodiments, pp. 2, [0030]-[0031]; “With reference to FIGS. 3 and 4, operation of the structure transformation device 10 according to Embodiment 1 will be described. [0031] An operation procedure of the structure transformation device 10 according to Embodiment 1 is equivalent to a structure transformation method according to Embodiment 1. Meanwhile, a program that fulfills the operation of the structure transformation device 10 according to Embodiment 1 is equivalent to a structure transformation program according to Embodiment 1.” This article discloses a generic computing system which executes the methods shown in Fig. 3 and Fig. 4.)
“calculating, or each of multiple layers of a neural network having different parameters, an estimated amount of execution time of the layer and operational efficiency of the layer corresponding to a computation amount per unit time on a target device, and” (Description of Embodiments, pp. 3, [0065]-[0066]; “The processing time calculation unit 221 calculates processing time for the entire neural network by totaling the processing time to be taken by processing for every layer configuring the neural network, as expressed by expression 1. [See Expression 1]. The processing time calculation unit 221 sets each of the plurality of layers configuring the neural network as an object layer and calculates processing time for the object layer by dividing a computation amount for the object layer by computational performance of the implementation destination computing unit, as expressed by expression 2. [See Expression 2]” This system is able to calculate the processing time of each layer of a neural network. This also teaches that the computation amount of each layer is evaluated based on the performance of the layers on the destination computing unit.) and (Description of Embodiments, pp. 4, [0075]; “The shortening efficiency calculation unit 223 calculates shortening efficiency for the object layer. The shortening efficiency is a ratio of a shortening amount in the processing time, to be taken in case where a reduction by the reduction number y of parameters is made, to the current parameter reduction rate
∆
α
x
2
” This system is able to evaluate a model’s efficiency and accuracy on given hardware. This process is performed to determine a quantitative value to reduce the network by for the given hardware.)
Tatsumi fails to explicitly disclose:
“replacing the layer with the large estimated amount of execution time and low operational efficiency with another layer, and output neural network structure information indicating structure of the neural network.”
However, Zheng discloses, “replacing the layer with the large estimated amount of execution time and low operational efficiency with another layer, and” (Hardware-aware Search Space Generation, pp. 4; “To reduce the cost while improving the search space efficiency, we propose a layer wise hardware aware search space generation approach to generate specialized search space for every target hardware platform. Unlike the previous methods that apply same operators for all layers, we select the most efficient operators for every layer by real hardware deployment score. We benchmark all the 32 operators’ layer-by-layer and sort each layers’ candidate operators in non-increasing order of their scores in Equation 2: [see Equation (2)].” This article discloses a process of replacing and testing different layers and structures for a neural network on the given hardware. Each layer can be replaced with a different operator, see Table 2.)
“output neural network structure information indicating structure of the neural network.” (Two-Stage NAS Acceleration, pp. 5; “Second, Stage2 starts with the new winning architecture awin1 and searches for earlier t layers. The later n−t layers are fixed to the corresponding layer operator of awin1 and the earlier t layers are active for another one-shot search. Stage2 returns the final architecture awin2.” This process will evaluate the modifications to the network and output the final architecture awin2.)
Regarding claim 12, Tatsumi discloses, “wherein the computer attempts to replace the layer for which the operational efficiency is below a threshold in descending order of of the estimated amount of execution time.” (Description of Embodiments, pp. 2, [0049]; “The structure transformation unit 225 of the analysis unit 22 identifies a layer whose evaluated value calculated in step S14 is the highest, as a reduction layer. That is, the structure transformation unit 225 identifies the layer having the highest reduction priority, as the reduction layer. [0050] Then, the structure transformation unit 225 makes a reduction by a reduction number of parameters in the reduction layer.” This system will evaluate the different layers of a network and identify the layers which have the highest priority for reduction. This teaches a system which evaluates and ranks layers and stores the results in a data structure where a computed layer can be selected based on given criteria.) and (Description of Embodiments, pp. 2, [0040]; “The processing time calculation unit 221 of the analysis unit 22 refers to the structural information 31 and the performance information 32 and calculates processing time to be taken for a recognition process by the neural network in case where the neural network is implemented in the implementation destination computing unit.” The information from the transformation unit is used along with the time calculation unit to alter and replace values of a neural network to optimize a model for given hardware.)
Regarding claim 13, Tatsumi discloses, “A non-transitory computer readable storage medium for storing a neural network structure proposal program for causing a computer to execute:” (Description of Embodiment, pp. 1, [0018]-[0020]; “With reference to FIG. 1, an example of a hardware configuration of a structure transformation device 10 according to Embodiment 1 will be described. The structure transformation device 10 is a computer to transform a structure of a neural network. The structure transformation device 10 includes a processor 11, a storage device 12, and a computing unit 13 for learning, as hardware. The processor 11 is connected to other hardware through signal lines so as to control the other hardware.” The system proposed in this article contains processors connected to memory systems to execute the program stored in system memory, see Fig. 1)
“calculating, or each of multiple layers of a neural network having different parameters, an estimated amount of execution time of the layer and operational efficiency of the layer corresponding to a computation amount per unit time on a target device, and” (Description of Embodiments, pp. 3, [0065]-[0066]; “The processing time calculation unit 221 calculates processing time for the entire neural network by totaling the processing time to be taken by processing for every layer configuring the neural network, as expressed by expression 1. [See Expression 1]. The processing time calculation unit 221 sets each of the plurality of layers configuring the neural network as an object layer and calculates processing time for the object layer by dividing a computation amount for the object layer by computational performance of the implementation destination computing unit, as expressed by expression 2. [See Expression 2]” This system is able to calculate the processing time of each layer of a neural network. This also teaches that the computation amount of each layer is evaluated based on the performance of the layers on the destination computing unit.) and (Description of Embodiments, pp. 4, [0075]; “The shortening efficiency calculation unit 223 calculates shortening efficiency for the object layer. The shortening efficiency is a ratio of a shortening amount in the processing time, to be taken in case where a reduction by the reduction number y of parameters is made, to the current parameter reduction rate
∆
α
x
2
” This system is able to evaluate a model’s efficiency and accuracy on given hardware. This process is performed to determine a quantitative value to reduce the network by for the given hardware.)
Tatsumi fails to explicitly disclose:
“replacing the layer with the large estimated amount of execution time and low operational efficiency with another layer, and output neural network structure information indicating structure of the neural network.”
However, Zheng discloses, “replacing the layer with the large estimated amount of execution time and low operational efficiency with another layer, and” (Hardware-aware Search Space Generation, pp. 4; “To reduce the cost while improving the search space efficiency, we propose a layer wise hardware aware search space generation approach to generate specialized search space for every target hardware platform. Unlike the previous methods that apply same operators for all layers, we select the most efficient operators for every layer by real hardware deployment score. We benchmark all the 32 operators’ layer-by-layer and sort each layers’ candidate operators in non-increasing order of their scores in Equation 2: [see Equation (2)].” This article discloses a process of replacing and testing different layers and structures for a neural network on the given hardware. Each layer can be replaced with a different operator, see Table 2.)
“output neural network structure information indicating structure of the neural network.” (Two-Stage NAS Acceleration, pp. 5; “Second, Stage2 starts with the new winning architecture awin1 and searches for earlier t layers. The later n−t layers are fixed to the corresponding layer operator of awin1 and the earlier t layers are active for another one-shot search. Stage2 returns the final architecture awin2.” This process will evaluate the modifications to the network and output the final architecture awin2.)
Regarding claim 14, Tatsumi discloses, “wherein the neural network structure proposal program causes the computer to execute attempting to replace the layer for which the operational efficiency is below a threshold in descending order of of the estimated amount of execution time.” (Description of Embodiments, pp. 2, [0049]; “The structure transformation unit 225 of the analysis unit 22 identifies a layer whose evaluated value calculated in step S14 is the highest, as a reduction layer. That is, the structure transformation unit 225 identifies the layer having the highest reduction priority, as the reduction layer. [0050] Then, the structure transformation unit 225 makes a reduction by a reduction number of parameters in the reduction layer.” This system will evaluate the different layers of a network and identify the layers which have the highest priority for reduction. This teaches a system which evaluates and ranks layers and stores the results in a data structure where a computed layer can be selected based on given criteria.) and (Description of Embodiments, pp. 2, [0040]; “The processing time calculation unit 221 of the analysis unit 22 refers to the structural information 31 and the performance information 32 and calculates processing time to be taken for a recognition process by the neural network in case where the neural network is implemented in the implementation destination computing unit.” The information from the transformation unit is used along with the time calculation unit to alter and replace values of a neural network to optimize a model for given hardware.)
Conclusion
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/PAUL M GALVIN-SIEBENALER/Examiner, Art Unit 2147
/VIKER A LAMARDO/Supervisory Patent Examiner, Art Unit 2147
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