CTNF 18/667,596 CTNF 86428 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. This Office Action is in response to application filed on May 17, 2024. Claims 1-20 are pending. Claim Objections 07-29-01 AIA Claim s 1-4, 6-7 and 15-20 are objected to because of the following informalities: Claims 1-4, 6-7 and 15-20 are objected to under 37 CFR 1.75(b), as being not substantially different from each other and are unduly multiplied. The processor claimed in independent Claim 1 has no substantial difference to the system as claimed in Claim 15. Also, dependent claims 2-3 and 6-7 are not substantially different from claims 16-20 . Appropriate correction is required. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 Claims 7, 14 and 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 7, 14 and 20 state “wherein the initialization of the information is to be performed by a first to begin GPU kernel thread of the one or more software programs”. It is unclear what “first to begin GPU kernel thread” means. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15 AIA Claim s 1-2, 8-9 and 15-16 are rejected under 35 U.S.C. 102( a)(1 ) as being anticipated by Jones et al. (US 2015/0143347) . With respect to Claim 1 , Jones et al. disclose: one or more circuits to cause one or more software programs to be compiled to cause information to be used by one or more application programing interfaces (APIs) to be initialized. (device machine code (one or more software programs) is compiled based on device code partition which includes access to device variables (information used by one or more APIs to be initialized), Paragraphs 5 and 14-15; code includes inserting additional calls to invoke the device API before each reference to the device variable. By invoking the device API, the pointer is ensured to have been initialized to the memory location of the device variable before it is ever used (information to be used by one or more APIs). Invoking the device API causes the runtime environment to use the registration to initialize the pointer. The device API is invoked by inserting a comma expression that combines the dereference and a call to initialize the runtime environment (information to be used by one or more APIs) to be initialized), Paragraph 25) With respect to Claim 2 , all the limitations of Claim 1 have been addressed above; and Jones et al. further disclose: wherein the one or more circuits are to cause one or more second software programs, comprising one or more calls to the one or more APIs, to be compiled to be performed by one or more GPUs. (inserting additional calls into the host code to invoke the device API (one or more calls to one or more APIs) before each reference to the device variable. By invoking the device API, the pointer is ensured to have been initialized to the memory location of the device variable before it is ever used and the modified host code is compiled , Paragraph 25; device machine code is executable on a device such as a GPU, Paragraph 19) Claims 8-9 are method claims corresponding to the system claims above (Claims 1-2) and, therefore, are rejected for the same reasons set forth in the rejections of Claims 1-2. Claims 15-16 are system claims corresponding to the processor claims above (Claims 1-2) and, therefore, are rejected for the same reasons set forth in the rejections of Claims 1-2 . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 3, 10 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Jones et al. (US 2015/0143347) in view of Gerbarg et al. (US 2018/0349156) . With respect to Claim 3 , all the limitations of Claim 1 have been addressed above; and Jones et al. further disclose: wherein the one or more software programs are to be compiled as one or more object files to be included with one or more second software programs including one or more calls to the one or more APIs. (Modified host code 200 also includes embedded (included with) device machine code 240 (one or more software programs compiled as one or more object files) that is submitted along with pointer definition 210, pointer initialization 220, and pointer dereference 230 (one or more second software programs including one or more calls to the one or more APIs) to a host compiler for processing., Paragraphs 21-23) Jones et al. do not disclose: object files to be included at runtime However, Gerbarg et al. disclose: object files to be included at runtime (dynamically linking of libraries, Paragraph 3) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Gerbarg et al. into the teaching of Jones et al. to include object files to be included at runtime in order to take advantage of the benefits of dynamic linking such as enhanced flexibility relative to static linking. ( Gerbarg et al. , Paragraph 3) Claim 10 is a method claim corresponding to the system claim above (Claim 3) and, therefore, is rejected for the same reasons set forth in the rejection of Claim 3. Claim 17 is a system claim corresponding to the processor claim above (Claim 3) and, therefore, is rejected for the same reasons set forth in the rejection of Claim 3 . 07-21-aia AIA Claim s 4-5, 11-12 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Jones et al. (US 2015/0143347) in view of Vishnuswaroop Ramesh et al. (US 2023/0102843) . With respect to Claim 4 , all the limitations of Claim 1 have been addressed above; and Jones et al. further disclose: wherein the one or more circuits are to cause one or more second software programs including one or more calls to the one or more APIs, which are to use [reserved memory] on one or more GPUs, to be compiled (compile the modified host code (one or more second software programs) which includes additional calls to invoke the device API (one or more calls to the one or more APIs) that includes a registration step of initializing a pointer to the memory location (reserved memory) of the device variable upon the first call to the device API, Paragraph 26) and to identify at least portions of the one or more software programs to be performed by one or more GPUs before the one or more second software programs. (invoking the device API to access the device variable (portions of the one or more software programs to be performed by one or more GPUs) which occurs before the host code accesses the device variable (one or more second software programs), Paragraphs 24-26) Jones et al. do not disclose: [reserved memory] is reserved shared memory However, Vishnuswaroop Ramesh et al. disclose: [reserved memory] is reserved shared memory (see Figure 1; PPU (GPU) contains shared memory, Paragraphs 48-49) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Vishnuswaroop Ramesh et al. into the teaching of Jones et al. to include [reserved memory] is reserved shared memory in order share memory among one or more thread groups. ( Vishnuswaroop Ramesh et al. , Paragraph 49) With respect to Claim 5 , all the limitations of Claim 1 have been addressed above; and Jones et al. further disclose: wherein the one or more circuits are to cause one or more second software programs including one or more calls to the one or more APIs, which are to use [reserved memory] on one or more GPUs, to be compiled (compile the modified host code (one or more second software programs) which includes additional calls to invoke the device API (one or more calls to the one or more APIs) that includes a registration step of initializing a pointer to the memory location (reserved memory) of the device variable upon the first call to the device API, Paragraph 26) and to identify at least portions of the one or more software programs to be performed by one or more GPUs after the one or more second software programs. (invoking the device API to access the device variable (portions of the one or more software programs to be performed by one or more GPUs) which occurs after the initialization of a pointer to the memory location of the device variable (one or more second software programs) upon the first call to the device API, Paragraphs 24-26) Jones et al. do not disclose: [reserved memory] is reserved shared memory However, Vishnuswaroop Ramesh et al. disclose: [reserved memory] is reserved shared memory (see Figure 1; PPU (GPU) contains shared memory, Paragraphs 48-49) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Vishnuswaroop Ramesh et al. into the teaching of Jones et al. to include [reserved memory] is reserved shared memory in order share memory among one or more thread groups. ( Vishnuswaroop Ramesh et al. , Paragraph 49) Claims 11-12 are method claims corresponding to the system claims above (Claims 4-5) and, therefore, are rejected for the same reasons set forth in the rejections of Claims 4-5. Claim 18 is a system claim corresponding to the processor claim above (Claim 4) and, therefore, is rejected for the same reasons set forth in the rejection of Claim 4 . 07-21-aia AIA Claim s 6 , 13 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Jones et al. (US 2015/0143347) in view of Amento et al. (US 2020/0151127) . With respect to Claim 6 , all the limitations of Claim 1 have been addressed above; and Jones et al. do not disclose: wherein initializing the information comprises writing the information to a reserved shared memory included in one or more GPUs. However, Amento et al. disclose: wherein initializing the information comprises writing the information to a reserved shared memory included in one or more GPUs. (creating and/or initializing variables (writing the information) or other data structures maintained in a shared memory of a GPU (reserved shared memory), Paragraph 42; see Figure 1; GPU comprises shared memory that is separate (reserved) from CPU memory) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Amento et al. into the teaching of Jones et al. to include wherein initializing the information comprises writing the information to a reserved shared memory included in one or more GPUs in order to take advantage of the benefits of GPU reserved shared memory such as cost-effectiveness and power efficiency. With respect to Claim 13 , all the limitations of Claim 8 have been addressed above; and Jones et al. do not disclose: wherein initializing the information comprises writing the information to a memory that is not accessible until performance of a GPU kernel thread of one or more software programs associated with the memory has started. However, Amento et al. disclose: wherein initializing the information comprises writing the information to a memory that is not accessible until performance of a GPU kernel thread of one or more software programs associated with the memory has started. (creating and/or initializing variables (writing the information/GPU kernel thread started) or other data structures and maintained in a shared memory of a GPU (performance of a GPU kernel thread has started), Paragraph 42) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Amento et al. into the teaching of Jones et al. to include wherein initializing the information comprises writing the information to a memory that is not accessible until performance of a GPU kernel thread of one or more software programs associated with the memory has started in order to take advantage of the benefits of storing data in GPU shared memory such as cost-effectiveness and power efficiency. Claim 19 is a system claim corresponding to the processor claim above (Claim 6) and, therefore, is rejected for the same reasons set forth in the rejection of Claim 6 . 07-21-aia AIA Claim s 7, 14 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Jones et al. (US 2015/0143347) in view of Gaster et al. (US 2011/0022817) . With respect to Claim 7 , all the limitations of Claim 1 have been addressed above; and Jones et al. further disclose: wherein the initialization of the information is to be performed by a first to begin [GPU thread] of the one or more software programs. (executing the compiled device code on the GPU (GPU kernel thread) to access device variables (initialization)(one or more software programs), Paragraphs 12-16) Jones et al. do not disclose: [GPU thread] is a GPU Kernel thread However, Gaster et al. disclose: [GPU thread] is a GPU Kernel thread (a GPU kernel generally executes as multiple threads in parallel (GPU Kernel thread), Paragraph 39) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Gaster et al. into the teaching of Jones et al. to include [GPU thread] is a GPU Kernel thread in order take advantage of the benefits of GPU kernels such as being able to execute multiple threads in parallel. ( Gaster et al. , Paragraph 39) Claim 14 is a method claim corresponding to the system claim above (Claim 7) and, therefore, is rejected for the same reasons set forth in the rejection of Claim 7. Claim 20 is a system claim corresponding to the processor claim above (Claim 7) and, therefore, is rejected for the same reasons set forth in the rejection of Claim 7 . Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Levit-Gurevich et al. (US 2019/0042259) discloses inserting profiling instructions into GPU kernels. Brady et al. (US 2019/0392296) discloses memory allocation/initialization during compilation. Any inquiry concerning this communication or earlier communications from the examiner should be directed to LANNY N UNG whose telephone number is (571)270-7708. The examiner can normally be reached Mon-Thurs 6am-4pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Bradley Teets can be reached at 571-272-3338. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LANNY N UNG/ Examiner, Art Unit 2197 Application/Control Number: 18/667,596 Page 2 Art Unit: 2197 Application/Control Number: 18/667,596 Page 3 Art Unit: 2197 Application/Control Number: 18/667,596 Page 4 Art Unit: 2197 Application/Control Number: 18/667,596 Page 5 Art Unit: 2197 Application/Control Number: 18/667,596 Page 6 Art Unit: 2197 Application/Control Number: 18/667,596 Page 7 Art Unit: 2197 Application/Control Number: 18/667,596 Page 8 Art Unit: 2197 Application/Control Number: 18/667,596 Page 9 Art Unit: 2197 Application/Control Number: 18/667,596 Page 10 Art Unit: 2197 Application/Control Number: 18/667,596 Page 11 Art Unit: 2197 Application/Control Number: 18/667,596 Page 12 Art Unit: 2197 Application/Control Number: 18/667,596 Page 13 Art Unit: 2197
