Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Applicant cannot rely upon the certified copy of the foreign priority application to overcome this rejection because a translation of said application has not been made of record in accordance with 37 CFR 1.55. When an English language translation of a non-English language foreign application is required, the translation must be that of the certified copy (of the foreign application as filed) submitted together with a statement that the translation of the certified copy is accurate. See MPEP §§ 215 and 216.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 5/18/2024 is in compliance with time for filing requirements of 37 C.F.R. 1.97, and thus, the information disclosure statement has been considered except as otherwise indicated.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description:
Fig 8: element “W-f3” is not defined in the spec.
Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 13 and 16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (US20180358410A1).
Regarding Claim 13:
Lee discloses a semiconductor device (Fig. 1 element 1) comprising:
a first electrode layer (element 110);
a ferroelectric tunnel barrier layer (element 120) disposed over the first electrode layer (paragraph 18), the ferroelectric tunnel barrier layer including oxygen vacancies (paragraphs 18-23);
an oxygen reservoir layer (element 130) disposed over the ferroelectric tunnel barrier layer (paragraph 21); and
a second electrode layer (element 140) disposed over the oxygen reservoir layer (paragraph 24).
Regarding Claim 16:
Lee discloses a semiconductor device according to claim 13, wherein the oxygen reservoir layer (Fig. 1 element 130) comprises a metal oxide that does not satisfy a stoichiometric ratio, and wherein the oxygen reservoir layer comprises at least one selected from titanium oxide and tantalum oxide (paragraph 23).
Claims 21 and 23-24 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tan et al. (CN117222306A).
Regarding Claim 21:
Tan discloses a semiconductor device (Fig. 7 element 500) comprising:
a first electrode layer (element M1);
a ferroelectric tunnel barrier layer (paragraphs 53-54) disposed over the first electrode layer (elements F1/F2); and
a second electrode layer (element M2) including a metal oxide disposed over the ferroelectric tunnel barrier layer (paragraphs 49 and 55).
wherein the ferroelectric tunnel barrier layer includes:
a first ferroelectric portion (element F1) including oxygen vacancies of a first concentration (paragraph 60); and
a second ferroelectric portion (element F2) including oxygen vacancies of a second concentration higher than the first concentration (paragraph 60).
Regarding Claim 23:
Tan discloses a semiconductor device according to claim 21, wherein the first ferroelectric (Fig. 7 element F1) portion is disposed adjacent to the first electrode layer (element M1), and wherein the second ferroelectric portion (element F2) is disposed adjacent to the second electrode layer (element M2).
Regarding Claim 24:
Tan discloses a semiconductor device according to claim 21, wherein a thickness of the second ferroelectric portion (Fig. 7 element F2) is 1/4 to 1/2 of a thickness (paragraphs 53-54) of the ferroelectric tunnel barrier layer (elements F1/F2).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 4-6 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US20180358410A1) in view of Lee et al. (US20180269216A1), hereinafter referred to as "Lee '216".
Regarding Claim 1:
Lee discloses a semiconductor device (Fig. 1 element 1) comprising:
a first electrode layer (element 110);
a ferroelectric tunnel barrier layer (element 120) disposed over the first electrode layer (paragraph 18), the ferroelectric tunnel barrier layer including oxygen vacancies (paragraphs 18-23); and
a second electrode layer (element 140) disposed over the ferroelectric tunnel barrier layer and including a metal oxide (paragraphs 24-25),
However, Lee does not explicitly disclose where the second electrode layer has a lower density of conducting carriers compared to the first electrode layer.
Lee ‘216 discloses an analogous ferroelectric device (Fig. 1), comprising a first electrode layer (element 110) and second electrode layer (150), wherein the second electrode layer has a relatively low density of conducting carriers (paragraph 37).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device described in Lee further in view of Lee ‘216 to explicitly include where the second electrode layer has a relatively low density of conducting carriers – compared to the first electrode layer – because both are directed to analogous ferroelectric devices. Doing so improves the energy efficiency of switching ferroelectric memory devices (Lee ‘216, paragraphs 33 and 45).
Regarding Claim 4:
The combination of Lee and Lee ‘216 discloses a semiconductor device according to claim 1, wherein Lee further discloses the first electrode layer (Fig. 1 element 110) comprises an inert metal (paragraph 17).
Regarding Claim 5:
The combination of Lee and Lee ‘216 discloses a semiconductor device according to claim 1, wherein Lee further discloses the metal oxide comprises at least one selected from ruthenium oxide (RuO2), iridium oxide (IrO2), platinum oxide (PtO2), strontium ruthenium oxide (SrRuO3), metallic perovskite oxide, and conducting pyrochlore oxide (paragraphs 24-25).
Regarding Claim 6:
The combination of Lee and Lee ‘216 discloses a semiconductor device according to claim 1, wherein Lee further discloses the ferroelectric tunnel barrier layer (Fig. 1 element 120) comprises at least one of hafnium oxide, zirconium oxide, and hafnium zirconium oxide (paragraph 20).
Claims 2-3 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. and Lee '216 as applied to claim 1 above, and further in view of Lu et al. (US20120305879A1).
Regarding Claim 2:
The combination of Lee and Lee ’216 discloses a semiconductor device according to claim 1, but neither explicitly disclose a conductive protrusion extending from the second electrode layer into the ferroelectric tunnel barrier layer.
Lu, however, discloses an analogous non-volatile semiconductor device (Figs 3A-B), comprising a conductive protrusion (elements 302/310) extending from an interface of a second electrode layer (element 106) into a ferroelectric tunnel barrier layer (element 104), wherein the conductive protrusion comprises vacancies (paragraphs 35-37).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device described in Lee and Lee ‘216 further in view of Lu to explicitly include a conductive protrusion – comprising oxygen vacancies – extending from an interface of the second electrode layer into the ferroelectric tunnel barrier layer because both are directed to analogous switching semiconductor devices. Doing so significantly improves the reliability of non-volatile memory devices (Lu, paragraphs 2-5).
Regarding Claim 3:
The combination of Lee, Lee ‘216, and Lu disclose a semiconductor device according to claim 2, but neither Lee nor Lee ‘216 explicitly disclose where the conductive protrusion is not in contact with the first electrode layer.
Lu, however, discloses an analogous non-volatile semiconductor device (Figs 3A-B), wherein the conductive protrusion (elements 302/310) does not contact the first electrode layer (element 102, paragraphs 35-37).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device described in Lee and Lee ‘216 further in view of Lu to explicitly include where the conductive protrusion is not in contact with the first electrode layer because both are directed to analogous switching semiconductor devices. Doing so significantly improves the reliability of non-volatile memory devices (Lu, paragraphs 2-5 and 37).
Claims 7-9 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. and Lee '216 as applied to claim 1 above, and further in view of Park et al. (US20230165013A1).
Regarding Claim 7:
The combination of Lee and Lee ‘216 discloses a semiconductor device according to claim 1, but neither Lee nor Lee ‘216 explicitly disclose a ferroelectric tunnel barrier layer comprising first and second ferroelectric layers nor a protrusion control layer.
However, Park discloses an analogous semiconductor device (Fig. 1 element 100), wherein a ferroelectric tunnel barrier layer (element 130) comprises:
a first ferroelectric layer (element DL1, paragraph 30) disposed adjacent to the first electrode layer (element 120);
a second ferroelectric layer (element DL2, paragraph 33) disposed adjacent to the second electrode layer (element 140); and
a protrusion control layer (element IS) disposed between the first ferroelectric layer and the second ferroelectric layer (paragraph 27).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device described in Lee and Lee ‘216 further in view of Park to explicitly include where the ferroelectric tunnel barrier layer further comprises a first and second ferroelectric layer and a protrusion control layer disposed between the layers because both are directed to analogous semiconductor devices. Doing so improves integration efforts while maintaining the capacitance integrity (Park, paragraphs 2-3).
Regarding Claim 8:
The combination of Lee, Lee ‘216, and Park disclose a semiconductor device according to claim 7, but neither Lee nor Lee ‘216 explicitly disclose a distance between the second electrode layer to the protrusion control layer.
However, Park discloses an analogous semiconductor device (Fig. 1 element 100), wherein a distance (element t12) from the second electrode layer (element 140) to the protrusion control layer (element IS) is 1/4 to 1/2 of a distance (element t13) between the first electrode layer (element 120) and the second electrode layer (paragraphs 33-35).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device described in Lee and Lee ‘216 further in view of Park to explicitly include a distance range from the second electrode layer to the protrusion control layer – in relation to a distance between the first and second electrode layers – because both are directed to analogous semiconductor devices. Doing so improves integration efforts while maintaining the capacitance integrity (Park, paragraphs 2-3).
Regarding Claim 9:
The combination of Lee, Lee ‘216, and Park disclose a semiconductor device according to claim 7, but neither Lee nor Lee ‘216 explicitly disclose where the protrusion control layer comprises either amorphous silicon oxide or amorphous aluminum oxide.
However, Park discloses an analogous semiconductor device (Fig. 1 element 100), wherein the protrusion control layer (element IS) comprises amorphous silicon oxide or amorphous aluminum oxide (paragraph 32).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device described in Lee and Lee ‘216 further in view of Park to explicitly include where the protrusion control layer comprises amorphous silicon oxide or aluminum oxide material because both are directed to analogous semiconductor devices. Doing so improves the performance of capacitor-related semiconductor devices. (Park, paragraphs 2-3).
Claims 10 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. and Lee '216 as applied to claim 1 above, and further in view of Tan et al. (CN117222306A).
Regarding Claim 10:
The combination of Lee and Lee ‘216 discloses a semiconductor device according to claim 1, but neither Lee nor Lee ‘216 explicitly disclose where the ferroelectric tunnel barrier layer further comprises a first and second ferroelectric portion.
Tan, however, discloses an analogous ferroelectric device (Fig. 7 element 500), wherein a ferroelectric tunnel barrier layer (elements F1/F2) comprises:
a first ferroelectric portion (element F1) including oxygen vacancies of a first concentration (paragraph 60); and
a second ferroelectric portion (element F2) including oxygen vacancies of a second concentration higher than the first concentration (paragraph 60), and
wherein the second ferroelectric portion is disposed closer to the second electrode layer (element M2) than the first ferroelectric portion (paragraph 55).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device described in Lee and Lee ‘216 further in view of Tan to explicitly include where the ferroelectric tunnel barrier layer further comprises a first and second ferroelectric portion – with varying oxygen vacancies – because both are directed to analogous switching semiconductor devices. Doing so improves the electrical integrity and overall performance of ferroelectric semiconductor devices (Tan, paragraphs 2-3).
Regarding Claim 12:
The combination of Lee, Lee ‘216, and Tan disclose a semiconductor device according to claim 10, but neither Lee nor Lee ‘216 explicitly disclose a thickness for the second ferroelectric portion.
Tan, however, discloses an analogous ferroelectric device (Fig. 7 element 500), wherein a thickness of the second ferroelectric portion (element F2) is 1/4 to 1/2 of a thickness of the ferroelectric tunnel barrier layer (elements F1/F2, paragraphs 53-54).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device described in Lee and Lee ‘216 further in view of Tan to explicitly include a thickness range for the second ferroelectric portion because both are directed to analogous switching semiconductor devices. Doing so improves the electrical integrity and overall performance of ferroelectric semiconductor devices (Tan, paragraphs 2-3).
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Lee et al., Lee '216, and Tan et al. as applied to claim 10 above, and further in view of Lu et al.
Regarding Claim 11:
The combination of Lee, Lee ‘216, and Tan disclose a semiconductor device according to claim 10, but neither explicitly disclose where the ferroelectric tunnel barrier layer further comprises a conductive protrusion in the second portion.
Lu, however, discloses an analogous non-volatile semiconductor device (Figs 3A-B), wherein the ferroelectric tunnel barrier layer (element 104) comprises a conductive protrusion (elements 302/310).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device described in Lee, Lee ‘216, and Tan further in view of Lu to explicitly include a conductive protrusion disposed in the second ferroelectric portion because both are directed to analogous switching semiconductor devices. Doing so significantly improves the reliability of non-volatile memory devices (Lu, paragraphs 2-5).
Claims 14-15 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. in view of Lu et al.
Regarding Claim 14:
Lee discloses a semiconductor device according to claim 13, but Lee does not explicitly disclose where a conductive protrusion extends from the oxygen reservoir layer to the ferroelectric tunnel barrier layer.
Lu, however, discloses an analogous non-volatile semiconductor device (Figs 3A-B), comprising a conductive protrusion (elements 302/310) extending through a ferroelectric tunnel barrier layer (element 104), wherein the conductive protrusion comprises vacancies (paragraphs 35-37).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device described in Lee further in view of Lu to explicitly include a conductive protrusion – comprising oxygen vacancies – extending from the oxygen reservoir layer to the ferroelectric tunnel barrier layer because both are directed to analogous switching semiconductor devices. Doing so significantly improves the reliability of non-volatile memory devices (Lu, paragraphs 2-5).
Regarding Claim 15:
The combination of Lee and Lu discloses a semiconductor device according to claim 14, but Lee does not explicitly disclose where a conductive protrusion is not in contact with the first electrode layer.
Lu, however, discloses an analogous non-volatile semiconductor device (Figs 3A-B), wherein the conductive protrusion (elements 302/310) does not contact the first electrode layer (element 102, paragraphs 35-37).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device described in Lee further in view of Lu to explicitly include where the conductive protrusion is not in contact with the first electrode layer because both are directed to analogous switching semiconductor devices. Doing so significantly improves the reliability of non-volatile memory devices (Lu, paragraphs 2-5 and 37).
Claims 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. in view of Park et al. and Lu et al.
Regarding Claim 17:
Lee discloses a semiconductor device according to claim 13, but does not explicitly disclose where the ferroelectric tunnel barrier layer further comprises a first and second ferroelectric layer nor a protrusion control layer.
However, Park discloses an analogous semiconductor device (Fig. 1 element 100), wherein a ferroelectric tunnel barrier layer (element 130) comprises:
a first ferroelectric layer (element DL1, paragraph 30) disposed adjacent to the first electrode layer (element 120);
a second ferroelectric layer (element DL2, paragraph 33) disposed adjacent to the second electrode layer (element 140); and
a protrusion control layer (element IS) disposed between the first ferroelectric layer and the second ferroelectric layer (paragraph 27). But Park does not explicitly disclose where the second ferroelectric portion comprises a conductive portion.
Lu, however, discloses an analogous non-volatile semiconductor device (Figs 3A-B), comprising a conductive protrusion (elements 302/310) extending through a ferroelectric tunnel barrier layer (element 104), wherein the conductive protrusion comprises vacancies (paragraphs 35-37).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device described in Lee further in view of Park and Lu to explicitly include where the ferroelectric tunnel barrier layer further comprises a first ferroelectric layer, second ferroelectric layer (adjacent to the oxygen reservoir layer), and a protrusion control layer. Moreover, a conductive protrusion – comprising oxygen vacancies – disposed in the second ferroelectric layer because both are directed to analogous switching semiconductor devices. Doing so maintains the capacitance integrity while improving the reliability of the overall device (Park, paragraphs 2-3 and Lu, paragraphs 2-5 and 37).
Regarding Claim 18:
The combination of Lee, Park, and Lu discloses a semiconductor device according to claim 17, but neither Lee nor Lu explicitly disclose where the protrusion control layer comprises either amorphous silicon oxide or amorphous aluminum oxide.
However, Park discloses an analogous semiconductor device (Fig. 1 element 100), wherein the protrusion control layer (element IS) comprises amorphous silicon oxide or amorphous aluminum oxide (paragraph 32).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device described in Lee, Park, and Lu further in view of Park to explicitly include where the protrusion control layer comprises amorphous silicon oxide or aluminum oxide material because both are directed to analogous semiconductor devices. Doing so improves the performance of capacitor-related semiconductor devices. (Park, paragraphs 2-3).
Claim 19 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. in view of Tan et al.
Regarding Claim 19:
Lee discloses a semiconductor device according to claim 13, but Lee does not explicitly disclose where the ferroelectric tunnel barrier layer further comprises a first and second portion.
Tan, however, discloses an analogous ferroelectric device (Fig. 7 element 500), wherein the ferroelectric tunnel barrier layer (elements F1/F2) includes:
a first ferroelectric portion (element F1) with a relatively low concentration of oxygen vacancies (paragraph 60); and
a second ferroelectric portion (element F2) with a relatively high concentration of oxygen vacancies (paragraph 60), and
wherein the second ferroelectric portion is disposed adjacent to the second electrode layer (element M2, paragraph 55).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device described in Lee further in view of Tan to explicitly include where the ferroelectric tunnel barrier layer further comprises a first and second ferroelectric portion – with varying oxygen vacancies – because both are directed to analogous switching semiconductor devices. Doing so improves the electrical integrity and overall performance of ferroelectric semiconductor devices (Tan, paragraphs 2-3).
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. and Tan et al. as applied to claim 19 above, and further in view of Lu et al.
Regarding Claim 20:
The combination of Lee and Tan discloses a semiconductor device according to claim 19, but neither Lee nor Tan explicitly disclose a conductive protrusion disposed in the second ferroelectric portion.
Lu, however, discloses an analogous non-volatile semiconductor device (Figs 3A-B), comprising a conductive protrusion (elements 302/310) extending through a ferroelectric tunnel barrier layer (element 104).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device described in Lee and Tan further in view of Lu to explicitly include where the ferroelectric tunnel barrier layer includes a conductive protrusion disposed in the second ferroelectric portion because both are directed to analogous switching semiconductor devices. Doing so significantly improves the reliability of non-volatile memory devices (Lu, paragraphs 2-5).
Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over Tan et al. in view of Lu et al.
Regarding Claim 22:
Tan discloses a semiconductor device according to claim 21, but Tan does not explicitly disclose where the second ferroelectric portion further comprises a conductive protrusion.
Lu, however, discloses an analogous non-volatile semiconductor device (Figs 3A-B), comprising a conductive protrusion (elements 302/310) extending through a ferroelectric tunnel barrier layer (element 104), wherein the conductive protrusion comprises vacancies (paragraphs 35-37).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device described in Tan further in view of Lu to explicitly include a conductive protrusion – comprising oxygen vacancies – disposed in the second ferroelectric portion because both are directed to analogous switching semiconductor devices. Doing so significantly improves the reliability of non-volatile memory devices (Lu, paragraphs 2-5).
Claim 25 is rejected under 35 U.S.C. 103 as being unpatentable over Tan et al. in view of Lee et al.
Regarding Claim 25:
Tan discloses a semiconductor device according to claim 21 but does not explicitly disclose an oxygen reservoir layer disposed between the first and second electrode layer and in contact with the second ferroelectric portion.
Lee, however, discloses an analogous ferroelectric memory device (Fig. 1 element 1), further comprising an oxygen reservoir layer (element 130) disposed between a first electrode layer (element 110) and a second electrode layer (element 140) and in contact with a ferroelectric layer (element 120).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device described in Tan further in view of Lee to explicitly include an oxygen reservoir layer disposed between the first and second electrode layer – and in contact with the second ferroelectric portion – because both are directed to analogous ferroelectric devices. Doing so improves the integrity of non-volatile memory devices (Lee, paragraph 3).
Citation of Pertinent Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Lee et al. (US 20210336132 A1), Yang et al. (CN 119324190 A), Lu et al. (US 20240107776 A1), Zhang et al. (WO 2023231798 A1.
Conclusion
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/CALEEN O SULLIVAN/Primary Examiner, Art Unit 2899
/Chloë E Benton/Examiner, Art Unit 2899
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