DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 17 is objected to because of the following informalities:
The claim recites “executed by a processor, cuase the processor to perform operatins, the operations comprising” should be --executed by a processor, cause the processor to perform operations, the operations comprising--.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
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The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1,7,9,15 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shinjiro et al. (JP 2004304371 A), in view of Hewson et al. (US 2011/0134924 A1), further in view of Fu et al. (US 2023/0155892 A1).
Regarding claim 1, Shinjiro discloses a method for restoring a network topology (Shinjiro [0034], discloses a method for learning the topology of a network by learning relationship between LAN line (port) of a layer 2 switch (L2SW), a MAC address and an IP address) comprising:
obtaining content of media access control (MAC) tables of a plurality of network devices (Shinjiro [0022] discloses address table used to store attributes of registered devices, the attributes include MAC source addresses, IP source addresses and MAC destination addresses);
determining a port on which an uplink destination MAC address is learned as an uplink port of the plurality of network devices (Shinjiro [0051] discloses an accommodated port used by a L2 switch used for receiving data (MAC frame). The port is accommodated by the L2 switch, thereby learning the correspondence relationship between the transmission source MAC address of the received data (MAC frame) and the port number, and illustrating it. Registered in a MAC address table (correspondence table) (MAC address learning function),
determining a plurality of initial sets (initial MAC address entries in a MAC table), in a one-to-one correspondence (Matching received MAC address to MAC destination address in a table) with a plurality of downlink destination MAC addresses (Matching MAC addresses of received packets to initial entries in MAC table), comprising MAC addresses learned on ports other than the uplink port of the plurality of network devices (Shinjiro, [0022; 0051] discloses an address table learning means for registering an entry including an address in the address table; When a data transferred from the one to the other is received through the router and transmitted to the other, the address table (initial MAC address entries in a MAC table) is searched using the IP destination address of the data as a search key, and the searched entry When the MAC address included in the data matches the MAC destination address of the data, an entry including the IP source address, the MAC, and the IP destination address set in the data is generated and registered in the flow table. An accommodated port used by a L2 switch used for receiving data (MAC frame) is disclosed. The port is accommodated by the L2 switch, thereby learning the correspondence relationship between the transmission source MAC address of the received data (MAC frame) and the port number, and illustrating it),
each of the plurality of initial sets (MAC address entries in a table) comprises data of a network device that learns a corresponding downlink destination MAC address (received MAC address), and the data of the network device comprises an identifier (Destination port number corresponding to a destination MAC address) of the network device and a port on which the corresponding downlink destination MAC address is learned (Shinjiro, [0051- 0052] a layer two (L2) switch receives data (MAC frame) from each LAN line (accommodated port), thereby learning the correspondence relationship between the transmission source MAC address of the received data (MAC frame) and the port number, and illustrating it. Registered in a MAC address table (correspondence table) (MAC address learning function). Then, in communication between hosts belonging to the same segment (VLAN), the L2 switch sets a destination port number corresponding to a destination MAC address (MAC address of a communication destination host) assigned to data from a communication source host. The output port (downlink destination) is obtained by searching the correspondence table, and the data is output to the corresponding port);
determining a connection relationship between the plurality of network devices based on the plurality of initial sets (Shinjiro, [0051- 0052] a layer two (L2) switch receives data (MAC frame) from each LAN line (accommodated port), thereby learning the correspondence relationship between the transmission source MAC address of the received data (MAC frame) and the port number, and illustrating it. Registered in a MAC address table (correspondence table) (MAC address learning function).
Shinjiro did not explicitly disclose wherein the uplink destination MAC address is a MAC address that appears most frequently in the MAC tables of the plurality of network devices; determining, based on the connection relationship between the plurality of network devices and the uplink port of the plurality of network devices, a network topology corresponding to the plurality of network devices.
Hewson discloses wherein the uplink destination MAC address is a MAC address that appears most frequently in the MAC tables of the plurality of network devices (Hewson [0092-0094] FIGS. 5 &7 when a frame is received at an ingress port S7.1 and the destination MAC address is read from the frame S7.2. A MAC address look-up is performed by generating a hash function derived from the destination MAC address of the frame. The MAC table processor 21 (FIG. 4) receives the hash function and compares it with those stored in the MAC sub-table memory element 23 to look for a match S7.3. If a match is found in a higher level (Bridge Fabric Switches) BFS 18 then the entry is returned on each of the same links on which the request was received by the BFSs. The entry is written into the sub-tables of each of the BFSs 18 that it passes through S7.11 and S7.12. In this way the most frequently used destination MAC addresses will be available for look-up at individual edge BFSs that are regularly receiving frames intended for those destination addresses and which are most quickly accessible to the encapsulates 8).
One of ordinary skill in the art would have been motivated to combine Shinjiro and Hewson because these teachings are from the same field of endeavor with respect to disclosing techniques for discovering network topologies.
Therefore, before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art to incorporate the strategies by Hewson into the invention of Shinjiro. The motivation would have been to provide a multi-path network for use in a bridge, switch, router, hub or the like, adapted to distribute a plurality of device address data amongst the plurality of memory elements, Hewson, [Abstract].
Shinjiro modified by Hewson did not explicitly disclose determining, based on the connection relationship between the plurality of network devices and the uplink port of the plurality of network devices, a network topology corresponding to the plurality of network devices.
Fu discloses determining, based on the connection relationship between the plurality of network devices and the uplink port of the plurality of network devices, a network topology corresponding to the plurality of network devices (Fu, fig. 1, [0075-0077] discloses a method for generating a network topology by determining connectivity of designated devices directly connected among the multiple designated devices according to the accessible devices corresponding to the ports of the designated devices. Learning the topology of the network involves a step of determining whether a first device and a second device are designated devices that are directly connected according to the accessible devices corresponding to a first port of the first device and the accessible devices corresponding to a second port of the second device. This step is performed until all designated devices that are directly connected among the multiple designated devices are determined. To accurately generate the topology of the network, the types of ports associated with the designated devices is determined. In this case, it is determined that the first port is an uplink port of the first device, and the second port is a downlink port of the second device. That is, the information on the connectivity of the designated devices and the type of ports associated with devices is used to generate the topology of the network).
One of ordinary skill in the art would have been motivated to combine Shinjiro, Hewson and Fu because these teachings are from the same field of endeavor with respect to disclosing techniques for discovering network topologies.
Therefore, before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art to incorporate the strategies by Fu into the invention of Shinjiro and Hewson. The motivation would have been to generate the topology of multiple designated devices in the network is automatically according to the accessible devices corresponding to the ports of the multiple designated devices in the network, Fu, [Abstract].
Regarding claim 7, Shinjiro, Hewson and Fu disclose the method according to claim 1, wherein the method further comprising:
sending a packet to at least one network device in the plurality of network devices, so that the plurality of network devices respectively learn the content of the MAC tables of the plurality of network devices (Shinjiro, [0022; 0051] discloses an address table learning means for registering an entry including an address in the address table; When a data transferred from the one to the other is received through the router and transmitted to the other, the address table (initial MAC address entries in a MAC table) is searched using the IP destination address of the data as a search key, and the searched entry When the MAC address included in the data matches the MAC destination address of the data, an entry including the IP source address, the MAC, and the IP destination address set in the data is generated and registered in the flow table).
The motivation to combine is similar to that of claim 1.
Regarding claim 9, Shinjiro discloses a topology computing apparatus (Shinjiro [0034] discloses a layer two switch (L2SW)) comprising:
a processor (Shinjiro [0034] discloses a layer two switch (L2SW) comprising a processor),
a memory (flow table) coupled to the processor (L2SW) to store instructions, which when executed by the processor, the instructions to cause the apparatus to (Shinjiro [0034] discloses a layer two switch (L2SW) comprising a processor executing instructions stored in memory to learn MAC addresses and store the result in a flow table):
The rest of the limitations of claim 9 are rejected with rational similar to that of claim 1.
Regarding claim(s) 15, the claim(s) is/are rejected with rational similar to that of claim(s) 7.
Regarding claim(s) 17, Shinjiro discloses a non-transitory readable storage medium, having instructions stored therein, which when executed by a processor, cuase the processor to perform operatins, the operations comprising (Shinjiro [0034] discloses a layer two switch (L2SW) comprising a processor executing instructions stored in memory to learn MAC addresses and store the result in a flow table):
The rest of the limitations of claim 17 are rejected with rational similar to that of claim 1.
Claim(s) 2, 10 and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shinjiro et al. (JP 2004304371 A), in view of Hewson et al. (US 2011/0134924 A1), in view of Fu et al. (US 2023/0155892 A1), further in view of Nakashima et al. (US 2012/0151090 A1).
Regarding claim 2, Shinjiro, Hewson and Fu disclose the method according to claim 1, wherein the connection relationship comprises:
two interconnected network devices in the plurality of network devices (Fu, fig. 1, [0075-0077] discloses a method for generating a network topology by determining connectivity of designated devices directly connected among the multiple designated devices according to the accessible devices corresponding to the ports of the designated devices. Learning the topology of the network involves a step of determining whether a first device and a second device are designated devices that are directly connected according to the accessible devices corresponding to a first port of the first device and the accessible devices corresponding to a second port of the second device).
Shinjiro, Hewson and Fu did not explicitly disclose a network device located at an upper layer and a network device located at a lower layer in the two interconnected network devices; and a downlink port of the network device located at the upper layer.
Nakashima discloses a network device located at an upper layer and a network device located at a lower layer in the two interconnected network devices; and a downlink port of the network device located at the upper layer (Nakashima [0050] discloses a network system 1 in FIG. 7 which includes 16 spine switches SP (SP1 to SP16), 32 leaf switches LF (LF1 to LF32), and 16 compute nodes (end nodes) for each leaf switch (512 compute nodes in total). Spine switches SP1 to SP16, leaf switches LF1 to LF32, and compute nodes N1 to N16 are coupled via a network so as to form a fat tree. In a fat tree, switch layers are connected in a tree topology so that switches at an upper layer are equally and symmetrically connected to switches at a lower layer. A plurality of switches at the top layer are placed in parallel without being connected with each other. [0052] Leaf switches LF1 to LF32 are each an InfiniBand switch having 32 ports.).
One of ordinary skill in the art would have been motivated to combine Shinjiro, Hewson, Fu and Nakashima because these teachings are from the same field of endeavor with respect to disclosing techniques for discovering network topologies.
Therefore, before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art to incorporate the strategies by Nakashima into the invention of Shinjiro, Hewson and Fu. The motivation would have been to provide a first port number assigned to output ports each being provided for different one of a plurality of relay nodes is stored in association with first consecutive addresses in such a manner that one or more data blocks including the first port number associated with the first consecutive addresses are written into the memory, Nakashima, [Abstract].
Regarding claim(s) 10, the claim(s) is/are rejected with rational similar to that of claim(s) 2.
Regarding claim(s) 18, the claim(s) is/are rejected with rational similar to that of claim(s) 2.
Claim(s) 8 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shinjiro et al. (JP 2004304371 A), in view of Hewson et al. (US 2011/0134924 A1), in view of Fu et al. (US 2023/0155892 A1), further in view of Bukofser et al. (US 2012/0140671 A1).
Regarding claim 8, Shinjiro, Hewson and Fu disclose the method according to claim 1, but did not explicitly disclose wherein the method further comprising: displaying the network topology corresponding to the plurality of network devices.
Bukofser discloses wherein the method further comprising: displaying the network topology corresponding to the plurality of network devices (Bukofser [0022] an upgrade analysis application 585 combines network discovery information that determines the network topology together with network performance information such as the network capacity on a per link basis to establish a network performance baseline. A methodology for displaying a graphical or block diagram representation of network 405 on a display 540 of IHS 500 is disclosed. In this manner, upgrade analysis application 585 displays the discovered network topology to the user. Upgrade analysis application 585 may also display the network capacity on a per link basis adjacent each communication link of the topology that display 540 depicts).
One of ordinary skill in the art would have been motivated to combine Shinjiro, Hewson, Fu and Bukofser because these teachings are from the same field of endeavor with respect to disclosing techniques for discovering network topologies.
Therefore, before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art to incorporate the strategies by Bukofser into the invention of Shinjiro, Hewson and Fu. The motivation would have been to determine an estimated impact of a speculative change to the discovered topology of the network by repeating the topology discovery and the determination of baseline performance using the speculative changed topology, Bukofser, [Abstract].
Regarding claim(s) 16, the claim(s) is/are rejected with rational similar to that of claim(s) 8.
Allowable Subject Matter
Claim(s) 3-6,11-14 and 19-20 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure. The following publications show the state of the art related to discovering and restoring network topologies.
Marvin et al. (US 2016/0344591 A1)
Tang et al. (US 2023/0224235 A1)
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DIXON F DABIPI whose telephone number is (571)270-3673. The examiner can normally be reached on Monday - Friday from 9:00 am to 5:00 pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christopher L Parry, can be reached at telephone number 571-272-8328. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/D.F.D/ Examiner, Art Unit 2451
/Chris Parry/Supervisory Patent Examiner, Art Unit 2451