Prosecution Insights
Last updated: May 29, 2026
Application No. 18/671,793

Hybrid Displays

Non-Final OA §102§103
Filed
May 22, 2024
Priority
Dec 01, 2021 — provisional 63/284,915 +2 more
Examiner
SNYDER, ADAM J
Art Unit
2623
Tech Center
2600 — Communications
Assignee
Apple Inc.
OA Round
1 (Non-Final)
70%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 70% — above average
70%
Career Allowance Rate
628 granted / 902 resolved
+7.6% vs TC avg
Strong +19% interview lift
Without
With
+18.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
20 currently pending
Career history
929
Total Applications
across all art units

Statute-Specific Performance

§103
90.2%
+50.2% vs TC avg
§102
5.5%
-34.5% vs TC avg
§112
0.5%
-39.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 902 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 9-10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Bok et al (US 2021/0191552 A1). Claim 9, Bok (Fig. 1-104) discloses an electronic device (1; Fig. 1; wherein discloses a display apparatus) comprising: a first display portion (20; Fig. 81, 82, and 84B; wherein discloses a second display panel) comprising a first backplane of a first type (200; Fig. 81, 82, and 84B; Paragraph [0819]; wherein discloses “The substrate 200 may be implemented as a silicon bulk wafer or an epitaxial wafer”) and a first array of pixels (ED2; Fig. 81, 82, and 84B; DA2; Fig. 85A, 85B, and 86A); a second display portion (10; Fig. 81, 82, and 84B; wherein discloses a first display panel) comprising a second backplane of a second type (100; Fig. 81, 82, and 84B; Paragraph [0236]; wherein discloses “The substrate 100 may include an insulative material, such as glass, quartz, and polymer resin”) that is different than the first type (200; Fig. 81, 82, and 84B; Paragraph [0819]; wherein discloses “The substrate 200 may be implemented as a silicon bulk wafer or an epitaxial wafer”) and a second array of pixels (ED2; Fig. 81, 82, and 84B; DA2; Fig. 85A, 85B, and 86A); and at least one organic light-emitting diode layer (OLED and OLED’; Fig. 17) that forms part of both the first array of pixels (ED1; Fig. 81, 82, and 84B; Paragraph [0363]) and the second array of pixels (ED2; Fig. 81, 82, and 84B; Paragraph [0790]; wherein discloses “Alternatively, the second light-emitting elements ED2 may be organic light-emitting diodes”). Claim 10, Bok (Fig. 1-104) discloses wherein the first backplane (200; Fig. 81, 82, and 84B) of the first type is a silicon backplane (200; Fig. 81, 82, and 84B; Paragraph [0819]; wherein discloses “The substrate 200 may be implemented as a silicon bulk wafer or an epitaxial wafer”) and wherein the second backplane (100; Fig. 81, 82, and 84B) of the second type is a thin-film transistor (TFT; Fig. 81, 82, and 84B) backplane (100; Fig. 81, 82, and 84B; Paragraph [0236]; wherein discloses “The substrate 100 may include an insulative material, such as glass, quartz, and polymer resin”). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-7 are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al (US 2019/0172399 A1) in view of Bok et al (US 2021/0191552 A1). Claim 1, Chen (Fig. 1-19) discloses an electronic device (20; Fig. 5; wherein figure shows a display device), comprising: a first display portion (20L; Fig. 5) comprising a first array of pixels (L and 42; Fig. 5: Paragraph [0038]; wherein discloses a lower resolution portion), wherein the first array of pixels has a first resolution (42; Fig. 5: Paragraph [0038]; wherein discloses a lower resolution portion), wherein the first array of pixels is arranged in a light-emitting area (Paragraph [0036]; wherein discloses “Pixel area may be varied by, for example, varying anode area (and therefore light emission area) in the light-emitting diode of each pixel 42 in an organic light-emitting diode display”); and a second display portion (20H; Fig. 5) comprising a second array of pixels (H and 42; Fig. 5: Paragraph [0038]; wherein discloses a higher resolution portion), wherein the second array of pixels has a second resolution (Paragraph [0038]; wherein discloses a higher resolution portion) that is different than the first resolution (Paragraph [0038]; wherein discloses a lower resolution portion). Chen does not expressly disclose a first display portion comprising a glass substrate and a first array of pixels and wherein the first display portion has a transparent window that does not include any of the pixels of the first array of pixels; and a second display portion comprising a silicon substrate and a second array of pixels, and wherein the second array of pixels emits light through the transparent window of the first display portion. Bok (Fig. 1-104) discloses a first display portion (10; Fig. 81, 82, and 84B; wherein discloses a first display panel) comprising a glass substrate (100; Fig. 81, 82, and 84B; Paragraph [0236]; wherein discloses “The substrate 100 may include an insulative material, such as glass, quartz, and polymer resin”) and a first array of pixels (ED1; Fig. 81, 82, and 84B), and wherein the first display portion (10; Fig. 81, 82, and 84A) has a transparent window (TA; Fig. 81, 82, and 84B; wherein discloses a transmission area TA) that does not include any of the pixels (TA; Fig. 13A-14C) of the first array of pixels (Pr, Pg, and Pb; Fig. 13A-14C); and a second display portion (20; Fig. 81, 82, and 84B; wherein discloses a second display panel) comprising a silicon substrate (200; Fig. 81, 82, and 84B; Paragraph [0819]; wherein discloses “The substrate 200 may be implemented as a silicon bulk wafer or an epitaxial wafer”) and a second array of pixels (ED2; Fig. 81, 82, and 84B; DA2; Fig. 85A, 85B, and 86A), and wherein the second array of pixels (ED2; Fig. 84B) emits light through (Paragraph [0787]) the transparent window (TA; Fig. 84B) of the first display portion (10; Fig. 81, 82, and 84B). Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Chen’s display device by applying a layered display device, as taught by Bok, so to use a display device with a layered display device for providing an area of the component area CA occupied by wires may be reduced, and thus the transmission area TA may be relatively expanded. Accordingly, the light transmittance of the component area CA may improve (Paragraph [0540]). Claim 2, Bok (Fig. 1-104) discloses wherein the first display portion (10; Fig. 81, 82, and 84B) includes opaque structures (BML; Fig. 81, 82, and 84B; Paragraph [0269]; wherein “The bottom metal layer BML may prevent external light from reaching the auxiliary thin-film transistor TFT′”) for the first array of pixels (Pr, Pb, and Pg; Fig. 16G and 16H) in the light-emitting area (PG; Fig. 16A, and 16C-16H) and wherein the opaque structures are omitted (BMLH; Fig. 16A, 16C-16H) in the transparent window (TA; Fig. 16A and 16C-16H). Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Chen’s display device by applying a layered display device, as taught by Bok, so to use a display device with a layered display device for providing an area of the component area CA occupied by wires may be reduced, and thus the transmission area TA may be relatively expanded. Accordingly, the light transmittance of the component area CA may improve (Paragraph [0540]). Claim 3, Bok (Fig. 1-104) discloses wherein the first display portion (10; Fig. 17) includes a thin-film transistor layer (TFT’; Fig. 17) on the glass substrate (100; Fig. 17; Paragraph [0236]), wherein each pixel in the first array of pixels (Pr, Pg, and Pb; Fig. 13A-14C) is controlled by a respective plurality of thin-film transistors (Fig. 11A or 11B) in the thin-film transistor layer (TFT’; Fig. 17), and wherein at least some of the respective plurality of thin-film transistors for each pixel (Fig. 17; wherein figure shows a transparent area in which the thin film transistor was omitted) is omitted in the transparent window (TA; Fig. 17). Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Chen’s display device by applying a layered display device, as taught by Bok, so to use a display device with a layered display device for providing an area of the component area CA occupied by wires may be reduced, and thus the transmission area TA may be relatively expanded. Accordingly, the light transmittance of the component area CA may improve (Paragraph [0540]). Claim 4, Chen (Fig. 1-19) discloses wherein the second resolution (20H; Fig. 5; Paragraph [0036]; wherein discloses a higher resolution portion) is higher than the first resolution (20L Fig. 5; Paragraph [0036]; wherein discloses a lower resolution portion). Claim 5, Bok (Fig. 1-104) discloses further comprising: at least one organic light-emitting diode layer (OLED and OLED’; Fig. 17) that forms part of both the first array of pixels (10; Fig. 81, 82, and 84B; Paragraph [0363]) and the second array of pixels (20; Fig. 81, 82, and 84B; Paragraph [0790]; wherein discloses “Alternatively, the second light-emitting elements ED2 may be organic light-emitting diodes”). Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Chen’s display device by applying a layered display device, as taught by Bok, so to use a display device with a layered display device for providing an area of the component area CA occupied by wires may be reduced, and thus the transmission area TA may be relatively expanded. Accordingly, the light transmittance of the component area CA may improve (Paragraph [0540]). Claim 6, Bok (Fig. 1-104) discloses wherein the at least one organic light-emitting diode layer (ED2; Fig. 81, 82, and 84B; Paragraph [0790]; wherein discloses “Alternatively, the second light-emitting elements ED2 may be organic light-emitting diodes”) is interposed between the glass substrate (100; Fig. 81, 82, and 84B; Paragraph [0236]) and the silicon substrate (200; Fig. 81, 82, and 84B; Paragraph [0819]). Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Chen’s display device by applying a layered display device, as taught by Bok, so to use a display device with a layered display device for providing an area of the component area CA occupied by wires may be reduced, and thus the transmission area TA may be relatively expanded. Accordingly, the light transmittance of the component area CA may improve (Paragraph [0540]). Claim 7, Bok (Fig. 1-104) discloses further comprising: a first organic light-emitting diode layer (OLED and OLED; Fig. 17; Paragraph [0363]) that forms part of the first array of pixels (ED1; Fig. 81, 82, and 84B); and a second organic light-emitting diode layer (Paragraph [0790]; wherein discloses “Alternatively, the second light-emitting elements ED2 may be organic light-emitting diodes”) that forms part of the second array of pixels (ED2; Fig. 81, 82, and 84B). Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Chen’s display device by applying a layered display device, as taught by Bok, so to use a display device with a layered display device for providing an area of the component area CA occupied by wires may be reduced, and thus the transmission area TA may be relatively expanded. Accordingly, the light transmittance of the component area CA may improve (Paragraph [0540]). Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Chen et al (US 2019/0172399 A1) in view of Bok et al (US 2021/0191552 A1) as applied to claim 1 above, and further in view of Chen et al (US 2019/0339570 A1). Claim 8, Chen in view of Bok discloses the electronic device defined in claim 1. Chen in view of Bok does not expressly disclose further comprising: a display driver integrated circuit that drives both the first array of pixels and the second array of pixels. Chen (Fig. 1-16) discloses further comprising: a display driver integrated circuit (134; Fig. 13; Paragraph [0049]; wherein discloses a panel driving portion) that drives both the first array of pixels (106; Fig. 13) and the second array of pixels (104; Fig. 13). Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Chen in view of Bok’s display device by applying a driving circuit, as taught by Chen, so to use a display device with a driving circuit for providing to develop a design that can effectively reduce heterogeneity in the hybrid display device (Paragraph [0005]). Claims 11-12, 14, and 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Bok et al (US 2021/0191552 A1) in view of Chen et al (US 2019/0172399 A1). Claim 11, Bok discloses the electronic device defined in claim 10. Bok does not expressly disclose wherein the first array of pixels has a higher resolution than the second array of pixels. Bok (Fig. 1-104) discloses wherein the first array of pixels (ED2; Fig. 84B) has a higher resolution (ED2; Fig. 84B; wherein figure shows a higher resolution of pixels ED2 compared to pixels ED1) than the second array of pixels (ED1; Fig. 84B). Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Bok’s display device by applying different resolutions, as taught by Chen, so to use a display device with different resolutions for providing the display may have regions of lower and higher resolution to reduce data bandwidth and power consumption for the display while preserving satisfactory image quality (Paragraph [0004]). Claim 12, Bok (Fig. 1-104) discloses wherein the first display portion (20; Fig. 81 and 82, and 84B) includes a silicon substrate (200; Fig. 81, 82, and 84B; Paragraph [0819]; wherein discloses “The substrate 200 may be implemented as a silicon bulk wafer or an epitaxial wafer”), wherein the second display portion (10; Fig. 81, 82, and 84B) includes a glass substrate (100; Fig. 81, 82, and 84B; Paragraph [0236]; wherein discloses “The substrate 100 may include an insulative material, such as glass, quartz, and polymer resin”), and wherein the at least one organic light-emitting diode layer (ED2; Fig. 81, 82, and 84B; Paragraph [0790]; wherein discloses “Alternatively, the second light-emitting elements ED2 may be organic light-emitting diodes”) is interposed between the silicon substrate (200; Fig. 81, 82, and 84B) and the glass substrate (100; Fig. 81, 82, and 84B). Claim 14, Bok (Fig. 1-104) discloses wherein the first display portion (20; Fig. 81, 82, and 84B) includes a silicon substrate (200; Fig. 81, 82, and 84B; Paragraph [0819]; wherein discloses “The substrate 200 may be implemented as a silicon bulk wafer or an epitaxial wafer”), wherein the second display portion (10; Fig. 81, 82, and 84B) includes a dielectric substrate (100; Fig. 81, 82, and 84B; Paragraph [0236]; wherein discloses “The substrate 100 may include an insulative material, such as glass, quartz, and polymer resin”), and wherein the dielectric substrate (100; Fig. 81, 82, and 84B) is interposed between the silicon substrate (200; Fig. 81, 82, and 84B) and the at least one organic light-emitting diode layer (ED1; Fig. 81, 82, and 84B; OLED and OLED; Fig. 17; Paragraph [0363]). Claim 16, Bok (Fig. 1-104) discloses wherein the first display portion (20; Fig. 81, 82, and 84B) includes a silicon substrate (200; Fig. 81, 82, and 84B; Paragraph [0819]; wherein discloses “The substrate 200 may be implemented as a silicon bulk wafer or an epitaxial wafer”), wherein the second display portion (10; Fig. 81, 82, and 84B) includes a dielectric substrate (100; Fig. 81, 82, and 84B; Paragraph [0236]; wherein discloses “The substrate 100 may include an insulative material, such as glass, quartz, and polymer resin”), wherein a thin-film transistor layer (TFT; Fig. 81, 82, and 84B) for the second display portion (10; Fig. 81, 82, and 84B) is formed on the dielectric substrate (100; Fig. 81, 82, and 84B; Paragraph [0236]; wherein discloses “The substrate 100 may include an insulative material, such as glass, quartz, and polymer resin”), and wherein the silicon substrate (200; Fig. 82) is formed on the dielectric substrate (100; Fig. 82). Claim 17, Bok (Fig. 1-104) discloses further comprising: a dielectric layer (IL; Fig. 81, 82, and 84B) that is formed over the thin-film transistor layer (TFT; Fig. 81, 82, and 84B; Paragraph [0786]); and a plurality of vias (Fig. 81, 82, and 84B; wherein figure shows connection between ED1 and TFT through insulating layer IL by a via) through the dielectric layer (IL; Fig. 81, 82, and 84B) that electrically connect the thin-film transistor layer (TFT; Fig. 81, 82, and 84B) to the second array of pixels (ED1; Fig. 81, 82, and 84B). Claims 13 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Bok et al (US 2021/0191552 A1) in view of Chen et al (US 2019/0172399 A1) as applied to claims 12 and 14 above, and further in view of Chen et al (US 2019/0339570 A1). Claim 13, Bok in view of Chen discloses the electronic device defined in claim 12. Bok in view of Chen does not expressly disclose further comprising: a display driver integrated circuit on the silicon substrate that drives both the first array of pixels and the second array of pixels. Chen (Fig. 1-16) discloses further comprising: a display driver integrated circuit (134; Fig. 13; Paragraph [0049]; wherein discloses a panel driving portion) on the silicon substrate (102; Fig. 13; Paragraph [0039]; wherein discloses “In addition, the materials of the first substrate 102 and the second substrate 114 may include, but are not limited to, glass, quartz, sapphire, silicon wafer, polycarbonate (PC), polyimide (PI), polyethylene terephthalate (PET), liquid-crystal polymers (LCP), rubbers, glass fibers, ceramics, other polymer materials, any other suitable substrate material, or a combination thereof”) that drives both the first array of pixels (104; Fig. 13) and the second array of pixels (106; Fig. 13). Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Bok in view of Chen’s display device by applying a driving circuit, as taught by Chen, so to use a display device with a driving circuit for providing to develop a design that can effectively reduce heterogeneity in the hybrid display device (Paragraph [0005]). Claim 15, Bok discloses the electronic device defined in claim 14. Bok does not expressly disclose further comprising: a plurality of vias through the dielectric substrate that electrically connect contacts on the silicon substrate to the first array of pixels. Chen (Fig. 1-16) discloses further comprising: a plurality of vias (152B and 152A; Fig. 13) through the dielectric substrate (102; Fig. 13; Paragraph [0039]; wherein discloses “In addition, the materials of the first substrate 102 and the second substrate 114 may include, but are not limited to, glass, quartz, sapphire, silicon wafer, polycarbonate (PC), polyimide (PI), polyethylene terephthalate (PET), liquid-crystal polymers (LCP), rubbers, glass fibers, ceramics, other polymer materials, any other suitable substrate material, or a combination thereof”) that electrically connect contacts (108; Fig. 13) on the silicon substrate (114; Fig. 13; Paragraph [0039]; wherein discloses “In addition, the materials of the first substrate 102 and the second substrate 114 may include, but are not limited to, glass, quartz, sapphire, silicon wafer, polycarbonate (PC), polyimide (PI), polyethylene terephthalate (PET), liquid-crystal polymers (LCP), rubbers, glass fibers, ceramics, other polymer materials, any other suitable substrate material, or a combination thereof”) to the first array of pixels (104; Fig. 13). Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Bok in view of Chen’s display device by applying a driving circuit, as taught by Chen, so to use a display device with a driving circuit for providing to develop a design that can effectively reduce heterogeneity in the hybrid display device (Paragraph [0005]). Claims 18-21 are rejected under 35 U.S.C. 103 as being unpatentable over Bok et al (US 2021/0191552 A1) in view of Chen et al (US 2019/0339570 A1). Claim 18, Bok (Fig. 1-104) discloses a display (1; Fig. 1; wherein discloses a display apparatus) comprising: a frontplane (10; Fig. 81, 82, and 84B) that comprises: a dielectric substrate (100; Fig. 81, 82, and 84B; Paragraph [0236]; wherein discloses “The substrate 100 may include an insulative material, such as glass, quartz, and polymer resin”); and an array of organic light-emitting diode pixels (ED1; Fig. 81, 82, and 84B; Paragraph [0363]) that is formed on the dielectric substrate (100; Fig. 81, 82, and 84B); a backplane (20; Fig. 81, 82, and 84B) that comprises: a silicon substrate (200; Fig. 81, 82, and 84B; Paragraph [0819]; wherein discloses “The substrate 200 may be implemented as a silicon bulk wafer or an epitaxial wafer”); and a plurality of attachment structures (201; Fig. 82; Paragraph [0788]; wherein discloses “As shown in FIG. 82, the second display panel 20 may be attached to the bottom of the first display panel 10”) that are configured to mechanically connect (Fig. 82; wherein through a manufacturing method shows the means of connected connecting the first display 10 to the second display 20; Fig. 84A and 84B; wherein figure shows a different embodiment in which the second display 20 is attached to a mechanical structure; Paragraph [0802-0803]) the frontplane (10; Fig. 82) to the backplane (20; Fig. 82). Bok does not expressly disclose circuitry in the silicon substrate that is configured to operate the array of organic light-emitting diode pixels; and a plurality of attachment structures that are configured to electrically connect the frontplane to the backplane. Chen (Fig. 1-16) discloses circuitry (134; Fig. 13; Paragraph [0049]; wherein discloses a panel driving portion) in the silicon substrate (102; Fig. 3; Paragraph [0039]; wherein discloses “In addition, the materials of the first substrate 102 and the second substrate 114 may include, but are not limited to, glass, quartz, sapphire, silicon wafer, polycarbonate (PC), polyimide (PI), polyethylene terephthalate (PET), liquid-crystal polymers (LCP), rubbers, glass fibers, ceramics, other polymer materials, any other suitable substrate material, or a combination thereof”) that is configured to operate the array of organic light-emitting diode pixels (104; Fig. 13; Paragraph [0036]; wherein discloses “the first display structure 104 and the second display structure 106 are each selected from a group consisting of a liquid-crystal display, an organic light-emitting diode display, an inorganic light-emitting diode display and a laser display”); and a plurality of attachment structures (152B and 152A; Fig. 13) that are configured to electrically connect the frontplane (106; Fig. 13) to the backplane (104; Fig. 13). Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Bok’s display device by applying a driving circuit, as taught by Chen, so to use a display device with a driving circuit for providing to develop a design that can effectively reduce heterogeneity in the hybrid display device (Paragraph [0005]). Claim 19, Chen (Fig. 1-16) discloses wherein the attachment structures (152A and 15B; Fig. 13) are conductive bumps (Paragraph [0077]). Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Bok’s display device by applying a driving circuit, as taught by Chen, so to use a display device with a driving circuit for providing to develop a design that can effectively reduce heterogeneity in the hybrid display device (Paragraph [0005]). Claim 20, Bok (Fig. 1-104) discloses wherein the array of organic light-emitting diode pixels (ED2; Fig. 81, 82, and 84B; Paragraph [0790]; wherein discloses “Alternatively, the second light-emitting elements ED2 may be organic light-emitting diodes”) is interposed between the dielectric substrate (100; Fig. 81, 82, and 84B; Paragraph [0236]; wherein discloses “the substrate 100 may include an insulative material, such as glass, quartz, and polymer resin”) and the silicon substrate (200; Fig. 81, 82, and 84B; Paragraph [0819]; wherein discloses “The substrate 200 may be implemented as a silicon bulk wafer or an epitaxial wafer”) and wherein the dielectric substrate is a transparent glass substrate (100; Fig. 81, 82, and 84B; Paragraph [0236]; wherein discloses “the substrate 100 may include an insulative material, such as glass, quartz, and polymer resin”). Claim 21, Bok (Fig. 1-104) discloses wherein the dielectric substrate (100; Fig. 81, 82, and 84B; Paragraph [0236]; wherein discloses “the substrate 100 may include an insulative material, such as glass, quartz, and polymer resin”) is interposed between the array of organic light-emitting diode pixels (ED1; Fig. 81, 82, and 84B; Paragraph [0363]) and the silicon substrate (200; Fig. 81, 82, and 84B; Paragraph [0819]; wherein discloses “The substrate 200 may be implemented as a silicon bulk wafer or an epitaxial wafer”). Chen (Fig. 1-16) discloses wherein the frontplane (104; Fig. 13) further comprises: a plurality of vias (152A and 152B; Fig. 13) through the dielectric substrate (102; Fig. 13; Paragraph [0039]; wherein discloses “ In addition, the materials of the first substrate 102 and the second substrate 114 may include, but are not limited to, glass, quartz, sapphire, silicon wafer, polycarbonate (PC), polyimide (PI), polyethylene terephthalate (PET), liquid-crystal polymers (LCP), rubbers, glass fibers, ceramics, other polymer materials, any other suitable substrate material, or a combination thereof”) that electrically connect the plurality of attachment structures (108 and 120; Fig. 13) to the array of organic light-emitting diode pixels (Paragraph [0036]; wherein discloses “The first display structure 104 and the second display structure 106 are each selected from a group consisting of a liquid-crystal display, an organic light-emitting diode display, an inorganic light-emitting diode display and a laser display”). Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Bok’s display device by applying a driving circuit, as taught by Chen, so to use a display device with a driving circuit for providing to develop a design that can effectively reduce heterogeneity in the hybrid display device (Paragraph [0005]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADAM J SNYDER whose telephone number is (571)270-3460. The examiner can normally be reached Monday-Friday 8am-4:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chanh D Nguyen can be reached at (571)272-7772. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Adam J Snyder/Primary Examiner, Art Unit 2623 03/14/2026
Read full office action

Prosecution Timeline

May 22, 2024
Application Filed
Mar 19, 2026
Non-Final Rejection mailed — §102, §103
May 07, 2026
Examiner Interview Summary
May 07, 2026
Applicant Interview (Telephonic)
May 14, 2026
Response Filed

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Prosecution Projections

1-2
Expected OA Rounds
70%
Grant Probability
88%
With Interview (+18.8%)
2y 7m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 902 resolved cases by this examiner. Grant probability derived from career allowance rate.

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