DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 11-17, 21-33 is/are rejected under 35 U.S.C. 103 as being unpatentable over Asano et al. 20180260334 herein Asano, Chou 20180260319 herein Chou and Christenson 20160034294 herein Christenson.
Per claim 11, Asano discloses: receiving, by a storage device, a command to adjust a size of a namespace; (¶0054; A method 700 of increasing a namespace is shown in FIG. 7. Upon receipt of a command from a host 110 to increase the size of the NSA for a namespace NSIDx; ¶0055; a manner of decreasing the namespace according an implementation of the present disclosure. Here an NSAU entry 850 in NSAU LUT 450 is removed following a command received by the SSD 120 from a host 110 for namespace resizing) in response to the command, adjusting a namespace map to change a number of blocks of logical addresses allocated to the namespace while maintaining logical addresses of data stored in the namespace;(¶0054; .. the controller determines the number of unallocated NSAUs available in the LCA space. The controller then determines if the number of unallocated NSAUs in the LCA space is greater than or equal to the number of NSAUs required to increase the NSA as required by the host (step S730). If the number of unallocated NSAUs in the LCA space is greater than or equal to the number of NSAUs required, the controller creates a new entry in the NSAU LUT 450 for NSIDx in step S740. This new entry in the NSAU LUT 450 is added as the very last entry in the NSAU LUT 450) and translating logical addresses in the namespace to physical addresses for a non-volatile storage medium of the storage device using the adjusted namespace map (¶0041; SSD controller 130 first converts the namespace-based address to a linear, internal address, termed a logical cluster address (LCA), using the NSID and uses the LCA as an index to a logical-to-physical lookup table. Within the linear address space that is associated with the NSID, the namespaces are arrayed in a back-to-back manner, so that the NSID corresponding to one namespace are adjacent to the NSID corresponding to the subsequent namespace).
Asano discloses a look up table for the namespace but does not specifically disclose: wherein the namespace map comprises an array storing identifications of blocks of logical addresses allocated to the namespace.
However, Chou discloses: wherein the namespace map comprises an array storing identifications of blocks of logical addresses allocated to the namespace (¶0022; FIG. 4 is a global H2F mapping table created by the control unit 210 in accordance with an embodiment of the present invention. The size of the global H2F mapping table is proportional to the sum of the capacity of each namespace indicated in the set values. The global H2F mapping table can be partitioned into a plurality of sectors, and the total number of sectors is equal to the namespace number indicated in the create command For example, the global H2F mapping table is partitioned into four sectors, and each sector corresponds to one namespace. Assuming that each of the namespace capacities indicated in the set values is identical, the length of each sector in the global H2F mapping table would also be identical. Assuming that each record of data in the global H2F mapping table has a size of 8 B for recording a correspondence of 4K data from the host 100 and that each of the namespaces to be created #0 to #3 has a capacity of 64 MB for recording 16,384 records of data, the total capacity of the namespaces #0 to #3 would be 256 MB, and the global H2F mapping table created in step S210 would have a size of 512 KB and record the correspondence between the 65,536 LBAs (e.g., LBA0 to LBA65535) and the physical address (e.g., block ID and page ID).)
It would have been obvious to one having ordinary skill in the art at the effective filing date of the invention to combine the teachings of Asano and Chou’s namespace mapping to manage multiple namespace access. Chou’s namespaces avoid insufficient and limiting of system resources (¶0008; the present invention prevents system resources (e.g., spare spaces) from being partitioned for supporting the multiple namespaces, thereby avoiding the insufficiency or limiting of the system resources).
The combined teachings of Asano and Chou disclose a namespace map maintaining LBA’s but do not specifically disclose: and wherein each of the blocks of logical addresses comprises a predetermined number of contiguous logical addresses of a logical address capacity of the non-volatile storage medium.
However, Chistenson discloses: wherein each of the blocks of logical addresses comprises a predetermined number of contiguous logical addresses of a logical address capacity of the non-volatile storage medium (¶0071; This shared memory pool is alternatively characterized as active memory, or virtual real memory. The amount or volume of memory within shared memory pool 340 may be dynamically allocated or adjusted between the shared memory partitions into sub-volumes or sets of physical pages to accommodate workloads. These dynamically allocated adjusted sub-volumes or sets of physical pages in the shared memory pool are associated with the multiple logical partitions and may comprise contiguous or disparate physical memory locations within the shared memory pool. A physical memory page of the shared memory pool becomes part of a sub-volume of a particular logical partition when a logical memory page thereof is associated with or mapped to that physical page).
It would have been obvious to one having ordinary skill in the art at the effective filing date of the invention to combine the teachings of Asano and Christenson’s on demand configurable computing to rapidly provision and release resources with minimal effort from a service provider. Christenson optimizes resource (¶0027).
Per claim 12, Asano discloses: wherein the command is a command to increase the size of the namespace, and wherein the adjusting comprises allocating additional blocks of logical addresses to the namespace (0054; A method 700 of increasing a namespace is shown in FIG. 7. Upon receipt of a command from a host 110 to increase the size of the NSA for a namespace NSIDx .. the controller determines the number of unallocated NSAUs available in the LCA space. The controller then determines if the number of unallocated NSAUs in the LCA space is greater than or equal to the number of NSAUs required to increase the NSA as required by the host (step S730). If the number of unallocated NSAUs in the LCA space is greater than or equal to the number of NSAUs required, the controller creates a new entry in the NSAU LUT 450 for NSIDx in step S740. This new entry in the NSAU LUT 450 is added as the very last entry in the NSAU LUT 450).
Per claim 13, Asano discloses: wherein the command is a command to increase the size of the namespace, and wherein the adjusting comprises allocating additional blocks of logical addresses to the namespace (0055; a manner of decreasing the namespace according an implementation of the present disclosure. Here an NSAU entry 850 in NSAU LUT 450 is removed following a command received by the SSD 120 from a host 110 for namespace resizing.. Prior to receiving such a command, NSAU 850 corresponded to an LCA pointer 852 that mapped to an NSAU cluster 854 in the LCA space. Once NSAU entry 850 is removed, pointer 852 to NSAU 854 is also removed from the NSAU LUT 450, and the status of that cluster is updated to unallocated. Unallocated NSAU 854 then forms part of the unallocated NSAU pool and becomes available for assignment should a namespace be added as in FIGS. 6 and 7).
Per claim 14, Asano discloses: wherein the adjusting comprises modifying a pointer in the namespace map to point to a different block of logical addresses (0053; While the clusters allocated to a namespace need not be contiguous (or indeed arranged in any particular order) in the LCA space 600, the NSAU LUT table entries for the namespace do need to be in contiguous order of NSID, hence the need to re-order NSAU LUT after increasing the size of a namespace. As previously mentioned, this re-ordering of NSAU pointers according to NSID in the NSAU LUT 450 does not require any movement of data as only the NSID and corresponding pointers to the LCA space that get re-arranged).
Per claim 15, Asano discloses: wherein the adjusting comprises modifying a size indicator in the namespace map to indicate a different size for a block of logical addresses allocated to the namespace (fig. 4A, ¶0040; An address in the address space includes the namespace identifier NSID 210 and a logical address 220 within the namespace (also referred to as an offset or an offset within the namespace). The logical address 220 is the LBA; the examiner notes that the size indicator is merely a value indicating a list of blocks identified via the block ID’s (see ¶0067)).
Per claim 16, Asano discloses: further comprising after adjusting the namespace map, writing data to the namespace using the adjusted namespace map (0037; Commands from host 110 include requests to read or write to locations within the NV semiconductor memory 140, and various administrative commands, such as commands for querying the feature set of storage device 120, commands for formatting the NV semiconductor memory 140, commands for creating and modifying various types of queues, commands for requesting notification of various events, and various other commands.).
Per claim 17, Asano discloses: further comprising after adjusting the namespace map, reading data from the namespace using the adjusted namespace map (0051; when a read command is received from a host 110 to read 23 clusters from NSID ‘1’ and LCA=137, for example, the NSID pointer table 430 entry 411 is read to obtain the start pointer corresponding to NSID ‘1’.).
Per claim 27, Asano discloses: further comprising after adjusting the namespace map, reading data from the namespace using the adjusted namespace map (0051; when a read command is received from a host 110 to read 23 clusters from NSID ‘1’ and LCA=137, for example, the NSID pointer table 430 entry 411 is read to obtain the start pointer corresponding to NSID ‘1’.).
Claims 21-26 are the device claims corresponding to the method claims 11-17 and are rejected under the same reasons set forth in connection with the rejection of claims 11-17.
Claims 28-33 are the CRM claims corresponding to the method claims 11-17 and are rejected under the same reasons set forth in connection with the rejection of claims 11-17.
Response to Arguments
Applicant’s arguments, filed 6/11/26, with respect to the amendment(s) of claim(s) 11, 21 and 28 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Christenson. Christenson discloses: This shared memory pool is alternatively characterized as active memory, or virtual real memory. The amount or volume of memory within shared memory pool 340 may be dynamically allocated or adjusted between the shared memory partitions into sub-volumes or sets of physical pages to accommodate workloads. These dynamically allocated adjusted sub-volumes or sets of physical pages in the shared memory pool are associated with the multiple logical partitions and may comprise contiguous or disparate physical memory locations within the shared memory pool. A physical memory page of the shared memory pool becomes part of a sub-volume of a particular logical partition when a logical memory page thereof is associated with or mapped to that physical page.
Applicant’s arguments filed 6/11/26 regarding the Chou reference have been fully considered but they are not persuasive.
In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986).
Asano is relied upon to teach adjusting a size of the namespace, changing the namespace map and translating the logical addresses to physical addresses. Though Asano discloses a look up table to translate the address, it does not specifically discloses a namespace map comprising identification of logical address allocated to the namespace. Chou is relied upon to teach the namespace map comprising an array storing identification of logical address allocated to the namespace. The applicant argues that Chou does not teach an array storing identification of logical address allocated to the namespace. The examiner respectfully disagrees with that assertion. First the applicant’s remarks does not provide an explanation of how the namespace map, array an identification differ from the cited H2F. Chou clearly discloses an means to identify the partitioned sectors which correspond to the namespaces, the specific contiguous LBA’s within the range of LBA’s for the namespaces. Therefore, Chou discloses an array storing identification of logical address allocated to the namespace.
Remark
Examiner respectfully requests, in response to this Office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist Examiner in prosecuting the application.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BABOUCARR FAAL whose telephone number is (571)270-5073. The examiner can normally be reached on M-F 8:30-5:30 EST.
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BABOUCARR . FAAL
Primary Examiner
Art Unit 2138
/BABOUCARR FAAL/Primary Examiner, Art Unit 2131
Prosecution Insights