DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Knierim et al. (US 20200256893) in view of Draving (US 20200064386).
Regarding claim 1, Knierim et al. teach providing first (12, Fig. 1) and second oscilloscopes (14, 16 or 18, Fig. 1) each having a timebase reference oscillator, the timebase reference oscillator of each of the first and second oscilloscopes configured to generate a timebase reference signal of a given output frequency; ([0017] In USL mode, the master instrument would normally output from its AUX Out port a square wave or other periodic function signal having a predetermined frequency as a reference or master clock. Each slave instrument would lock its timebase to the reference clock received at its AUX In port, for example by using a phase-locked loop (PLL).)
phase-locking the timebase reference oscillators of the first and second oscilloscopes together; ([0017] In USL mode, the master instrument would normally output from its AUX Out port a square wave or other periodic function signal having a predetermined frequency as a reference or master clock. Each slave instrument would lock its timebase to the reference clock received at its AUX In port, for example by using a phase-locked loop (PLL).)
Knierim et al. does not teach A method for measuring the phase jitter and phase noise of a signal-under-test (SUT);
generating a first phase jitter measurement of the SUT using the first oscilloscope and generating a second phase jitter measurement of the SUT using the second oscilloscope; and
applying the SUT to an input channel of the first oscilloscope and to an input channel of the second oscilloscope;
obtaining the phase jitter and phase noise of the SUT from the first and second phase jitter measurements.
Draving teach A method for measuring the phase jitter and phase noise of a signal-under-test (SUT) (Note par. 0017)
applying the SUT to an input channel of the first oscilloscope and to an input channel of the second oscilloscope; ([0036] Referring to FIG. 2, the method includes receiving the SUT output by the DUT at block S211, where the SUT may be an RF signal. In the depicted embodiment, two copies of the SUT are received via first and second channels of the signal measurement device as a first copy and a second copy, respectively. When the SUT is a single-ended RF signal, the first and second copies of the SUT may be obtained using an RF splitter or a diplexer, for example. When the SUT is a differential signal, the first and second two copies may be inverted and non-inverted portions of the differential signal, respectively.
[0037] The first copy is received by a first input channel of one or more test systems (e.g., test system 100, 100′), and the second copy is received by a second input channel of the one or more test systems. For example, the first and second input channels may be part of a single oscilloscope. Or, the first input channel may be part of a first oscilloscope and the second input channel may be part of a second oscilloscope, where the first and second oscilloscopes are synchronized with one another.)
generating a first phase jitter measurement of the SUT using the first oscilloscope and generating a second phase jitter measurement of the SUT using the second oscilloscope; ([0017] Examples of a SUT characteristic to be measured using an oscilloscope are time-interval error (TIE) jitter, which is a measure of edge time error, and phase noise. ) (Note Draving disclose oscilloscopes measure jitter and phase noise and Examiner takes the position that Knierim et al. show the use of multiple oscilloscopes)
obtaining the phase jitter and phase noise of the SUT from the first and second phase jitter measurements. ([0017] Examples of a SUT characteristic to be measured using an oscilloscope are time-interval error (TIE) jitter, which is a measure of edge time error, and phase noise.)
Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Knierim et al. to include the teaching of applying the SUT to an input channel of the first oscilloscope and to an input channel of the second oscilloscope ; generating a first phase jitter measurement of the SUT using the first oscilloscope and generating a second phase jitter measurement of the SUT using the second oscilloscope; and obtaining the phase jitter and phase noise of the SUT from the first and second phase jitter measurements to increase the accuracy of the measurement of the SUT characteristics. (Note Draving par. 0001)
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Knierim et al. (US 20200256893) in view of Draving (US 20200064386) further in view of Mar et al. (US 10018680).
Knierim et al. teach the instant invention except the following claim limitations.
Regarding claim 5, Knierim et al. does not teach wherein an adjustment update rate of the phase-locking of the timebase oscillators is 1 Hz or less.
Mar et al. teach wherein an adjustment update rate of the phase-locking of the timebase oscillators is 1 Hz or less. (Note column 8, lines 25-30). While Mar et al., does not teach 1Hz or less.
It would have been obvious to one of ordinary skill in the art before the effective filing date to change the frequency taught by Mar et al. to be 1Hz or less since it has been held where the where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation (In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)). One would be motivated to make such a modification in order to test for particular frequencies of operation and identification of various conditions.
Allowable Subject Matter
Claims 2-4,6-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 2, wherein obtaining the phase jitter and phase noise of the SUT comprises cross-correlating the first and second phase jitter measurements to obtain the cross-correlated phase jitter and phase noise of the SUT.
Regarding claim 3, wherein obtaining the phase jitter and phase noise of the SUT comprises determining a phase jitter spectrum of the first and second phase jitter measurements, cross-correlating the determined phase jitter spectrums together, and obtaining the phase noise from the cross-correlated phase jitter spectrums.
Regarding claim 4, wherein an adjustment update rate of the phase-locking of the timebase oscillators is below a lowest intended offset frequency content of the phase jitter and phase noise measurements.
Regarding claim 6, wherein phase-locking of the timebase reference oscillators includes: outputting a first clock signal from the first oscilloscope synchronized with the timebase reference signal of the first oscilloscope; outputting a second clock signal from the second oscilloscope synchronized with the timebase reference signal of the second oscilloscope; applying the first and second clock signals to respective first and second input channels of the first oscilloscope; determining, at an adjustment rate of the phase locking of the timebase oscillators, a frequency and phase difference between the first and second clock signals applied to the respective first and second input channels of the first oscilloscope; and tuning the output frequency of the timebase reference oscillator of at least one of the first and second oscilloscopes based on the determined frequency and phase difference.
Regarding claim 9, wherein each of the first and second oscilloscopes includes a clock input and a clock output configured for ganging together the first and second oscilloscopes, and a phase detector circuit coupled to the clock input and the clock output, and wherein phase-locking the timebase reference oscillators includes: applying the clock output of the second oscilloscope to the clock input of the first oscilloscope; using the phase detector circuit of the first oscilloscope to detect a frequency and phase difference between the second clock signal of the second oscilloscope and an internal first clock signal of the first oscilloscope; and tuning an output frequency of the timebase reference oscillator of at least one of the first and second oscilloscopes based on the determined frequency and phase difference, wherein the first clock signal is synchronized with the timebase reference signal output by the timebase reference oscillator of the first oscilloscope, and the second clock signal is synchronized with the timebase reference clock signal output by the timebase reference oscillator of the second oscilloscope.
Regarding claim 11, wherein the first oscilloscope includes a timebase (TB) reference signal input, an analog phase detector selectively connected to TB reference signal input, and an analog feedback control, wherein phase-locking the timebase reference oscillators includes: applying the timebase reference clock signal of the second oscilloscope to the TB reference signal input of the first oscilloscope; using the analog phase detector to determine a phase difference between the timebase reference clock signal applied to the TB reference signal input and the timebase reference clock signal output by the timebase reference oscillator of the first oscilloscope; and tuning an output frequency of the timebase reference oscillator of the first oscilloscope using the feedback control based on the determined phase difference.
Claims 12-20 are allowed.
Upon conclusion of a comprehensive search of the pertinent prior art, the Office indicates that the claims are allowable.
Regarding independent claim 12, patentability exists, at least in part, with the claimed features of:
wherein the phase jitter and phase noise of the SUT corresponds to a cross-correlation of the first and second phase jitter measurements as claimed in combination with all other limitations of claim 12.
Prior art:
Knierim et al. (US 20200256893) teach A system includes a plurality of oscilloscopes, each oscilloscope having an output port and an input port, a cable connecting the output port of an initial oscilloscope of the plurality of oscilloscopes to the input port of a second oscilloscope of the plurality of oscilloscopes, the initial oscilloscope having a processing element to generate a master run clock, the second oscilloscope having a processing element including a phase-locked loop to lock a slave run clock to the master run clock.
Knierim et al. does not teach the limitations above.
Kharrati et al. (US 20110267036) teach an apparatus includes a first oscilloscope having multiple channels, and a second oscilloscope having multiple channels. The first oscilloscope is configured to operate as a master or as a slave. The first oscilloscope operates as the master by using a first trigger signal and a first clock signal that are native to the first oscilloscope, and the first oscilloscope operates as the slave by using a second trigger signal and a second clock signal that are native to the second oscilloscope.
Kharrati et al. does not teach the limitations above.
Conclusion
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/DEMETRIUS R PRETLOW/ Examiner, Art Unit 2858
/LEE E RODAK/ Supervisory Patent Examiner, Art Unit 2858