DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Examiner Notes
Examiner cites particular columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Response to Amendment and Remarks
The amendment received on 02/23/2024 has been reviewed and considered with the following results:
As to the objection to the claim, Applicants’ remarks have overcome the prior objection, as such; the objection has been withdrawn.
As to the prior rejections to the claims, Applicant’s amendment and arguments have been considered but are moot in view of the new following grounds of rejection. A new action on the merits appears below.
Specification
The disclosure is objected to because of the following informalities: paragraph [0022], the disclosure such as “If the control signal 224 provided by the threshold circuit 203 has the first voltage, then the transistor 204 is turned on and the transistor 208 is turned off to diode-connect the transistor 202, and turn off the transistor 102. If the control signal 224 provided by the threshold circuit 203 has the second voltage, then transistor 208 is turned on, and the transistors 208 and 202 are turned off to allow the driver circuit 106 to control the transistor 102.” (emphasis added) it is unclear how the transistor 208 is turned on and off at the same time. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 10-16 and 21-27 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. According to the original specification and drawings filed on 05/14/2024, the recited limitation “a control circuit having an input coupled to the power terminal and terminals coupled to the control terminal of the first transistor and the second terminal of the first transistor, the control circuit including: a second transistor having a first terminal coupled to the control terminal of the first transistor, a second terminal coupled to the second terminal of the first transistor, and a control terminal; a third transistor having a first terminal coupled to the control terminal of the first transistor, a second terminal coupled to the control terminal of the second transistor, and a control terminal; and a fourth transistor having a first terminal coupled to the control terminal of the third transistor, a second terminal coupled to the second terminal of the first transistor, and a control terminal coupled to the control terminal of the third transistor and to the input of the control circuit.”, as recited in the base Claim 10, is not properly described in the application as to possession of the claimed invention at the time of filing. Therefore, that limitation is seen as a new matter which is not supported by the original disclosure. Applicant is required to cancel the new matter in the reply to this Office Action.
The following drawing is a graph of Claim 10:
PNG
media_image1.png
660
994
media_image1.png
Greyscale
Furthermore, Claims 11-16 and 21-27 are rejected due to their dependencies on the base claim 10.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAI L NGUYEN whose telephone number is (571)272-1747. The examiner can normally be reached Monday-Friday from 09:00am to 06:00pm Eastern time.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lincoln Donovan can be reached on 571-272-1988. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and
https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/HAI L NGUYEN/Primary Examiner, Art Unit 2842 March 8, 2026