Prosecution Insights
Last updated: April 19, 2026
Application No. 18/674,290

THREE-DIMENSIONALLY STACKED NONVOLATILE SEMICONDUCTOR MEMORY

Non-Final OA §112§Other
Filed
May 24, 2024
Examiner
ESCALANTE, OVIDIO
Art Unit
3992
Tech Center
3900
Assignee
Kioxia Corporation
OA Round
3 (Non-Final)
73%
Grant Probability
Favorable
3-4
OA Rounds
2y 8m
To Grant
83%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allow Rate
150 granted / 205 resolved
+13.2% vs TC avg
Moderate +10% lift
Without
With
+9.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
47 currently pending
Career history
252
Total Applications
across all art units

Statute-Specific Performance

§101
3.1%
-36.9% vs TC avg
§103
30.3%
-9.7% vs TC avg
§102
16.4%
-23.6% vs TC avg
§112
25.9%
-14.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 205 resolved cases

Office Action

§112 §Other
DETAILED ACTION This action is in response to the applicant’s amendment filed on October 31, 2025. As set forth therein, claims 13, 15, 17, 18 and 21 are amended. A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on October 31, 2025 has been entered. Notice of Pre-AIA or AIA Status The present application is being examined under the pre-AIA first to invent provisions. Reissue Applications For reissue applications filed before September 16, 2012, all references to 35 U.S.C. 251 and 37 CFR 1.172, 1.175, and 3.73 are to the law and rules in effect on September 15, 2012. Where specifically designated, these are “pre-AIA ” provisions. For reissue applications filed on or after September 16, 2012, all references to 35 U.S.C. 251 and 37 CFR 1.172, 1.175, and 3.73 are to the current provisions. Applicant is reminded of the continuing obligation under 37 CFR 1.178(b), to timely apprise the Office of any prior or concurrent proceed-ing in which Patent No. 8,228,733 is or was involved. These proceedings would include interferences, reissues, reexaminations, and litigation. Applicant is further reminded of the continuing obligation under 37 CFR 1.56, to timely apprise the Office of any information which is mate-rial to patentability of the claims under consideration in this reissue appli-cation. These obligations rest with each individual associated with the filing and prosecution of this application for reissue. See also MPEP §§ 1404, 1442.01 and 1442.04. Response to Arguments Reissue Declaration The Applicant states that when the issues affecting the claim language are resolved a new Declaration can then be filed. The Examiner acknowledges the Applicant’s comments. Thus, the rejection will be maintained until a new declaration is filed. 35 U.S.C. 112 (a) and 35 U.S.C. 251 New Matter As explained by the Applicant, with reference to col. 18 and figure 5, word line voltages are correlated to the column position where smaller column diameters positions are applied with lower voltages. The Examiner agrees that the specification discloses that smaller column diameters are applied with lower voltages. With reference to Figure 5 (cropped below to emphasize on the column), WL<3> is show to have a wider column width than WL<0> which is shown to have a smaller column width. PNG media_image1.png 327 222 media_image1.png Greyscale The Examiner notes that the below table represents the Applicant’s comments regarding the voltages and arrangement of the word lines. 1st Program Operation 2nd Program Operation W<3> ‘4th Word Line’ Sixth Voltage (Claim 15) Eighth Voltage Claim 15) W<2> ‘3rd Word Line’ Fifth Voltage (Claim 15) Seventh Voltage (Claim 15) W<1> ‘2nd Word Line’ Second Voltage (Claim 13) Third Voltage (Claim 13) W<0> ‘1st Word Line’ First Voltage (Claim 13) Fourth Volage (Claim 13) As set forth in the Applicant remarks, in the first program operation, WL<0> to WL<3> corresponds to first, second , fifth and sixth voltages. In addition, the Applicant states that in the second program operation WL<0> to WL<3> correspond to the fourth, third, seventh and eight voltages. In light of the teachings of the specification and the Applicant’s comments, the Examiner notes that the voltages may be in a descending manner due to the column width decreasing as the column goes down. Thus, the higher word lines would have a higher voltage than the lower word lines. With respect to, “a first voltage is applied to the first word line, a second voltage lower than the first voltage is applied to the second word line” as recited in claim 13, the Examiner finds that this limitation is not supported by the specification (and is not consistent with the Applicants arguments) since it requires a voltage applied to the second word line to be lower than the voltage applied to the first word line. In this case, this would mean that a ‘lower’ word lines has a higher voltage than a ‘higher’ word line in the column (as set forth above, the ‘lower’ word line should be a lower voltage than a ‘higher’ word line). The Examiner that the Applicant on pages 12-13 of their response specifically states that WL<0> to WL<3> correspond to the first (Vpgm), second (Vpass), fifth (Vpass) and sixth (Vpass) voltages. The Applicant states that the arrangement in Fig. 5 and Fig. 13 holds as Vpgm > Vpass and the larger diameter column for WL <3> can have the adjusted voltage to be higher than WL <2>. The Examiner notes that if Vpgm is greater than Vpass and if the first voltage is applied to WL<0> and the second voltage is applied to WL<1> as set forth by the Applicant then the second voltage cannot be lower than the first voltage as claimed. Vpgm (first) must be lower than Vpass (second). Thus, the limitation, as recited, contradicts the teachings of the patent specification and Applicant’s statements which discloses that the voltages are arranged in a descending manner due to the column width decreasing. With respect to: “a fifth voltage higher than the second voltage is applied to the third word line, and a sixth voltage higher than the fifth voltage is applied to the fourth word line” as recited in claim 15, the Examiner finds that this limitation is supported by patent specification as well as the above table. With respect to “a third voltage higher than the first voltage is applied to the second word line, and a fourth voltage lower than the third voltage is applied to the first word line” as recited in claim 13, the Examiner finds that this limitation is supported by both the patent specification as well as the above table. With respect to “a seventh voltage higher than the fourth voltage is applied to the third word line, and an eight voltage higher than the seventh voltage is applied to the fourth word line” as recited in claim 15, the Examiner finds that this limitation is supported by both the patent specification as well as the above table. The Examiner notes that with respect to claim 17, the claim recites, “wherein in the first program operation, a fifth voltage lower than the first voltage is applied to the third word line, and a sixth voltage higher than the fifth voltage is applied to the fourth word line”. The Examiner finds that this limitation is not supported by the patent specification since it requires the fifth voltage to be lower than the first voltage. Since the third word line is higher than the first word line, then it should be higher than the first voltage, not lower. The Examiner notes that the below table represents the Applicant’s comments regarding the voltages and arrangement of the word lines. In addition, it is modified (relative to the Table above) to reflect claim 17. 1st Program Operation 2nd Program Operation W<3> ‘4th Word Line’ Sixth Voltage (Claim 17) Eighth Voltage Claim 17) W<2> ‘3rd Word Line’ Fifth Voltage (Claim 17) Seventh Voltage (Claim 17) W<1> ‘2nd Word Line’ Second Voltage (Claim 13) Third Voltage (Claim 13) W<0> ‘1st Word Line’ First Voltage (Claim 13) Fourth Volage (Claim 13) With respect to “in the second program operation, a seventh voltage higher than the fourth voltage is applied to the third word line, and an eighth voltage higher than the seventh voltage is applied to the fourth word line”, as also recited in claim 17, the Examiner finds this limitation is supported by both the patent specification as well as the above table. However, since claim 17 is dependent on claim 16 which is dependent on claim 13, it has the same issue with respect to the first and second voltage as set forth above. The Examiner notes that with respect to claim 18, the claim recites, “a fifth voltage lower than the first voltage is applied to the third word line, and a sixth voltage is applied to the fourth word line, the sixth voltage is the same level with the second voltage, in the second program operation, a seventh voltage is applied to the third word line, and an eighth voltage is applied to the fourth word line, and the seventh voltage is the same level with the eighth voltage”, this limitation is not supported by the patent specification since it recites that the fifth voltage is lower than the first voltage. However, as set forth above, the firth voltage is applied to the third word line which is higher than the first voltage which is applied to the first word line. Thus, according to the specification the fifth voltage must be higher than the first voltage. In addition with respect to “the sixth voltage is the same level with the second voltage” and “the seventh voltage is the same level with the eighth voltage” the Examiner notes that Claim 18 is amended to depend from claim 16 and the ‘seventh and eight voltages are the same when Vpass is not adjusted based on column width”. The Examiner notes that the Applicant points to col. 10, lines 42-56, col. 13, lines 20-33 and column 17, lines 21-38. The Examiner first agrees that the patent specification discloses where different word lines may have the same potential. With respect to “a sixth voltage is applied to the fourth word line, the sixth voltage is the same level with the second voltage” as recited in claim 18, claim 13 recites “a second voltage lower than the first voltage is applied to the second word line”. In this case, if the second voltage is lower than the first voltage, then the claim would require the sixth voltage to also be lower than the first voltage. However, as set forth in the Applicant’s remarks, ‘word line voltages are correlated to the column position where smaller column diameter positions are applied with lower voltages’. 1st Program Operation 2nd Program Operation W<3> ‘4th Word Line’ Sixth Voltage (Claim 18) Eighth Voltage Claim 18) W<2> ‘3rd Word Line’ Fifth Voltage (Claim 18) Seventh Voltage (Claim 18) W<1> ‘2nd Word Line’ Second Voltage (Claim 13) Third Voltage (Claim 13) W<0> ‘1st Word Line’ First Voltage (Claim 13) Fourth Volage (Claim 13) Thus, the Examiner finds that having voltage which are ‘higher’ or ‘lower’ as recited in claim 13 and claim 18 which recites ‘same level’ with respect to voltages on different word lines is not supported by the specification in the same embodiment. The Examiner agrees that both voltages can be the same voltage type (e.g. Vpass), however in the claimed embodiment, it’s not shown in the specification an arrangement in which the voltages are both lower/higher based on the word line relative to other word lines while also be the same level. Thus, the Examiner does not find the Applicant’s arguments persuasive with respect to claim 18. 35 U.S.C §112(b) The Examiner notes that the Applicant amended claim 18 to be dependent upon Claim 16. In addition, the Applicant states the seventh and eight voltages are the same when Vpass is not adjusted based on column width. The Examiner acknowledges the Applicant’s amendment, however, if the voltages are not adjusted based on column width, it is not clear how claim 18 could have the same voltages whereas the base claim requires different voltages for the different word lines. It is not clear how claim 18, can be in the same embodiment as what is recited in claim 13. 35 U.S.C. §103 The Applicant states that in Claim 13, the first and second bit lines are applied with the same voltage whereas in So, the word and bit lines are adjusted based on the position of the cell with respect to the wordline and the bit line. The Applicant also states that So does not describe how the different distances to the word and bit line driers apply to a stacked structure or that higher level cells would have higher voltage applied. The Applicant maintains that he problems would the drivers in So occur on a single-plane configuration. The Applicant also presents a similar argument with respect to claim 21 in that the bit line voltages are the same whereas in So, different bit line voltages are applied. The Examiner acknowledges that in So adjacent memory cell have different distances to the word and bit line drivers and thus, word and bit line voltages are adjusted based on position of the cell relative to the word line and bit line. Therefore, the Examiner finds the Applicant’s arguments persuasive. Reissue Declaration The reissue oath/declaration filed with this application is defective (see 37 CFR 1.175 and MPEP § 1414) because of the following: As set forth in the Reissue Declaration, the error statement was directed to the following: “Claims 1-12 of U.S. Patent 8,228,733 are directed to a three-dimensionally stacked nonvolatile memory, whereas new claims 13-24 are directed to a memory system.” The Examiner notes that this error statement is a duplicate of the error statement set forth in the parent reissue 17/832,228 and the Applicant has not shown how the instant reissue corrects the error in a different way. In addition, the stated error was already corrected in the parent reissue and the error statement recites additional claims (i.e. claims 23 and 24) which are not present in the current reissue application. Therefore, the Reissue Declaration does not identify an error being corrected by the instant reissue. Claims 13-22 are rejected as being based upon a defective reissue declaration under 35 U.S.C. 251 as set forth above. See 37 CFR 1.175. The nature of the defect(s) in the declaration is set forth in the discussion above in this Office action. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 13-22 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. The Examiner finds that the claim is directed to a nonvolatile semiconductor memory comprising a semiconductor substrate, a first word line, a second word line located on one side of the first word line and where a first semiconductor column penetrates the first and the second word line in a third direction. In addition, the claim recites a control circuit configured to perform: “a first program operation targeted to the first word line in which a first voltage is applied to a first word line, and a second voltage lower than the first voltage is applied to the second word line, and voltages applied to the first and second bit lines are the same” “a second program operation targeted to the second word line in which a third voltage higher than the first voltage is applied to the second word line, and a fourth voltage lower than the third voltage is applied to the first word line, and voltages applied to the first and second bit lines are the same” The Examiner acknowledges that the claim recites two different program operations, a first program operation targeted to the first word line and a second program operation for the second word line. With these two program operations, a first voltage is applied to the first word line and a second voltage is applied to the second wordline where the second voltage is lower than the first voltage. The Examiner notes that the second program operation which is targeted to the second word line, recites a third voltage that is higher than the first voltage is applied to the second word line, and a fourth voltage lower than the third voltage is applied to the first word line. The Examiner provides the below table to show how the voltages are applied to the word lines. 1st Program Operation 2nd Program Operation W<1> ‘2nd Word Line’ Second Voltage (Claim 13) Third Voltage (Claim 13) W<0> ‘1st Word Line’ First Voltage (Claim 13) Fourth Volage (Claim 13) The Examiner notes that for the first program, the claim recites that the second voltage is lower than the first voltage; however when conducting the second program operation, a third voltage for the second word line is higher than the first voltage and a fourth voltage lower than the third voltage is applied to the first word line. In this case, the Examiner maintains that the specification does not appear to disclose an embodiment in which the second voltage is lower than the first voltage in the same embodiment where a third voltage is higher than the first voltage and where a fourth voltage is lower than the third voltage that is applied to the first word line. The Applicant cites to the following for support: Figs. 1-5, 7, 8, 10, 12-13 and 20; col. 10, lines 42-56, col. 13, lines 20-33 and col. 17, lines 21-38. The Examiner notes that Figs. 1-5, 7, 8, 10, 12-13 and 20 are not specific to any voltage potentials between the word lines. Figure 13 shows that for a voltage program WL<0> has a higher potential than voltage pass WL<0>. This figure does not appear disclose a second program operation. With respect to col. 10, lines 42-56, the ‘733 specification discloses: Thus, during the writing operation, a potential suitable for the writing of data has only to be supplied to the selected word line, so that the write potential Vpgm_WL<0> for the first word line WL<0> may be the same as or different from the write potential Vpgm_WL<3> for the fourth word line WL<3>. Similarly, the read nonselection potentials Vread_WL<2>D, Vread_WL<1>D when the first word line WL<0> is selected may be the same as or different due to interference between adjacent cells from the read nonselection potentials Vread_WL<2>S, Vread_WL<1>S when the fourth word line WL<3> is selected. In this citation, the ‘733 patent recites that there is a potential difference between the first and third word lines or between the first and the fourth word lines. However, this section does not provide any details as to the claimed first and second program operations where the voltages are lower or higher than other voltages. The Examiner notes that the citation also states that the write potentials may be the same or different but does not provide any details as to how they are they different. That is, this does not show that one potential is higher than another potential in the manner that is claimed for the first and second program operations for each respective word line. With respect to col. 13, lines 20-33, the ‘733 specification states: Therefore, when there are variations in shape as shown in FIG. 6, the write potential provided to the upper side (bit line side) word line WL<3> is greater than the potential provided to the lower side (semiconductor substrate side) word line WL<0> if writing of data is set to be achieved within the constant writing time as shown in FIG. 13. In the case of the nonselection potential Vpass for sufficiently boosting up the channel area of the nonselected cell during the writing operation, the potential provided to the upper side word line WL<3> is also greater than the potential provided to the lower side word line WL<0>. In this citation, the Examiner acknowledges that the specification discloses that an upper side word line (closest to the bit line) would have a higher potential than a lower word line (closest to the semiconductor substrate) for a write operation. In this case, a second line voltage is higher than a first word line voltage. The Examiner finds that although this is consistent with a program operation in which a second voltage is higher than a first voltage (where the first word line is lower than a second word line) this citation does not support where a second program operation targeted to the second word line in which a third voltage higher than the first voltage is applied to the second word line, and a fourth voltage lower than the third voltage is applied to the first word line or that for a first program operation where a second voltage applied to the second word line is lower than a first voltage applied to the first word line. As set forth above, specification provides where a second word line voltage would be higher than a first word line voltage since the second wordline voltage would be closer to the bit line side. With respect to col. 17, lines 21-38, the ‘733 specification states: In addition, in the present adjustment example, the write potential used as the reference value and supplied to the first word line WL<0> tends to be lower than the write potentials for the other word lines WL<1> to WL<3> (see FIG. 13). Therefore, when the write potential supplied to the first word line serves as the reference value as in the present adjustment example, a write potential equal to or higher than the reference value is set and generated, so that the circuit configuration includes the adder 356. This can make a contribution to easier control of the circuits and to the reduction in circuit scale. On the contrary, when the potential supplied to the fourth word line WL<3> is the reference value, the write potential supplied to the fourth word line tends to be higher than the write potentials for the other word lines. Therefore, in this case, write potentials equal to or lower than the reference value are set and generated for the other word lines WL<0> to WL<2>, so that a circuit configuration which uses a subtracter instead of the adder 356 is preferable. The Examiner finds that this citation is also consistent with the earlier citation in that the higher word lines have a greater potential than the lower word lines, However, this citation does not support an embodiment in which a second program operation targeted to the second word line in which a third voltage higher than the first voltage is applied to the second word line, and a fourth voltage lower than the third voltage is applied to the first word line or that for a first program operation where a second voltage applied to the second word line is lower than a first voltage applied to the first word line. In addition, the Examiner finds that the limitation set forth in dependent claims 15 and 17 are likewise not shown in the above citations as well as in independent claim 21 and are thus rejected for similar reasons. The Examiner notes with respect to claim 18, the above citations do not show where the sixth voltage is the same level with second voltage and seventh is the same level as the eighth voltage. With respect to claim 16, the claim recites that the third word line is located at the same level as the first word line and the fourth word line is located at the same level with the second word line. The Applicant only points to “Figure 1” for support, however, Figure 1 does not explain how the third word line is located “on the same level” as the first word line or that the fourth word line is located “at the same level” as the second word line. Each word lines is illustrated to be on different levels. With respect to claim 18, the claim recites that the fifth voltage lower than the first voltage is applied to the third word line and a sixth voltage is applied to the fourth word line. The claim also recites that the sixth voltage is “the same level” with the second voltage. In addition, the claim recites that in the second program operation, a seventh voltage is applied to the third word line, and an eight voltage is applied to the fourth word line. The claim then recites that the seventh voltage is the same level with the eight voltage. The Examiner acknowledges that the voltages can by of the same type such as Vpass, however, stating that the voltage is “the same level” is not clearly supported in the provided citations. The applicant references col. 10, lines 42-56, col. 13, lines 20-33 and col. 17, lines 21-38 (citations provided above). It is noted that these citations do not show how the voltages are “the same level” as claimed. Claims 13-22 are rejected under 35 U.S.C. 251 as being based upon new matter added to the patent for which reissue is sought. The added material which is not supported by the prior patent is set forth above. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Ovidio Escalante whose telephone number is (571)272-7537. The examiner can normally be reached on Monday to Friday - 6:00 AM to 2:30 PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Michael Fuelling can be reached on (571) 270-1367. The fax phone number for the organization where this application or proceeding is assigned is 571-273-9000. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR.Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Ovidio Escalante/ Primary Examiner Central Reexamination Unit - Art Unit 3992 (571) 272-7537 Conferees: /MATTHEW E HENEGHAN/Primary Examiner, Art Unit 3992 /M.F/Supervisory Patent Examiner, Art Unit 3992
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Prosecution Timeline

May 24, 2024
Application Filed
May 24, 2024
Response after Non-Final Action
Apr 01, 2025
Non-Final Rejection — §112, §Other
Jul 08, 2025
Response Filed
Jul 22, 2025
Final Rejection — §112, §Other
Oct 31, 2025
Request for Continued Examination
Nov 05, 2025
Response after Non-Final Action
Feb 04, 2026
Non-Final Rejection — §112, §Other (current)

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Prosecution Projections

3-4
Expected OA Rounds
73%
Grant Probability
83%
With Interview (+9.6%)
2y 8m
Median Time to Grant
High
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