Prosecution Insights
Last updated: July 17, 2026
Application No. 18/674,290

THREE-DIMENSIONALLY STACKED NONVOLATILE SEMICONDUCTOR MEMORY

Final Rejection §Other
Filed
May 24, 2024
Priority
Oct 21, 2008 — JP 2008-271279 +6 more
Examiner
ESCALANTE, OVIDIO
Art Unit
3992
Tech Center
3900
Assignee
KIOXIA Corporation
OA Round
4 (Final)
74%
Grant Probability
Favorable
5-6
OA Rounds
2m
Est. Remaining
83%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allowance Rate
161 granted / 216 resolved
+14.5% vs TC avg
Moderate +8% lift
Without
With
+8.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
38 currently pending
Career history
257
Total Applications
across all art units

Statute-Specific Performance

§101
1.4%
-38.6% vs TC avg
§103
46.9%
+6.9% vs TC avg
§102
11.5%
-28.5% vs TC avg
§112
7.9%
-32.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 216 resolved cases

Office Action

§Other
DETAILED ACTION This action is in response to the applicant’s amendment filed on April 22, 2026. As set forth therein, claims 16-18 are amended. Claims 13-22 remain pending. Notice of Pre-AIA or AIA Status The present application is being examined under the pre-AIA first to invent provisions. Reissue Applications For reissue applications filed before September 16, 2012, all references to 35 U.S.C. 251 and 37 CFR 1.172, 1.175, and 3.73 are to the law and rules in effect on September 15, 2012. Where specifically designated, these are “pre-AIA ” provisions. For reissue applications filed on or after September 16, 2012, all references to 35 U.S.C. 251 and 37 CFR 1.172, 1.175, and 3.73 are to the current provisions. Applicant is reminded of the continuing obligation under 37 CFR 1.178(b), to timely apprise the Office of any prior or concurrent proceed-ing in which Patent No. 8,228,733 is or was involved. These proceedings would include interferences, reissues, reexaminations, and litigation. Applicant is further reminded of the continuing obligation under 37 CFR 1.56, to timely apprise the Office of any information which is mate-rial to patentability of the claims under consideration in this reissue appli-cation. These obligations rest with each individual associated with the filing and prosecution of this application for reissue. See also MPEP §§ 1404, 1442.01 and 1442.04. Response to Arguments Reissue Declaration The Applicant states that when the issues affecting the claim language are resolved, a new Declaration can then be filed. The Examiner acknowledges the Applicant’s comments. Thus, the rejection will be maintained until a new declaration is filed. 35 U.S.C. 112 (a) and 35 U.S.C. 251 New Matter The Applicant states that the Office Action (non-final office action of February 6, 2026) correctly correlates the voltages applied in the recited first and second program operations in the following table: 1st Program Operation 2nd Program Operation W<3> ‘4th Word Line’ Sixth Voltage (Claim 15) Eighth Voltage Claim 15) W<2> ‘3rd Word Line’ Fifth Voltage (Claim 15) Seventh Voltage (Claim 15) W<1> ‘2nd Word Line’ Second Voltage (Claim 13) Third Voltage (Claim 13) W<0> ‘1st Word Line’ First Voltage (Claim 13) Fourth Volage (Claim 13) The Applicant states that the first program operation is shown above in the WL<0> Program where WL<1> is lower than WL<0> since Vpgm is higher than Vpass. The Applicant states that Lower wordlines can have a voltage higher than higher word lines when Vpgm is being applied to a lower word line. The Applicant states that the relation “a second voltage lower than the first voltage is applied to the second word line” of Claim 13 is supported by Vpass being applied to WL<1> while Vpgm is applied to WL<0>. The Examiner notes that claim 13 recites: “a first program operation targeted to the first word line in which a first voltage is applied to the first word line, a second voltage lower than the first voltage is applied to the second word line…” “a second program operation targeted to the second word line in which a third voltage higher than the first voltage is applied to the second word line, and a fourth voltage lower than the third voltage is applied to the first word line …” The Examiner notes that as explained by the Applicant, Vpgm is higher than Vpass and thus any word line with a program operation would be higher than the other word lines (“lower word lines can have a voltage higher than higher word lines when Vpgm is being applied to a lower word line”). In view of this argument, the Examiner finds the Applicant’s arguments persuasive. The Applicant further stets that with respect to claim 15, Vpass for WL<3> is greater than Vpass for WL<2>, and Vpass for WL<2> is greater than VPass for WL<1> in the WL<0> Program. The Examiner notes that claim 15 recites: “the first program operation, a fifth voltage higher than the second voltage is applied to the third word line, and a sixth voltage higher than the fifth voltage is applied to the fourth word line, and in the second program operation, a seventh voltage higher than the fourth voltage is applied to the third word line, and an eighth voltage higher than the seventh voltage is applied to the fourth word line.” The Examiner finds the Applicant’s Arguments in conjunction with the example table set forth above, persuasive in showing support for the claimed operations. With respect to claim 16, the Examiner acknowledges the applicant’s amendment and with respect to Claim 17, the Examiner acknowledges the Applicant arguments that in Claim 17, WL<0> Program, Vpass applied to WL<2> is lower than Vpgm applied to WL<0>, and Vpass applied to WL<3> can be higher than Vpass applied to WL<2>. Thus, the Examiner finds that the Applicant’s arguments are persuasive. With respect to claim 18, the Applicant provides the following Table and annotated Figure 21 for the first write operation: PNG media_image1.png 404 499 media_image1.png Greyscale PNG media_image2.png 209 615 media_image2.png Greyscale The Applicant explains that Vpass2 (second voltage) applied to WL<2> is lower than Vpgm1 (first voltage) applied to WL<3>. Vpass1 (fifth voltage) applied to WL<4> is lower than Vpgm1 (first voltage) applied to WL<3>. Vpass2 (second and sixth voltages) are the same since WL<2> and WL<5> are the same level and correspond to the same or substantially the same column diameter. As to the second program operation the Applicant provides the following table and annotated Figure 21: PNG media_image3.png 397 496 media_image3.png Greyscale PNG media_image4.png 163 604 media_image4.png Greyscale The Applicant states that Vpgm2 (third voltage) applied to WL<2> is higher than Vpgm1 (first voltage) applied to WL<3>since WL<2> is higher than WL<3>. Vpass1 (fourth voltage) applied to WL<3> is lower than Vpgm2 (third voltage) applied to WL<3>. Vpass (fourth and seventh voltage) are the same since WL<3> and WL<4> are at the same level and correspond to the same or substantially the same column diameter. The Examiner notes that claim 18 recites the following: in the first program operation, a fifth voltage lower than the first voltage is applied to the third word line, and a sixth voltage is applied to the fourth word line, the sixth voltage is the same level as the second voltage, in the second program operation, a seventh voltage is applied to the third word line, and an eighth voltage is applied to the fourth word line, and the seventh voltage is the same level as the fourth voltage. The Examiner finds that in view of the Applicant’s arguments and provided table/annotated figure, the arguments are found persuasive. Reissue Declaration The reissue oath/declaration filed with this application is defective (see 37 CFR 1.175 and MPEP § 1414) because of the following: As set forth in the Reissue Declaration, the error statement was directed to the following: “Claims 1-12 of U.S. Patent 8,228,733 are directed to a three-dimensionally stacked nonvolatile memory, whereas new claims 13-24 are directed to a memory system.” The Examiner notes that this error statement is a duplicate of the error statement set forth in the parent reissue 17/832,228 and the Applicant has not shown how the instant reissue corrects the error in a different way. In addition, the stated error was already corrected in the parent reissue and the error statement recites additional claims (i.e. claims 23 and 24) which are not present in the current reissue application. Therefore, the Reissue Declaration does not identify an error being corrected by the instant reissue. Claims 13-22 are rejected as being based upon a defective reissue declaration under 35 U.S.C. 251 as set forth above. See 37 CFR 1.175. The nature of the defect(s) in the declaration is set forth in the discussion above in this Office action. Allowable Subject Matter Claims 13-22 are allowed. The following is an examiner’s statement of reasons for allowance: As to claim 13, the prior art of record does not teach “a control circuit configured to perform a first program operation targeted to the first word line in which a first voltage is applied to the first word line, a second voltage lower than the first voltage is applied to the second word line, and voltages applied to the first and second bit lines are the same, and a second program operation targeted to the second word line in which a third voltage higher than the first voltage is applied to the second word line, and a fourth voltage lower than the third voltage is applied to the first word line, and voltages applied to the first and second bit lines are the same” in combination with the rest of the limitations of the claim. As to claim 21, the prior art of record does not teach “a control circuit configured to perform a first program operation targeted to the first word line in which a first voltage is applied to the first word line, a second voltage lower than the first voltage is applied to the second word line, and voltages applied to the first and second bit lines are the same, and a second program operation targeted to the second word line in which a third voltage higher than the first voltage is applied to the second word line, and a fourth voltage lower than the third voltage is applied to the first word line, and voltages applied to the first and second bit lines are the same” in combination with the rest of the limitations of the claim. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Ovidio Escalante whose telephone number is (571)272-7537. The examiner can normally be reached on Monday to Friday - 6:00 AM to 2:30 PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Michael Fuelling can be reached on (571) 270-1367. The fax phone number for the organization where this application or proceeding is assigned is 571-273-9000. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR.Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Ovidio Escalante/ Primary Examiner Central Reexamination Unit - Art Unit 3992 (571) 272-7537 Conferees: /MATTHEW E HENEGHAN/Primary Examiner, Art Unit 3992 /M.F/Supervisory Patent Examiner, Art Unit 3992
Read full office action

Prosecution Timeline

Show 2 earlier events
Apr 08, 2025
Non-Final Rejection mailed — §Other
Jul 08, 2025
Response Filed
Jul 31, 2025
Final Rejection mailed — §Other
Oct 31, 2025
Request for Continued Examination
Nov 05, 2025
Response after Non-Final Action
Feb 06, 2026
Non-Final Rejection mailed — §Other
Apr 22, 2026
Response Filed
Jun 11, 2026
Final Rejection mailed — §Other (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
74%
Grant Probability
83%
With Interview (+8.2%)
2y 4m (~2m remaining)
Median Time to Grant
High
PTA Risk
Based on 216 resolved cases by this examiner. Grant probability derived from career allowance rate.

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