Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 112
3. The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 9 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 9 recites the limitation "the second insulating member" in line 1. There is insufficient antecedent basis for this limitation in the claim.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1,2, and 3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Murata et al. (US 20230187334 A1) hereinafter referred to as "Murata 1".
Regarding claim 1, Murata 1 teaches a semiconductor device comprising: an insulated circuit substrate (Fig. 1, element 1; ¶: [0036]) including an insulating plate (Fig. 1, element 10; ¶: [0040]) and a conductive plate (Fig. 1, element 11a-11j; ¶: [0040]) provided on a top surface side of the insulating plate; a semiconductor chip (Fig. 1, element 3a-3i; ¶: [0036]) provided on a top surface side of the conductive plate; a first external terminal (Fig. 1, element 81; ¶: [0048]) electrically connected to the semiconductor chip; a first insulating member (Fig. 1, element 83; ¶: [0055]) including a covering part (Fig. 1, element 83a; ¶: [0050]) covering a part of the first external terminal and a first engagement part (Fig. 1, element 81b; ¶: [0050]) provided on a top surface side of the covering part; a second external terminal (Fig. 1, element 82; ¶: [0048]) electrically connected to the semiconductor chip, provided on a top surface side of the first external terminal with the covering part interposed, and including a second engagement part (Fig. 1, element 82y; ¶: [0052]) so as to engage with the first engagement part; and a sealing resin (Fig. 1, element 7; ¶: [0036,0042]) provided to seal the semiconductor chip and partly seal each of the first external terminal, the first insulating member, and the second external terminal.
Regarding claim 2, Murata 1 teaches the first engagement part being a projecting part (Fig. 1, element 81b; ¶: [0050]); and the second engagement part being a recessed part (Fig. 1, element 82y; ¶: [0052]).
Regarding claim 3, Murata 1 teaches the first engagement part and the second engagement part being covered with the sealing resin (Fig. 1, element 7; ¶: [0050]).
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Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Murata 1 in view of Taniguchi et al. (US 20230119240) hereinafter referred to as "Taniguchi".
Regarding claim 4, Murata 1 teaches the semiconductor device of claim 1. Murata 1 does not teach the first insulating member includes a frame part surrounding a part of a side surface of the second external terminal.
Taniguchi teaches the first insulating member includes a frame part (Fig. 5, element 83; ¶: [0050]) surrounding a part of a side surface of the second external terminal.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to do so to ensure an insulation creepage distance necessary at the respective end parts of the positive and negative electrode terminals (¶: [0050]).
Claims 5, 6, and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Murata 1 in view of Murata et al. (US 20230120152 A1) hereinafter referred to as "Murata 2".
Regarding claim 5, Murata 1 teaches the semiconductor device of claim 1. Murata 1 does not teach a third external terminal electrically connected to the semiconductor chip and arranged separately from the first external terminal and the second external terminal; and a second insulating member provided to cover a part of the third external terminal.
Murata 2 teaches a third external terminal (Fig. 3a-b, element 23; ¶: [0060, 0063]) electrically connected to the semiconductor chip and arranged separately from the first external terminal and the second external terminal; and a second insulating member (Fig. 3a-b, element 24; ¶: [0060, 0063]) provided to cover a part of the third external terminal.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to arrange the third external terminal and second insulating member in this manner so that currents will flow in opposite directions (¶: [0078]).
Regarding claim 6, Murata 1 in view of Murata 2 teaches the semiconductor device of claim 5.
Murata 2 further teaches a third insulating member (Fig. 2a-b, element 14a; ¶: [0050]) provided between the first insulating member and the second insulating member so as to be integrated together.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to arrange this in such a manner so that currents will flow in opposite directions (¶: [0078]).
Regarding claim 7, Murata 1 in view of Murata 2 teaches the semiconductor device of claim 6.
Murata 1 further teaches a control terminal (Fig. 1, element 7a-7i; ¶: [0066]) electrically connected to the semiconductor chip, wherein the third insulating member has an opening for positioning the control terminal.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Murata 1 in view of Hori et al. (US 20220406690 A1) hereinafter referred to as "Hori".
Regarding claim 8, Murata 1 teaches the semiconductor device of claim 1. Murata 1 does not teach the covering part being provided with a slit on the top surface side.
Hori teaches the covering part being provided with a slit on the top surface side (Fig. 10, element 64; ¶: [0086]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to do so in order to reduce inductance. (¶: [0088]).
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Murata 1 in view of Okamoto (US 20160027709A1).
Regarding claim 9, Murata 1 teaches the semiconductor device of claim 1. Murata 1 does not teach the second insulating member being provided with a fixing part for fixing the second external terminal.
Okamoto teaches the second insulating member being provided with a fixing part (Fig. 3, element 17; ¶: [0096]) for fixing the second external terminal.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to fix the terminal in place as it requires a high thermal conductivity and high rigidity (¶: [0096]).
Conclusion
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/I.H./Examiner, Art Unit 2899
/ZANDRA V SMITH/Supervisory Patent Examiner, Art Unit 2899
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