DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Allowable Subject Matter
Claims 3-9, 12-15, and 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
the claimed invention is directed to non-statutory subject matter. The claim(s) does/do not fall within at least one of the four categories of patent eligible subject matter.
Claims 1-2, 10-11, and 16-17 are rejected under 35 U.S.C. 101.
As per claim 1, the claim recites a method, therefore is a process.
“ . . . determining … “ These limitations, as drafted, are processes that, under its broadest reasonable interpretation, cover performance of the limitation in the mind but for the recitation of generic computer components. Thus, the claim recites a mental process.
The elements of “executing . . . executing . . . ” does not require any particular application of the recited “executing ...” and is at best the equivalent of merely adding the words “apply it” to the judicial exception. Mere instructions to apply an exception cannot provide an inventive concept. (see MPEP 2106.05(f)). Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The claim is directed to the abstract idea.
As discussed above, “executing . . . executing . . . ” does not require any particular application of the recited “executing ...” and is at best the equivalent of merely adding the words “apply it” to the judicial exception. Mere instructions to apply an exception cannot provide an inventive concept. (see MPEP 2106.05(f)). “encountering … suspending… encountering … resuming … “ is simply appending well-understood, routine, conventional activities previously known to the industry, specified at a high level of generality, to the judicial exception - see MPEP 2106.05(d) and Berkheimer Memo. See Galbraith. The claim is ineligible.
As per claim 2, see rejection on claim 1. “executing … executing … ” does not require any particular application of the recited “executing ...” and is at best the equivalent of merely adding the words “apply it” to the judicial exception. Mere instructions to apply an exception cannot provide an inventive concept. (see MPEP 2106.05(f)). The claim is ineligible.
As per claim 10, see rejection on claim 1.
As per claim 11, see rejection on claim 1.
As per claim 16, see rejection on claim 1.
As per claim 17, see rejection on claim 2.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2, 10-11, and 16-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Galbraith et al (US 2020/0233475 ) (hereinafter Galbraith).
As per claim 1, Galbraith teaches:
A method, comprising:
executing, by a computing device, a first thread (Galbraith, [0018]—under BRI, 1st thread can be END [the value of the checkpoint type] + the thread [ the thread not in the process of performing an atomic unit of work]);
executing, by the computing device, a second thread (Galbraith, [0038], Fig 5 503—under BRI, 2nd thread can be a thread + BEGIN [the value of the checkpoint type]);
encountering, by the computing device and based on executing the first thread, a first thread coordination operation code (opcode) that is included in the first thread (Galbraith, [0018]—under BRI, a first thread coordination operation code can be END);
suspending, by the computing device and based on encountering the first thread coordination opcode, execution of the first thread (Galbraith, [0018]);
encountering, by the computing device, based on executing the second thread, and after suspending execution of the first thread, a second thread coordination opcode that is included in the second thread (Galbraith, [0038], Fig 5 503—under BRI, encountering can be entering 503);
determining, by the computing device and based on encountering the first thread coordination opcode and encountering the second thread coordination opcode, that a thread coordination event has occurred thread (Galbraith, [0038], Fig 5 503—under BRI, a thread coordination event can be allowing to continue execution until the status bit of the thread is changed) and
resuming, by the computing device and based on determining that the thread coordination event has occurred, execution of the first thread (Galbraith, [0038], Fig 5 504—under BRI, resuming . . . execution of the first thread can be thread [proceed to complete] completing the unit of atomic work that was begun) .
As per claim 2, Galbraith teaches:
The method of claim 1 (see rejection on claim 1), further comprising:
executing, based on resuming execution of the first thread, the first thread coordination opcode in association with an instant of time (Galbraith, [0018], [0038]—under BRI, an instant of time can be the time 1st thread is executed + the time 2nd thread is executed); and executing, based on determining that the thread coordination event has occurred, the second thread coordination opcode in association with the instant of time (Galbraith, [0018], [0038]).
As per claim 10, see rejection on claim 1.
As per claim 11, see rejection on claim 1.
As per claim 16, see rejection on claim 1.
As per claim 17, see rejection on claim 2.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 2011/0208908 teaches a method of suspending active VMs. Fraser, Keir. Practical lock-freedom. No. UCAM-CL-TR-579. University of Cambridge, Computer Laboratory, 2004 teaches a method of Epoch-based synchronization.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHARLIE SUN whose telephone number is (571)270-5100. The examiner can normally be reached 9AM-5PM.
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/CHARLIE SUN/Primary Examiner, Art Unit 2198
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