Detailed ActionNotice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 5/28/2024, 10/16/2024, and 4/10/2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Objections
Claims 1, 11, 16 are objected to because of the following informalities:
Claim 1, line 6, “inductor configured to receive power through the primary side circuit” should be -- inductor configured to receive power from the primary side circuit Appropriate correction is required--. Similar corrections are required for claims 11 and 16.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim 1 is rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Matsushita et. al. (U.S. Publication No 2017/0025956).
Regarding claim 1, Matsushita et. al. teaches a logical link control (LLC) resonant converter (Fig. 1)comprising;
a primary side circuit (e.g. 11)(Fig. 1) and a secondary side circuit (e.g. 13/15)(Fig. 1), wherein the secondary side circuit comprises:
a first diode (e.g. D7)(Fig. 1) including a first anode (e.g. D7 to ground node)(Fig. 1) electrically connected to a first node (e.g. ground node in 15)(Fig. 1);
a second diode (e.g. D8)(Fig. 1) including
a second anode (e.g. D8 to ground node)(Fig. 1 ) electrically connected to the first node;
a first inductor (e.g. L3)(Fig. 1) configured to receive power through the primary side circuit (e.g. T1)(Fig. 1) and electrically connected between a first cathode (e.g. D7 to L3)(Fig. 1) of the first diode and a second node (e.g. node between L3 and C2)(Fig. 1);
a second inductor (e.g. L4)(Fig. 1) configured to receive power
through the primary side circuit (e.g. T1)(Fig. 1) and electrically connected between the second node and a second cathode (e.g. D8 to L3)(Fig. 1) of the second diode;
a first capacitor (e.g. C2)(Fig. 1) electrically connected between the first node and the second node; a third inductor (e.g. L1)(Fig. 1) electrically connected between the first cathode of the first diode and a third node (e.g. node between L1/L2 and C1)(Fig. 1);
a fourth inductor (e.g. L2)(Fig. 1) electrically connected between the second cathode of the second diode and the third node; and
a second capacitor (e.g. C1)(Fig. 1) electrically connected between the first node and the third node.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-3, and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Matsushita et. al. (U.S. Publication No 2017/0025956) in view of Yang et. al. (U.S. Publication No 2022/0158562).
Regarding claim 2, Matsushita et. al. teaches the limitations in claim 1, but does not teach wherein the first inductor comprises a first coil and the second inductor comprises a second coil, a number of turns of the first coil is the same as a number of turns of the second coil, and a winding direction of the first coil is the same as a winding direction of the second coil.
However, Yang et. al. discloses wherein the first inductor comprises a first coil (e.g. L3)(Fig. 1) and the second inductor comprises a second coil (e.g. L4)(Fig. 1),
a number of turns of the first coil is the same as a number of turns of the second coil (Para [0087], “the inductance of the first inductor L.sub.A and the second inductor L.sub.B can be made equal by adjusting the turns of the two windings”), and
a winding direction of the first coil is the same as a winding direction of the second coil (Para [0065], “In connection with FIG. 1, FIG. 2D and FIG. 4, the winding directions of the two coils in the inductor-integrated magnetic element are the same or opposite”).
Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the “LLC resonant converter” teachings of Matsushita et. al. such that it comprises “wherein the first inductor comprises a first coil and the second inductor comprises a second coil, a number of turns of the first coil is the same as a number of turns of the second coil, and a winding direction of the first coil is the same as a winding direction of the second coil” as taught by Yang et. al. The reason for doing so would be to maximize inductance and control EMI.
Regarding claim 3, Yang et. al. discloses wherein the third inductor (e.g. L1)(Fig. 1) and the fourth inductor (e.g. L2)(Fig. 1) are inductively coupled to each other (Fig. 1),
the third inductor comprises a third coil (e.g. L1)(Fig. 1) and the fourth inductor comprises a fourth coil (e.g. L2)(Fig. 1), and a winding direction of the third coil and a winding direction of the fourth coil are different from each other (Para [0065], “In connection with FIG. 1, FIG. 2D and FIG. 4, the winding directions of the two coils in the inductor-integrated magnetic element are the same or opposite”).
Regarding claim 7, Matsushita et. al. discloses the LLC resonant converter, configured to provide a load current to a load electrically connected to the first node and the third node (e.g. Output1)(Fig. 1).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Matsushita et. al. (U.S. Publication No 2017/0025956) in view of Hassler et. al. (U.S. Publication No 2021/0203186).
Regarding claim 4, Matsushita et. al. teaches the limitations in claim 1, but does not teach wherein a ratio of a capacitance of the first capacitor to a capacitance of the second capacitor is determined according to a ratio of a size of a first current flowing through the first capacitor to a size of a second current flowing through the second capacitor.
However, Hassler et. al. discloses wherein a ratio of a capacitance of the first capacitor to a capacitance of the second capacitor is determined according to a ratio of a size of a first current flowing through the first capacitor to a size of a second current flowing through the second capacitor (Para [0054], “the effective capacitance C.sub.1 depends on the ratio between the first current 321 and the second current 322. By way of example, the effective capacitance C.sub.1 corresponds to the capacitance C.sub.1A of the first capacitor 212” Fig. 3a).
Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the “LLC resonant converter” teachings of Matsushita et. al. such that it comprises “wherein a ratio of a capacitance of the first capacitor to a capacitance of the second capacitor is determined according to a ratio of a size of a first current flowing through the first capacitor to a size of a second current flowing through the second capacitor” as taught by Hassler et. al. The reason for doing so would be to determine the ratio of capacitances when a known and unknown capacitor size are used.
Claims 5 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Matsushita et. al. (U.S. Publication No 2017/0025956) and Hassler et. al. (U.S. Publication No 2021/0203186) in further view of Tian et. al. (U.S. Publication No 2023/0170783).
Regarding claim 5, Although Matsushita et. al. and Hassler et. al. teach the limitations of claim 4, they do not disclose wherein the first capacitor comprises a plurality of first sub-capacitors connected to each other in parallel, and the second capacitor comprises a plurality of second sub-capacitors connected to each other in parallel.
However, Tian et. al. discloses wherein the first capacitor comprises a plurality of first sub-capacitors (e.g. C2/C3)(Fig. 5) connected to each other in parallel, and the second capacitor comprises a plurality of second sub-capacitors (e.g. C4/CO)(Fig. 5) connected to each other in parallel. Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the “LLC resonant converter” teachings of Matsushita et. al. and Hassler et. al. such that it comprises “wherein the first capacitor comprises a plurality of first sub-capacitors connected to each other in parallel, and the second capacitor comprises a plurality of second sub-capacitors connected to each other in parallel” as taught by Tian et. al. The reason for doing so would be to increase maximum capacitance.
Regarding claim 6, Hassler et. al. discloses wherein, based on a capacitance of each of the plurality of first sub-capacitors being the same as a capacitance of each of the plurality of second sub-capacitors, a ratio of a number of the plurality of first sub-capacitors to a number of the plurality of second sub-capacitors is determined according to the ratio of the size of the first current to the size of the second current (Para [0054], “the effective capacitance C.sub.1 depends on the ratio between the first current 321 and the second current 322. By way of example, the effective capacitance C.sub.1 corresponds to the capacitance C.sub.1A of the first capacitor 212” Fig. 3a).
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Matsushita et. al. (U.S. Publication No 2017/0025956) in view of Yu et. al. (U.S. Publication No 2026/0031717).
Regarding claim 8, Matsushita et. al. teaches the limitations in claim 1, but does not teach wherein the primary side circuit comprises a half-bridge circuit.
However, Yu et. al. discloses, wherein the primary side circuit comprises a half-bridge circuit (Para [0022], “The switch network 32 could be implemented in a half-bridge configuration or a full-bridge configuration3”).
Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the “LLC resonant converter” teachings of Matsushita et. al. such that it comprises “wherein the primary side circuit comprises a half-bridge circuit” as taught by Yu et. al. The reason for doing so would be to lower cost with a more compact design.
Claims 11 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Jang et. al. (U.S. Publication No 2022/0158548 in view of ) Matsushita et. al. (U.S. Publication No 2017/0025956).
Regarding claims 11 and 16, Jang et. al. teaches a display device (e.g. 10)(Fig. 2) comprising a power supply (e.g. 100)(Fig. 2) including a logical link control (LLC) resonant converter (Para [0093], “the transformer 330 may, as shown in FIG. 3, employ an LLC resonant converter”, also in 130 Fig. 2) comprising
a primary side circuit (e.g. 310/330)(Fig. 3) and a secondary side circuit (e.g. 340/350)(Fig. 3), wherein the display device comprises:
a display (e.g. 210)(Fig. 2); and
at least one processor (e.g. 220)(Fig. 2) configured to control an operation of the display (Para [0077], “The processor 220 may include various processing circuitry and is provided to generally control the display apparatus 10”), the power supply is configured to supply power to the at least one processor (Para [0081], “The third voltage converted into the DC voltage in the PFC converter 150 is supplied as operating voltage to the elements of the display apparatus 10, for example, the display 210, the processor 220 and the like operation performer 200”).
Jang et. al. does not teach the secondary side circuit comprises: a first diode including a first anode electrically connected to a first node; a second diode including a second anode electrically connected to the first node; a first inductor configured to receive power through the primary side circuit and electrically connected between a first cathode of the first diode and a second node; a second inductor configured to receive power through the primary side circuit and electrically connected between the second node and a second cathode of the second diode; a first capacitor electrically connected between the first node and the second node; a third inductor electrically connected between the first cathode of the first diode and a third node; a fourth inductor electrically connected between the second cathode of the second diode and the third node; and a second capacitor electrically connected between the first node and the third node.
However, Matsushita et. al. discloses a secondary side circuit (e.g. 13/15)(Fig. 1), wherein the secondary side circuit comprises:
a first diode (e.g. D7)(Fig. 1) including a first anode (e.g. D7 to ground node)(Fig. 1) electrically connected to a first node (e.g. ground node in 15)(Fig. 1);
a second diode (e.g. D8)(Fig. 1) including
a second anode (e.g. D8 to ground node)(Fig. 1 ) electrically connected to the first node;
a first inductor (e.g. L3)(Fig. 1) configured to receive power through the primary side circuit (e.g. T1)(Fig. 1) and electrically connected between a first cathode (e.g. D7 to L3)(Fig. 1) of the first diode and a second node (e.g. node between L3 and C2)(Fig. 1);
a second inductor (e.g. L4)(Fig. 1) configured to receive power
through the primary side circuit (e.g. T1)(Fig. 1) and electrically connected between the second node and a second cathode (e.g. D8 to L3)(Fig. 1) of the second diode;
a first capacitor (e.g. C2)(Fig. 1) electrically connected between the first node and the second node;
a third inductor (e.g. L1)(Fig. 1) electrically connected between the first cathode of the first diode and a third node (e.g. node between L1/L2 and C1)(Fig. 1);
a fourth inductor (e.g. L2)(Fig. 1) electrically connected between the second cathode of the second diode and the third node; and
a second capacitor (e.g. C1)(Fig. 1) electrically connected between the first node and the third node.
Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the “display device” teachings of Jang et. al. such that it comprises “secondary side circuit and components” as taught by Matsushita et. al. The reason for doing so would be because it allows for specific design choice, which can provide a reduction in component variance, thus increasing operational efficiencies.
Claims 12-13 and 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Jang et. al. and Matsushita et. al. (U.S. Publication No 2017/0025956) in further view of Yang et. al. (U.S. Publication No 2022/0158562).
Regarding claims 12 and 17, Jang et. al. and Matsushita et. al. teaches the limitations in claims 11 and 16, but does not teach wherein the first inductor comprises a first coil and the second inductor comprises a second coil, a number of turns of the first coil is the same as a number of turns of the second coil, and a winding direction of the first coil is the same as a winding direction of the second coil.
However, Yang et. al. discloses wherein the first inductor comprises a first coil (e.g. L3)(Fig. 1) and the second inductor comprises a second coil (e.g. L4)(Fig. 1),
a number of turns of the first coil is the same as a number of turns of the second coil (Para [0087], “the inductance of the first inductor L.sub.A and the second inductor L.sub.B can be made equal by adjusting the turns of the two windings”), and
a winding direction of the first coil is the same as a winding direction of the second coil (Para [0065], “In connection with FIG. 1, FIG. 2D and FIG. 4, the winding directions of the two coils in the inductor-integrated magnetic element are the same or opposite”).
Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the “display device” teachings of Jang et. al. and Matsushita et. al. such that it comprises “wherein the first inductor comprises a first coil and the second inductor comprises a second coil, a number of turns of the first coil is the same as a number of turns of the second coil, and a winding direction of the first coil is the same as a winding direction of the second coil” as taught by Yang et. al. The reason for doing so would be to maximize inductance and control EMI.
Regarding claim 13 and 18, Yang et. al. discloses wherein the third inductor (e.g. L1)(Fig. 1) and the fourth inductor (e.g. L2)(Fig. 1) are inductively coupled to each other (Fig. 1),
the third inductor comprises a third coil (e.g. L1)(Fig. 1) and the fourth inductor comprises a fourth coil (e.g. L2)(Fig. 1), and a winding direction of the third coil and a winding direction of the fourth coil are different from each other (Para [0065], “In connection with FIG. 1, FIG. 2D and FIG. 4, the winding directions of the two coils in the inductor-integrated magnetic element are the same or opposite”).
Claims 14 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Jang et. al. (U.S. Publication No 2022/0158548) and Matsushita et. al. (U.S. Publication No 2017/0025956) in further view of Hassler et. al. (U.S. Publication No 2021/0203186).
Regarding claim 14 and 19, Jang et. al. and Matsushita et. al. teaches the limitations in claims 11 and 16, but does not teach wherein a ratio of a capacitance of the first capacitor to a capacitance of the second capacitor is determined according to a ratio of a size of a first current flowing through the first capacitor to a size of a second current flowing through the second capacitor.
However, Hassler et. al. discloses wherein a ratio of a capacitance of the first capacitor to a capacitance of the second capacitor is determined according to a ratio of a size of a first current flowing through the first capacitor to a size of a second current flowing through the second capacitor (Para [0054], “the effective capacitance C.sub.1 depends on the ratio between the first current 321 and the second current 322. By way of example, the effective capacitance C.sub.1 corresponds to the capacitance C.sub.1A of the first capacitor 212” Fig. 3a).
Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the “display device” teachings of Jang et. al. and Matsushita et. al. such that it comprises “wherein a ratio of a capacitance of the first capacitor to a capacitance of the second capacitor is determined according to a ratio of a size of a first current flowing through the first capacitor to a size of a second current flowing through the second capacitor” as taught by Hassler et. al. The reason for doing so would be to determine the ratio of capacitances when a known and unknown capacitor size are used.
Claims 15 and 20 is rejected under 35 U.S.C. 103 as being unpatentable over Jang et. al. (U.S. Publication No 2022/0158548), Matsushita et. al. (U.S. Publication No 2017/0025956) and Hassler et. al. (U.S. Publication No 2021/0203186) in further view of Tian et. al. (U.S. Publication No 2023/0170783).
Regarding claim 15 and 20, Although Jang et. al., Matsushita et. al. and Hassler et. al. teach the limitations of claims 14 and 19, they do not disclose wherein the first capacitor comprises a plurality of first sub-capacitors connected to each other in parallel, and the second capacitor comprises a plurality of second sub-capacitors connected to each other in parallel.
However, Tian et. al. discloses wherein the first capacitor comprises a plurality of first sub-capacitors (e.g. C2/C3)(Fig. 5) connected to each other in parallel, and the second capacitor comprises a plurality of second sub-capacitors (e.g. C4/CO)(Fig. 5) connected to each other in parallel. Therefore, it would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the “display device” teachings of Jang et. al., Matsushita et. al. and Hassler et. al. such that it comprises “wherein the first capacitor comprises a plurality of first sub-capacitors connected to each other in parallel, and the second capacitor comprises a plurality of second sub-capacitors connected to each other in parallel” as taught by Tian et. al. The reason for doing so would be to increase maximum capacitance.
Allowable Subject Matter
Claims 9-10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 9, none of the prior art, made of record, singularly or in combinations, teaches or fairly suggest wherein the secondary side circuit comprises:
a first resistor electrically connected to the first node; and
a third capacitor electrically connected between the first resistor and the third node.
Regarding claim 10, none of the prior art, made of record, singularly or in combinations, teaches or fairly suggest a third diode including a third anode electrically connected to the third capacitor and a third cathode electrically connected to the third node; a second resistor electrically connected to the first node; a fourth capacitor electrically connected to the second resistor; and a fourth diode including a fourth anode electrically connected to the fourth capacitor and a fourth cathode electrically connected to the third node.
Conclusion
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/JONATHAN WALTER SOILEAU/Examiner, Art Unit 2838
/CRYSTAL L HAMMOND/Supervisory Primary Examiner, Art Unit 2838