Prosecution Insights
Last updated: July 17, 2026
Application No. 18/676,090

MEMS SENSOR, AND METHOD FOR MANUFACTURING MEMS SENSOR

Non-Final OA §102§103
Filed
May 28, 2024
Priority
Nov 30, 2021 — JP 2021-194815 +1 more
Examiner
HUANG, DAVID Z
Art Unit
2855
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Rohm Co., Ltd.
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
4m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
564 granted / 703 resolved
+12.2% vs TC avg
Moderate +13% lift
Without
With
+13.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
19 currently pending
Career history
720
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
69.9%
+29.9% vs TC avg
§102
2.5%
-37.5% vs TC avg
§112
19.6%
-20.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 703 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-4 and 17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sakai (JP 2012-202762 A) (hereinafter Sakai). Regarding claim 1, Sakai teaches a micro-electromechanical systems sensor [dynamic quantity sensor] (see Abstract), comprising: a first substrate assembly including a first semiconductor substrate [semiconductor substrate 13] having a first main surface and a second main surface opposite to the first main surface [top and bottom surfaces of substrate 13], and having a hollow on the first main surface [trench portion] (Para [0089-0093], see Fig. 7), a micro-electromechanical systems electrode located in the hollow [movable electrode 53 and/or fixed electrodes 54a, 54b] (see Fig. 7), a metal wire layer [wiring layer 70] located on the first main surface of the first semiconductor substrate and electrically connected to the micro-electromechanical systems electrode [serve as the electrode pads] (Para [0089-0093], see Fig. 7), and an interlayer insulator layer [second insulating layer 80] covering the metal wire layer (Para [0089-0093], see Fig. 7), and a metal structure [sensor substrate side sealing portion 15] located on the interlayer insulator film layer, including an exposed portion (Para [0089-0093], see Fig. 7), and comprising a metal material including a first metal [formed by sputtering or vapor-depositing Al or the like] (Para [0039]); a second substrate assembly including a second semiconductor substrate [cap 400] having a third main surface facing the first main surface and a fourth main surface opposite to the third main surface [bottom and top surface of cap 400], the second semiconductor substrate facing the first semiconductor substrate and covering the micro-electromechanical systems electrode (Para [0089-0093], see Fig. 7); and a bond portion in which the metal structure and a metal laminate are eutectically bonded, the bond portion bonding the first semiconductor substrate and the second semiconductor substrate, the metal laminate being located on the third main surface and facing the exposed portion in the metal structure, the metal laminate comprising the first metal and a second metal different from the first metal [sensor side substrate sealing portion 15 and circuit side substrate sealing portion 260 are eutectic bonded; Ge layer (not shown) sandwiched between sensor substrate side sealing portion 15 and circuit substrate side sealing portion 260; Al-Ge eutectic alloy] (Para [0052-0053], see Fig. 7). Regarding claim 2, Sakai as applied to claim 1 above teaches the claimed invention, in addition to wherein the first metal is Al, and the second metal is Ge [Al-Ge eutectic alloy] (Para [0052-0053]). Regarding claims 3-4, Sakai as applied to claims 1-2 above teaches the claimed invention, in addition to wherein the interlayer insulator film layer [80] has a flattened surface opposite to a surface of the interlayer insulator film layer adjacent to the first main surface [top surface of layer 80 is flat] (see Fig. 7a). Regarding claim 17, Sakai as applied to claim 1 above teaches the claimed invention, in addition to wherein the metal structure surrounds the micro-electromechanical systems electrode, and the bond portion seals the micro-electromechanical systems electrode [sensor substrate side sealing portion 15 with movable electrode 53 and/or fixed electrodes 54a, 54b] (see Fig. 7). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 5-13 and 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Sakai, as applied to claim 1-4 above, and further in view of Heuck et al. (US 2020/0399116 A1) (hereinafter Heuck). Regarding claims 5-12, Sakai as applied to claims 1-4 above teaches the claimed invention, except for further comprising a diffusion barrier layer between the metal structure and the interlayer insulator layer to reduce diffusion of the first metal and the second metal to the metal wire layer, wherein the diffusion barrier layer is a Ti/TiN laminate film. Heuck, from the same field of endeavor, teaches MEMS sensor eutectic bonding comprising a diffusion barrier layer that is diffusionally stable relative to metal layers and relative to eutectic material, wherein the diffusion-blocking layer may be made of Ti, TiN, Ta, TaN, and combinations of said elements and compounds (Para [0027-0031, 0075]). It would have been obvious to a person having ordinary skill in the art at the time of the filing of the invention to modify Sakai with Heuck such to further comprise a diffusion barrier layer between the metal structure and the interlayer insulator layer to reduce diffusion of the first metal and the second metal to the metal wire layer, wherein the diffusion barrier layer is a Ti/TiN laminate film, in order to improve bond stability. Additionally, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 227 F.2d 197, 125 USPQ 416 (CCPA 1960). Regarding claim 13, Sakai as applied to claim 1 above teaches the claimed invention, except for further comprising a control wall including an oxide film, the control wall surrounding a periphery of the metal structure and defining the exposed portion. Heuck, from the same field of endeavor, teaches a MEMS sensor structure comprising a control wall including an oxide film surrounding a periphery of a metal structure and defining an exposed portion [passivation layer 140 on oxide layer 130 as a spacer structure on top of metal layer 121] (Para [0058], see Figs. 1-2). It would have been obvious to a person having ordinary skill in the art at the time of the filing of the invention to modify Sakai with Heuck such to further comprise a control wall including an oxide film, the control wall surrounding a periphery of the metal structure and defining the exposed portion in order to better define trough height for the electrode(s). Regarding claims 15-16, Sakai in view of Heuck as applied to claim 13 above teaches the claimed invention, except for further comprising a barrier film located on a surface of the control wall, the barrier film comprising a material resistant to etching for the control wall, the barrier film comprising Al or AlO2. Heuck additionally teaches a barrier film comprising Al located on the surface of the control wall (Para [0058]). It would have been obvious to a person having ordinary skill in the art at the time of the filing of the invention to further modify Sakai in view of Heuck such to further comprise a barrier film located on a surface of the control wall, the barrier film comprising a material resistant to etching for the control wall, the barrier film comprising Al or AlO2, in order to improve hermeticity. Claims 14 are rejected under 35 U.S.C. 103 as being unpatentable over Sakai in view of Heuck, as applied to claim 13 above, and further in view of Hsieh et al. (US 2022/0018009 A1) (hereinafter Hsieh). Regarding claim 14, Sakai in view of Heuck as applied to claim 13 above teaches the claimed invention, except for wherein the control wall comprise undoped silicate glass. Hsieh teaches a MEMS sensor structure comprising a dielectric spacer layer comprising undoped silicate glass (Para [0043], see Fig. 4). It would have been obvious to a person having ordinary skill in the art at the time of the filing of the invention to further modify Sakai in view of Heuck with Hsieh such that the control wall comprises undoped silicate glass in order to improve structural integrity of the structure. Additionally, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 227 F.2d 197, 125 USPQ 416 (CCPA 1960). Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Sakai in view of Uto et al. (WO 2011/016348 A1) (hereinafter Uto). Regarding claim 18, Sakai teaches a method for manufacturing a micro-electromechanical systems sensor [dynamic quantity sensor] (see Abstract), the method comprising: preparing a first semiconductor substrate [semiconductor substrate 13] having a first main surface and a second main surface opposite to the first main surface [top and bottom surfaces of substrate 13]; forming a metal wire layer [wiring layer 70] on the first main surface of the first semiconductor substrate to allow electrical connection [serve as the electrode pads] to a micro-electromechanical systems electrode [movable electrode 53 and/or fixed electrodes 54a, 54b] (Para [0089-0093], see Fig. 7); forming an interlayer insulator layer [second insulating layer 80] covering the metal wire layer (Para [0089-0093], see Fig. 7); forming a metal structure [sensor substrate side sealing portion 15] comprising a first metal [formed by sputtering or vapor-depositing Al or the like] (Para [0039]) on the surface of the interlayer insulator film layer (Para [0089-0093], see Fig. 7); preparing a second semiconductor substrate [cap 400] having a third main surface facing the first main surface and a fourth main surface opposite to the third main surface [bottom and top surface of cap 400] (Para [0089-0093], see Fig. 7); forming, on the third main surface of the second semiconductor substrate, a metal laminate comprising the first metal and a second metal different from the first metal [circuit side substrate sealing portion 260; Ge layer (not shown) sandwiched between 15 and 260] (Para [0052-0053], see Fig. 7); placing the third main surface of the second semiconductor substrate to face the first main surface of the first semiconductor substrate and placing the metal laminate into contact with the metal structure (see Fig. 7); and forming a bond portion bonding the first semiconductor substrate and the second semiconductor substrate by eutectic bonding between the metal laminate and the metal structure [sensor side substrate sealing portion 15 and circuit side substrate sealing portion 260 are eutectic bonded; Ge layer (not shown) sandwiched between sensor substrate side sealing portion 15 and circuit substrate side sealing portion 260; Al-Ge eutectic alloy] (Para [0052-0053], see Fig. 7). Sakai fails to teach the method step of flattening a surface of the interlayer insulator film layer. Uto teaches a method for fabricating a MEMS sensor wherein the surface of an insulating layer formed on a wiring board is flattened using a flattening technique in order to form regions with specific heights (Pg. 7). It would have been obvious to a person having ordinary skill in the art at the time of the filing of the invention to modify Sakai with Uto such that the method further comprises flattening a surface of the interlayer insulator film layer, in order to precisely control the dimensions when manufacturing the MEMS sensor. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID Z HUANG whose telephone number is (571)270-5360. The examiner can normally be reached Monday - Friday, 9:00 AM - 5:00 PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kristina Deherrera can be reached at 303-297-4237. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DAVID Z HUANG/ Primary Examiner, Art Unit 2855
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Prosecution Timeline

May 28, 2024
Application Filed
Jun 24, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
94%
With Interview (+13.4%)
2y 5m (~4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 703 resolved cases by this examiner. Grant probability derived from career allowance rate.

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