DETAILED ACTION
Claims 1-10 are pending. Claims 1-10 are considered in this Office action.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 8/27/2024 has been acknowledged.
The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. The initialed and dated copy of Applicant’s IDS form 1449 is attached to the instant Office action.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Software Per Se- Claims 1-10, drawn to a system defined merely by software, or terms synonymous with software or files, represents functional descriptive material (e.g. data structures or software) per se. Such material is considered non-statutory when claimed without appropriate corresponding structure. Here, in Claim 1, the broadest reasonable interpretation consistent with the specification, the applicant's system elements of an inference device comprising a first and second arithmetic module encompasses functions that can be executed entirely as software per se. Programs do not recite a structure, and in the broadest reasonable interpretation can be software which is used for controlling hardware. As currently written, the claimed system lacks structure, and thus is non-statutory. The dependent claims inherit the deficiencies of the independent claim they depend on and thus are similarly rejected.
Therefore, the Claims and their dependents are rejected.
Alice – Claims 1-10 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Claim 1 recite the limitations reciting stores a plurality of first row data items generated by dividing input first image data for each first number of pixels in a row direction and a plurality of first arithmetic units that execute a first convolution process on the plurality of first row data items (Analyzing the Information, an Observation and Evaluation; a Commercial Activity, i.e. predictive maintenance, a Certain Method of Organizing Human Activity), stores a plurality of second row data items generated by dividing input second image data for each second number of pixels in the row direction and a plurality of second arithmetic units that execute a second convolution process on the plurality of second row data items (Storing and Analyzing the Information, an Observation and Evaluation; a Commercial Activity, i.e. predictive maintenance, a Certain Method of Organizing Human Activity), the number of channels of the first image data is different from the number of channels of the second image data (Analyzing the Information, an Evaluation; a Commercial Activity, i.e. predictive maintenance, a Certain Method of Organizing Human Activity), and a first number, which is the number of the first arithmetic units that execute the first convolution process once on the plurality of first row data items in parallel, is different from a second number which is the number of the second arithmetic units that execute the second convolution process once on the plurality of second row data items in parallel (Analyzing the Information, an Evaluation; a Commercial Activity, i.e. predictive maintenance, a Certain Method of Organizing Human Activity), which under their broadest reasonable interpretation, covers performance of the limitation in the mind for the purposes of predicting and performing maintenance, a Commercial Interaction, but for the recitation of generic computer components. That is, other than reciting a first arithmetic module and a second arithmetic module that execute arithmetic processing including a convolution process and a pooling process, a first memory that the second and a second memory, nothing in the claim element precludes the step from practically being performed or read into the mind for the purposes of a Commercial Interaction, a Certain Method of Organizing Human Activity. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas, an observation, evaluation, and judgment. Further, as described above, the claims recite limitations for a Commercial Interaction, a “Certain Method of Organizing Human Activity”. Accordingly, the claim recites an abstract idea.
This judicial exception is not integrated into a practical application. In particular, the claim recites the above stated additional elements to perform the abstract limitations as above. The device, first arithmetic module, second arithmetic module, first memory and second memory are recited at a high-level of generality (i.e., as a generic software/module performing a generic computer function of storing, retrieving, sending, and processing data) such that they amount to no more than mere instructions to apply the exception using generic computer components. Even if taken as an additional element, the storing steps above are at best insignificant extra-solution activity as these are receiving, storing, and transmitting data as per the MPEP 2106.05(d). Accordingly, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea.
The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception, when considered both individually and as an ordered combination. As discussed above with respect to integration of the abstract idea into a practical application, the additional element being used to perform the abstract limitations stated above amount to no more than mere instructions to apply the exception using generic computer components. Mere instructions to apply an exception using generic computer components cannot provide an inventive concept. The claim is not patent eligible. Applicant’s Specification states:
“[0018] [First Embodiment] Fig. 1 illustrates an example of a configuration of an inference device 2. For example, the inference device 2 is incorporated into an imaging apparatus such as a digital camera. The inference device 2 is a device that performs inference using machine learning and calculates, for example, the type of an object included in image data using inference. The imaging apparatus performs various types of control related to imaging on the basis of an inference result output from the inference device 2.”
Where Fig. 1 shows a generic computing device which can be used to perform the abstract limitations, such as a laptop, phone, desktop, etc., and from this interpretation, one would reasonably deduce the aforementioned steps are all functions that can be done on generic components, and thus application of an abstract idea on a generic computer, as per the Alice decision and not requiring further analysis under Berkheimer, but for edification the Applicant’s specification has been used as above satisfying any such requirement. This is “Applying It” by utilizing current technologies. For the storing steps that were considered extra-solution activity in Step 2A above, if they were to be considered additional elements, they have been re-evaluated in Step 2B and determined to be well-understood, routine, conventional, activity in the field. The background does not provide any indication that the additional elements, such as the modules, memory, etc., nor the storing steps as above, are anything other than a generic, and the MPEP Section 2106.05(d) indicates that mere collection or receipt, storing, or transmission of data is a well‐understood, routine, and conventional function when it is claimed in a merely generic manner (as it is here). For these reasons, there is no inventive concept. The claim is not patent eligible.
Claims 2-10 contain the identified abstract ideas, further narrowing them, with the additional element of a third memory and arithmetic module which are highly generalized when considered as part of a practical application or under prong 2 of the Alice analysis of the MPEP, thus not integrated into a practical application, nor are they significantly more for the same reasons and rationale as above.
After considering all claim elements, both individually and in combination, Examiner has determined that the claims are directed to the above abstract ideas and do not amount to significantly more. Therefore, the claims and dependent claims are rejected under 35 U.S.C. 101 as being directed to non-statutory subject matter. See Alice Corporation Pty. Ltd. v. CLS Bank International, No. 13–298.
Allowable Subject Matter
Claims 1-10 have overcome the prior art and would be allowable if amended to overcome the 35 USC 101 rejections.
The closest prior art of record are Werner (U.S. Publication No. 2017/009,7884), Qadeer (U.S. Publication No. 2022/035,7964), and Vantrease (U.S. Publication No. 2020/005,0582). Werner, a system and method for pipelined convolutional operations for processing clusters, teaches max poling operations for use in applications with input data, such as image data which consist of pixel data, color data, filter data, performing arithmetic operations on image and filter data using matrix operands and characterized convolution operations, using image data with pixel data in matrices with columns and rows, and determining pixel values through a convolution process using backpropagation, but it does not explicitly teach the number of channels of the first image data is different from the number of channels of the second image data, and a first number, which is the number of the first arithmetic units that execute the first convolution process once on the plurality of first row data items in parallel, is different from a second number which is the number of the second arithmetic units that execute the second convolution process once on the plurality of second row data items in parallel. Qadeer, a deep vision processor, teaches storing image pixel data in multiple images, using arithmetic logic on the image and pixel data, filtering image data into a number of channels, using a convolution neural network accelerator in communication with memory to determine pixel values, and a horizontal convolution process where new image pixels are created in new rows and columns, but neither it nor Werner explicitly teaches the number of channels of the first image data is different from the number of channels of the second image data, and a first number, which is the number of the first arithmetic units that execute the first convolution process once on the plurality of first row data items in parallel, is different from a second number which is the number of the second arithmetic units that execute the second convolution process once on the plurality of second row data items in parallel. Vantrease, a system and method for performing concurrent operations in a processing element, teaches arithmetic and pooling operations using pixel input data, using arrays for determination of pixel elements with rows and columns, analysis of pixel data in arrays, and processing of image and pixel data using the rows and columns of arrays and matrices, but does not teach the number of channels of the first image data is different from the number of channels of the second image data, and a first number, which is the number of the first arithmetic units that execute the first convolution process once on the plurality of first row data items in parallel, is different from a second number which is the number of the second arithmetic units that execute the second convolution process once on the plurality of second row data items in parallel. None of the prior art explicitly teaches this number of channels of the first image data is different from the number of channels of the second image data, and a first number, which is the number of the first arithmetic units that execute the first convolution process once on the plurality of first row data items in parallel, is different from a second number which is the number of the second arithmetic units that execute the second convolution process once on the plurality of second row data items in parallel, along with the other limitations of the claims, and these are the reasons which adequately reflect the Examiner's opinion as to why Claim 1 and its dependents, are allowable over the prior art of record, and are objected to as provided above.
Conclusion
The prior art made of record is considered pertinent to applicant's disclosure.
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US 20170097884 A1
Werner; Tony et al.
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Vantrease; Dana Michelle et al.
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DYNAMIC PROCESSING ELEMENT ARRAY EXPANSION
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ARITHMETIC PROCESSING DEVICE
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/JOSEPH M WAESCO/Primary Examiner, Art Unit 3625B 8/2/2026
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