Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claim 1 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 12045128 [herein “128”].
Regarding claim 1 of the Instant Application, although the claim at issue is not identical to claim 1 of 128, they are not patentably distinct from each other because both claim 1 of the instant application and 128 claim 1 are directed to improving performance, robustness and efficiency of reading and writing security configuration metadata in ECC memory in computing systems. The primary differences between instant claim 1 and 128 claim 1 is that 128 claim 1 describes detailed operations involved in determining error correction for an environment involving Trusted Execution Environment (TEE) memory, whereas Instant claim 1 provides a broader set of limitations: determine whether the page is configured to the TEE configuration or the non-TEE configuration on behalf of the requestor via one or more error correcting code (ECC) checks performed on data fetched from the page; and validate metadata associated with the page, the metadata to indicate whether the page is configured with the TEE configuration or the non-TEE configuration, which can be an example of (or encompassed by) the limitations generating a first error correcting code (ECC); and when data for the first ECC is at least one of correct and correctable by ECC for the attempt to access the page using the TEE configuration, attempting to access the page using the memory address and the non-TEE configuration and generating a second ECC, and when data for the second ECC is at least one of correct and correctable by ECC for the attempt to access the page using the non-TEE configuration, storing the memory address as an unknown cacheline address, and when data for the second ECC is not correct or correctable by ECC for the attempt to access the page using the non-TEE configuration, correcting the memory address to be a TEE memory address described in 128 claim 1.
Examiner further notes that any claims dependent from instant claim 1 are also rejected due to their dependence on a rejected independent claim.
Please see the table below for comparison:
Application 18147521 (Patent 12045128)
Instant Application 18676811
1. An apparatus comprising: a memory to store a plurality of pages, a page of the plurality of pages configured as one of a trusted execution environment (TEE) configuration and a non-TEE configuration; and a memory controller coupled to the memory, the memory controller to attempt to access the page using a memory address
and the TEE configuration and generate a first
error correcting code (ECC); and when data for the first ECC is at least one of correct and correctable by ECC for the attempt to access the page using the TEE configuration, attempt to access the page using the memory address and the non-TEE configuration and generate a second ECC, and when data for the second ECC is at least one of correct and correctable by ECC for the attempt to access the page using the non-TEE configuration, store the memory address as an unknown cacheline address, and when data for the second ECC is not correct or correctable by ECC for the attempt to access the page using the non-TEE configuration, correct the memory address to be a TEE memory address.
1. An apparatus comprising: a memory to store a plurality of pages, a page of the plurality of pages configured as one of a trusted execution environment (TEE) configuration and a non-TEE configuration; and a memory controller coupled to the memory, the memory controller configured to: access a memory address for the page on behalf of a requestor configured to perform autonomous single data device correction (SDDC) for the page;
determine whether the page is configured to the TEE configuration or the non-TEE configuration on behalf of the requestor via one or more error correcting code (ECC) checks performed on data fetched from the page; and validate metadata associated with the page, the metadata to indicate whether the page is configured with the TEE configuration or
the non-TEE configuration.
Claim 11 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 13 of U.S. Patent No. 12045128 [herein “128”].
Regarding claim 11 of the Instant Application, although the claim at issue is not identical to claim 13 of 128, they are not patentably distinct from each other because both claim 11 of the instant application and 128 claim 13 are directed to improving performance, robustness and efficiency of reading and writing security configuration metadata in ECC memory in computing systems. The primary differences between instant claim 11 and 128 claim 13 is that 128 claim 11 describes detailed operations involved in determining error correction for an environment involving Trusted Execution Environment (TEE) memory, whereas Instant claim 11 provides a broader set of limitations: using a memory address and the TEE configuration and generating a first error correcting code (ECC); determining whether the page is configured to the TEE configuration or the non-TEE configuration via one or more error correcting code (ECC) checks performed on data fetched from the page; and validating metadata associated with the page, the metadata to indicate whether the page is configured with the TEE configuration or the non-TEE configuration, which can be an example of (or encompassed by) the limitations using a memory address and the TEE configuration and generating a first error correcting code (ECC); and when data for the first ECC is at least one of correct and correctable by ECC for the attempt to access the page using the TEE configuration, attempting to access the page using the memory address and the non-TEE configuration and generating a second ECC, and when data for the second ECC is at least one of correct and correctable by ECC for the attempt to access the page using the non-TEE configuration, storing the memory address as an unknown cacheline address, and when data for the second ECC is not correct or correctable by ECC for the attempt to access the page using the non-TEE configuration, correcting the memory address to be a TEE memory address described in 128 claim 1.
Examiner further notes that any claims dependent from instant claim 11 are also rejected due to their dependence on a rejected independent claim.
Please see the table below for comparison:
Application 18147521 (Patent 12045128)
Instant Application 18676811
13. A method comprising: attempting to access a page of a memory, the page configured as one of a trusted execution environment (TEE) configuration and a non-TEE configuration, using a memory address and the TEE configuration and generating a first error correcting code (ECC); and when data for the first ECC is at least one of correct and correctable by ECC for the attempt to
access the page using the TEE configuration, attempting to access the page using the memory address and the non-TEE configuration and generating a second ECC, and when data for the second ECC is at least one of correct and correctable by ECC for the attempt to access the page using the non-TEE configuration, storing the memory address as an unknown cacheline address, and when data for the second ECC is not correct or correctable by ECC for the attempt to access the page using the non-TEE configuration, correcting the memory address to be a TEE memory address
11. A method comprising: attempting to access a page of a memory, the page configured as one of a trusted execution environment (TEE) configuration and a non-TEE configuration, using a memory address and the TEE configuration and generating a first error correcting code (ECC);
determining whether the page is configured to the TEE configuration or
the non-TEE configuration via one or more error correcting code (ECC) checks performed on data fetched from the page; and validating metadata associated with the page, the metadata to indicate whether the page is configured with the TEE configuration or the non-TEE configuration
Claim 16 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 12045128 [herein “128”].
Regarding claim 16 of the Instant Application, although the claim at issue is not identical to claim 1 of 128, they are not patentably distinct from each other because both claim 16 of the instant application and 128 claim 16 are directed to improving performance, robustness and efficiency of reading and writing security configuration metadata in ECC memory in computing systems. The primary differences between instant claim 16 and 128 claim 1 is that 128 claim 1 describes detailed operations involved in determining error correction for an environment involving Trusted Execution Environment (TEE) memory, whereas Instant claim 16 provides a broader set of limitations: access a memory address for the page on behalf of the memory scrubber circuitry; determine whether the page is configured to the TEE configuration or the non-TEE configuration on behalf of the memory scrubber circuitry via one or more error correcting code (ECC) checks performed on data fetched from the page; and validate metadata associated with the page, the metadata to indicate whether the page is configured with the TEE configuration or the non-TEE configuration, which can be an example of (or encompassed by) the limitations generating a first error correcting code (ECC); and when data for the first ECC is at least one of correct and correctable by ECC for the attempt to access the page using the TEE configuration, attempting to access the page using the memory address and the non-TEE configuration and generating a second ECC, and when data for the second ECC is at least one of correct and correctable by ECC for the attempt to access the page using the non-TEE configuration, storing the memory address as an unknown cacheline address, and when data for the second ECC is not correct or correctable by ECC for the attempt to access the page using the non-TEE configuration, correcting the memory address to be a TEE memory address described in 128 claim 1.
Examiner further notes that any claims dependent from instant claim 16 are also rejected due to their dependence on a rejected independent claim.
Please see the table below for comparison:
Application 18147521 (Patent 12045128)
Instant Application 18676811
1. An apparatus comprising: a memory to store a plurality of pages, a page of the plurality of pages configured as one of a trusted execution environment (TEE) configuration and a non-TEE configuration; and a memory controller coupled to the memory, the memory controller to attempt to access the page using a memory address and the TEE configuration and generate a first error correcting code (ECC); and when data for the first ECC is at least one of correct and correctable by ECC for the attempt to access the page using the TEE configuration, attempt to access the page using the memory address and the non-TEE configuration and generate a second ECC, and when data for the second ECC is at least one of correct and correctable by ECC for the attempt to access the page using the non-TEE configuration, store the memory address as an unknown cacheline address, and when data for the second ECC is not correct or correctable by ECC for the attempt to access the page using the non-TEE configuration, correct the memory address to be a TEE memory address.
16. A system comprising: a memory to store a plurality of pages, a page of the plurality of pages configured as one of a trusted execution environment (TEE) configuration and a non-TEE configuration; and a memory controller coupled to the memory, the memory controller comprising memory scrubber circuitry configured to performed autonomous single data device correction (SDDC) and error correcting code (ECC) circuitry coupled to the memory scrubber circuitry, the memory controller configured to: access a memory address for the page on behalf of the memory scrubber circuitry; determine whether the page is configured to the TEE configuration or the non-TEE configuration on behalf of the memory scrubber circuitry via one or more error correcting code (ECC) checks performed on data fetched from the page; and validate metadata associated with the page, the metadata to indicate whether the page is configured with the TEE configuration or the non-TEE configuration
Allowable Subject Matter
After careful search and consideration, including known prior art of record from U.S. Patent No. 12045128 (U.S. Patent Publication 20190319781 as an example) Examiner finds that claims 1 – 20 would be allowable if the rejections for obviousness type double patenting described above are overcome.
Conclusion
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/M.W.W./Examiner, Art Unit 2111
/MARK D FEATHERSTONE/Supervisory Patent Examiner, Art Unit 2111