Office Action Predictor
Last updated: April 15, 2026
Application No. 18/676,838

SURGE SUPPRESSOR AND METHOD OF OPERATING THE SAME

Non-Final OA §103
Filed
May 29, 2024
Examiner
BAUER, SCOTT ALLEN
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Delta Electronics, INC.
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
88%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allow Rate
804 granted / 977 resolved
+14.3% vs TC avg
Moderate +6% lift
Without
With
+6.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
22 currently pending
Career history
999
Total Applications
across all art units

Statute-Specific Performance

§101
0.9%
-39.1% vs TC avg
§103
57.2%
+17.2% vs TC avg
§102
32.3%
-7.7% vs TC avg
§112
5.8%
-34.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 977 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 9 & 11 are rejected under 35 U.S.C. 103 as being unpatentable over Maitra (US 2007/0121257) in view of Xu (CN 109787206A). With regard to claim 1, Maitra teaches a surge suppressor (14, paragraph 0012) connected in parallel to a circuit breaker (12) on an input path of a medium-voltage alternative-current conversion circuit (paragraph 0017 teaches that the breaker is medium voltage switchgear), the surge suppressor comprising: a surge suppression circuit, and the surge suppression circuit comprising: a rectification circuit (16, paragraph 0046) comprising an alternative-current terminal and a rectification terminal, a switch (20) coupled to the rectification terminal, a controller (section of 44 which detects the fault and turns switch 20 on and opens breaker 12) configured to receive a control command, and provide a control signal according to the control command, and a conversion circuit (section of 44 which generated the modulated signals seen in Fig. 2 36-2, paragraph 0061) coupled to the controller and the switch, and the conversion circuit configured to provide a control voltage modulated by the control signal, wherein the control voltage is configured to adjust an on-resistance of the switch so as to adjust a magnitude of a first current flowing through the switch (paragraphs 0061-0066). Maitra does not teach that the surge suppressor comprises a plurality of surge suppression circuits and the alternative-current terminals of the surge suppression circuits coupled in series. Xu, in Figure 1, teaches a surge suppression device (branch 3) in parallel with mechanical switch (branch 1) wherein the surge suppression device comprises a rectification circuit with a switch coupled to the rectification terminal. It is further taught that the surge suppressor comprises a plurality of surge suppression circuits and the alternative-current terminals of the surge suppression circuits coupled in series (as seen in Fig. 1). It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to combine the teachings of Maitra with Xu, by including a plurality of surge suppressors coupled in series as taught by Xu in the circuit of Maitra, for the purpose of reducing the amount of voltage across a single switch and spreading the surge over multiple switches which reduces the chance of damage to the switches. With regard to claim 9, Maitra in view of Xu discloses the device of claim 1, and further discloses that the rectification circuit is a full-bridge circuit, and is configured to provide the first current flowing through the switch in a fixed direction (Maitra, paragraph 0047). With regard to claim 11, Maitra teaches a method of operating a surge suppressor (14, paragraph 0012), the surge suppressor connected in parallel to a circuit breaker (12) on an input path of a medium-voltage alternative-current conversion circuit (paragraph 0017 teaches that the breaker is medium voltage switchgear), and the surge suppressor comprising a surge suppression circuit, and the surge suppression circuit comprising a rectification terminal (16, paragraph 0046) and a switch (20) coupled to the rectification terminal, the method of operating the surge suppressor comprising steps of: (a) receiving a control command, and providing a control signal according to the control command(section of 44 which detects the fault and turns switch 20 on and opens breaker 12), (b) providing a control voltage modulated by the control signal, (section of 44 which generated the modulated signals seen in Fig. 2 36-2, paragraph 0061) (c) adjusting an on-resistance of the switch according to the control voltage, and (d) adjusting a magnitude of a first current flowing through the switch by adjusting the on-resistance (paragraphs 0061-0066). Maitra does not teach that the surge suppressor comprises a plurality of surge suppression circuits coupled in series. Xu, in Figure 1, teaches a surge suppression device (branch 3) in parallel with mechanical switch (branch 1) wherein the surge suppression device comprises a rectification circuit with a switch coupled to the rectification terminal. It is further taught that the surge suppressor comprises a plurality of surge suppression circuits and the alternative-current terminals of the surge suppression circuits coupled in series (as seen in Fig. 1). It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to combine the teachings of Maitra with Xu, by including a plurality of surge suppressors coupled in series as taught by Xu in the circuit of Maitra, for the purpose of reducing the amount of voltage across a single switch and spreading the surge over multiple switches which reduces the chance of damage to the switches. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Maitra in view of Xu as applied to claim 1 above, and further in view of Zhang (WO 2020/038120A1). With regard to claim 10, Maitra in view of Xu teaches the surge suppressor as claimed in claim 1, wherein each surge suppression circuit further comprises: a protection circuit (branch 2 of Xu, MOA) connected in parallel to the alternative-current terminal, and the protection circuit comprising a variable resistor (Metal Oxide Arrestor), wherein when the circuit breaker and the surge suppressor are both disconnected, the protection circuit is configured to limit a voltage at the alternative-current terminal to be less than or equal to a predetermined voltage (as seen in Fig1 of Xu the MOA would provide overvoltage protection even when all switches are open). Maitra in view of Xu does not teach at least one clamping circuit. Zhang, in Figure 2, teaches an overvoltage protection circuit comprising both a variable resistor (4) and at least one clamping circuit (3). It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to combine the teachings of Maitra in view of Xu with Zhang, by incorporating a clamp into the protection of Maitra in view of Xu by coupling the clamp in series with each MOA taught by Xu, for the purpose of allowing the triggering voltage to the protection circuit to be set to a higher level than using just the MOA to prevent false tripping of the protection. Allowable Subject Matter Claims 2-8 & 12-17 would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 2 would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record does not teach or fairly suggest a surge suppressor comprising all the features as recited in the claims and in combination with when the surge suppression circuits are enabled during a starting and stopping period of enabling or disabling the medium-voltage alternative-current conversion circuit to adjust the on-resistance so as to limit a magnitude of an input current received by the medium-voltage alternative-current conversion circuit. Claim 3 would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record does not teach or fairly suggest a surge suppressor comprising all the features as recited in the claims and in combination with the conversion circuit comprising a switching circuit coupled to the controller, and a filtering circuit coupled to the switching circuit and the switch, wherein the switching circuit is switched on according to the control signal so that the filtering circuit generates the control voltage. Claims 4-8 would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because they depend on claim 3 which would also be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 12 would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record does not teach or fairly suggest a method of operating the surge suppressor comprising all the features as recited in the claims and in combination with steps of: (e) setting a starting and stopping period of enabling or disabling the medium-voltage alternative-current conversion circuit, (f) enabling the surge suppression circuits during the starting and stopping period, and operating each of the surge suppression circuits to perform step (a) to step (d), and (g) disabling the surge suppression circuits when the starting and stopping period ends. Claims 13-17 would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because they depend on claim 12 which would also be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SCOTT BAUER whose telephone number is (571)272-5986. The examiner can normally be reached M-F 12pm - 8pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, THIENVU TRAN can be reached at (571)270-1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Scott Bauer/Primary Examiner, Art Unit 2838
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Prosecution Timeline

May 29, 2024
Application Filed
Dec 27, 2025
Non-Final Rejection — §103
Apr 01, 2026
Response Filed

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
88%
With Interview (+6.0%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 977 resolved cases by this examiner. Grant probability derived from career allow rate.

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