Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments filed 9/02/2025, with respect to the rejections of claims 1-8 and 10-20 under 35 USC 102(a)(1) have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground of rejection is made in view of the newly found prior art, Tseng, US 2010/0232513 A1.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-8 are rejected under 35 U.S.C. 103 as being unpatentable over Jeon, US 2013/0011074 A1, in view of Tseng, US 2010/0232513 A1.
Regarding claim 1, Jeon discloses: a decoding method comprising:
reading a first input data including information on a first encoded bitstream buffer address from an input data buffer (See abstract.);
reading the first DPB data from a DPB data buffer (See [0057] disclosing a buffer state indication: “Since a flag bit corresponding to the buffer B0 of the buffer flag 210 indicates a usable state Y, the codec 122 may decode an image signal requested from the host 110.”);
generating a first decoded picture by decoding a first encoded bitstream stored at the first encoded bitstream buffer address (See [0057], “At this time, the codec 122 may decode an image signal stored in a region of the memory 124.); and
storing the first decoded picture at the first DPB address (See [0068], “The codec 122 may decode an image signal within a frame requested from the host 110 and may store the decoded image signal in the selected buffer (S518).).
Jeon does not disclose: determining a first DPB data to be read from a DPB data buffer based on a pointer in the DPB data buffer, wherein the first DPB data includes information on a first DPB address;
However, Tseng discloses in an analogous art a ring buffer for frame reconstruction having read and write pointers, which fetches a previously reconstructed frame from the reconstruct frame buffer 133as, disclosed in [0039].
It would have been obvious to one having ordinary skill in the art before the time of the applicant’s effective filing date to incorporate into the decoding method of Jeon a DPB read pointer indicating a buffer address for the first DPB data. Buffer read and write pointers allow the decoder to asynchronously access the buffer read and write memory. Incorporating a read pointer would have had the benefit of reducing the memory requirement for storing reconstructed video for reference, while also reducing delay time for beginning compression, and would have predictable results for one having ordinary skill in the art. See Tseng [0039]-[0044].
Regarding claim 2, the combination of Jeon in view of Tseng discloses the limitations of claim 1, upon which claim 2 depends. This combination, specifically Jeon, further discloses: the decoding method of claim 1, further comprising:
determining whether a value of flag data of the first DPB data is a first value (See [0025], and S514 in figure 5a, “Does buffer set to unused state exist?”);
wherein the storing the first decoded picture at the first DPB address includes storing the first decoded picture at the first DPB address based on the value of the flag data of the first DPB data being the first value (See step 518 in figure 5a, “Decode frame and store decoded frame in selected buffer.”).
Regarding claim 3, the combination of Jeon in view of Tseng discloses the limitations of claim 2, upon which claim 3 depends. This combination, specifically Jeon, further discloses: the decoding method of claim 2, further comprising:
changing the value of the flag data of the first DPB data to a second value based on storing the first decoded picture at the first DPB address (See [0059], “Until the display device 140 reads out an image signal from the buffer B0 within the buffer pool 230, the host 110 may set a flag bit corresponding to the buffer B0 to a not-available state N.”).
Regarding claim 4, the combination of Jeon in view of Tseng discloses the limitations of claim 2, upon which claim 4 depends. This combination, specifically Jeon, further discloses: the decoding method of claim 2, further comprising:
reading a second DPB data from a next address of the address of the DPB data buffer where the first DPB data has been stored, based on the value of the flag data of the first DPB data being a second value (See flowchart in figure 5a-b, noting looping of decoding process, and [0072].).
Regarding claim 5, the combination of Jeon in view of Tseng discloses the limitations of claim 1, upon which claim 5 depends. This combination, specifically Jeon, further discloses: the decoding method of claim 1, further comprising:
reading second DPB data including information on a second DPB address from the DPB data buffer;
generating a second decoded picture by decoding the encoded bitstream (See flowchart in figure 5a-b, noting looping of decoding process, and [0072].); and
storing the second decoded picture at the second DPB address (B3 is a second buffer address).
Regarding claim 6, the combination of Jeon in view of Tseng discloses the limitations of claim 5, upon which claim 6 depends. This combination, specifically Jeon, further discloses: the decoding method of claim 5, wherein the reading the second DPB data includes reading the second DPB data from a next address of the address of the DPB data buffer where the first DPB data has been stored (See figure 6, showing sequential readout of frames from buffer regions, as disclosed in [0069]-[0070].).
Regarding claim 7, the combination of Jeon in view of Tseng discloses the limitations of claim 5, upon which claim 7 depends. This combination, specifically Jeon, further discloses: the decoding method of claim 5, further comprising:
reading a second input data including information on a second encoded bitstream buffer address from the input data buffer (See [0077], disclosing reading an image signal stored in a corresponding buffer, for example a second location B3.);
reading a third DPB data including information on a third DPB address from the DPB data buffer (See [0070]);
generating a third decoded picture by decoding a second encoded bitstream stored at the second encoded bitstream buffer address (See [0070].); and
storing the third decoded picture at the third DPB address (See [0065], “which stores the I-frame Il, from the display buffer list 240.”).
Regarding claim 8, the combination of Jeon in view of Tseng discloses the limitations of claim 1, upon which claim 8 depends. This combination, specifically Jeon, further discloses: the decoding method of claim 1, further comprising:
reading a second input data including information on a second encoded bitstream buffer address from the input data buffer (See [0077], disclosing reading an image signal stored in a corresponding buffer, for example a second location B3.);
generating a second decoded picture by decoding a second encoded bitstream stored at the second encoded bitstream buffer address (A second picture is stored at second location B3, as in [0081].); and
storing the second decoded picture at the first DPB address (See [0076], [0077]; when a flag bit is set to usable following read out of a frame, it is to allow storage at that location for a later frame.)
Regarding claim 10, the combination of Jeon in view of Tseng discloses the limitations of claim 1, upon which claim 10 depends. This combination, specifically Jeon, further discloses: the decoding method of claim 1, further comprising:
writing a second DPB data including information on a second DPB address in the DPB data buffer (B2, as disclosed in [0053], is a second buffer.).
Regarding claim 11, the combination of Jeon in view of Tseng discloses the limitations of claim 10, upon which claim 11 depends. This combination, specifically Jeon, further discloses: the decoding method of claim 10, wherein the writing the second DPB data includes:
determining whether a value of flag data of the first DPB data is a second value; and
writing the second DPB data at the address where the first DPB data has been stored, based on the value of the flag data of the first DPB data being the second value (In Jeon, a flag bit for a buffer location, e.g. B0, is set to not-available state N until the display device reads out an image signal from the buffer B0, at which point it is set to Y in order to enable another frame to be stored there, following a check of the value to confirm available state Y. See [0057]-[0060]).
Regarding claim 12, Jeon discloses: a system-on-chip comprising:
a processor configured to
write a first input data including information on a first encoded bitstream buffer address in an input data buffer (See S528, figure 5B, “Register information of buffer storing decoded frame at DPB Iist.”), and
write a first DPB data including information on a first DPB address in a DP data buffer (See S518, “Decode frame and store decoded frame in selected buffer.”); and
a codec configured to (See codec 122 in figure 2.)
read the first input data from the input data buffer (See [0057] disclosing a buffer state indication: “Since a flag bit corresponding to the buffer B0 of the buffer flag 210 indicates a usable state Y, the codec 122 may decode an image signal requested from the host 110.”),
read the first DPB data from the DPB data buffer (See [0050], “receiving information indicating decoding completion from the codec 122, the host 110 may control the display device 130 to read and display a decoded image signal stored in the buffer pool 230 of the memory 124.”),
generate a first decoded picture by decoding a first encoded bitstream stored at the first encoded bitstream buffer address (See [0049], “host 110 may request frame-unit decoding from the codec 122.”), and
store the first decoded picture at the first DPB address (Last three lines of [0049], “buffer pool 230 may include a plurality of buffers, each of which stores an image signal within a frame.”).
determine the first DPB data to be written in the DPB data buffer based on a pointer in the DPB data buffer,
However, Tseng discloses in an analogous art a ring buffer for frame reconstruction having read and write pointers, which fetches a previously reconstructed frame from the reconstruct frame buffer 133as, disclosed in [0039].
It would have been obvious to one having ordinary skill in the art before the time of the applicant’s effective filing date to incorporate into the decoding method of Jeon a DPB read pointer indicating a buffer address for the first DPB data. Buffer read and write pointers allow the decoder to asynchronously access the buffer read and write memory. Incorporating a read pointer would have had the benefit of reducing the memory requirement for storing reconstructed video for reference, while also reducing delay time for beginning compression, and would have predictable results for one having ordinary skill in the art. See Tseng [0039]-[0044].
System-on-chip claims 13-20 correspond, respectively, to decoding method claims 2-11; decoding method claims 2 and 3 correspond together to system-on-chip claim 13. Decoding claim 4 corresponds to system-on-chip claim 14. Decoding claim 4 corresponds to system-on-chip claim 15. Decoding claim 5 corresponds to system-on-chip claim 16, and decoding claims 7 and 8 respectively correspond to system-on-chip claims 17 and 18. Corresponding claims are respectively rejected for the same reasons of obviousness.
Regarding claim 19, this claim recites the same elements of a decoding device having a working memory and a system-on-chip, as in claims 1 and 12, respectively. Read and write operations are reciprocal to one another, and Jeon discloses both the read operations and the write operations of claims 1 and 12, as cited in the respective rejections for these claims. Therefore, claim 19 is rejected for the same reasons of obviousness respectively set forth in claims 1 and 12.
Regarding claim 20, Jeon discloses: the decoding device of claim 19, wherein the plurality of DPB data further includes a plurality of flag data (There is a flag set for each buffer region of figure 2. See [0048]), and
the system-on-chip is further configured to use or update the plurality of DPB data on
a basis of the plurality of flag data (See [0051], “The codec 122 may store a decoded image
signal in one of buffers in the buffer pool 230 represented as being in an unused state via the buffer list 220 and as being in a usable state via the buffer flag 210.”).
Allowable Subject Matter
Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art does not disclose or suggest:
The decoding method of claim 8, wherein the first decoded picture and the second decoded picture are top field data and bottom field data of an interlaced picture of one frame, respectively, and
the decoding method further includes writing an output data including information
indicating that decoding of the interlaced picture of one frame has been completed, in an output data buffer.
In particular, Jeon US 2013/0011074 A1, discloses in [0050] receiving information indicating decoding completion, but does not disclose indicating completion of a top or bottom field of an interlaced frame, as claimed in claim 9.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KYLE M LOTFI whose telephone number is (571)272-8762. The examiner can normally be reached 9:00-5:00.
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/KYLE M LOTFI/Examiner, Art Unit 2425
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