Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 3/05/2025 has been entered.
Response to Arguments
Applicant’s arguments, see pages 11-12, filed 3/05/2026, with respect to the rejection of claims 1-8 and 10-20 under 35 U.S.C. 103 have been fully considered and are persuasive. Specifically, the examiner is persuaded that neither Jeon nor Tseng discloses: “reading second DPB data including information on a second DPB address from the DPB data buffer; generating a second decoded picture by decoding the first encoded bitstream; and storing the second decoded picture at the second DPB address.” Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of the newly found prior art, Potetsianakis, US 2024/0056614 A1.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 6-8, 10, 12, and 17-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Potetsianakis, US 2024/0056614 A1.
Regarding claim 1, Potetsianakis discloses: a decoding method comprising:
reading a first input data including information on a first encoded bitstream buffer address from an input data buffer (See coded picture buffer (CPB), which as disclosed in [0003] stores encoded pictures with a removal order based on a priority, such as based on picture order count (POC). Specifically, as in [0145], “the decoding prioritization of DUs of a picture in the CPB may be realized on AU level. For this approach, an ordered list may be determined that comprises the identities, for example the DU identities as defined by the decoding_unit_idx parameter, for all the DUs in the AU in order of priority (higher to lower or vice versa).”);
reading first DPB data from a DPB data buffer. wherein the first DPB data includes information on a first DPB address (Processor allocates memory in a DPB to store a set of decoded pixels, as disclosed in [0020].);
generating a first decoded picture by decoding a first encoded bitstream stored at the first encoded bitstream buffer address (See [0022], which discloses decoding unit (DU) decoding by removal the DU from the CPB.); and
storing the first decoded picture at the first DPB address (See [0021], “Once decoded, sets of pixels representing an area in a picture, output picture areas, may be stored in the DPB according to their location in the picture.”);
reading second DPB data including information on a second DPB address from the DPB data buffer (Same process as in [0022]; this process loops for all decoding units until decoding is completed.);
generating a second decoded picture by decoding the first encoded bitstream () and
storing the second decoded picture at the second DPB address (Same process as in [0021]; this process loops until decoding is completed.).
Regarding claim 6, Jeon discloses: the decoding method of claim 1, wherein the reading the second DPB data comprises reading the second DPB data from a next address of the DPB data buffer where the first DPB data has been stored (See [0091], which discloses read/write process for decoding units (DUs) at a decoded picture buffer (DPB).).
Regarding claim 7, Potetsianakis discloses: the decoding method of claim 1, further comprising:
reading a second input data including information on a second encoded bitstream buffer address from the input data buffer (As disclosed in [0145], “the decoding prioritization of DUs of a picture in the CPB may be realized on AU level. For this approach, an ordered list may be determined that comprises the identities, for example the DU identities as defined by the decoding_unit_idx parameter, for all the DUs in the AU in order of priority (higher to lower or vice versa” – Decoding units are removed from the CPB by referencing their decoding_unit_idx.);
reading a third DPB data including information on a third DPB address from the DPB data buffer (Processor allocates memory in a DPB to store a set of decoded pixels, as disclosed in [0020].);
generating a third decoded picture by decoding a second encoded bitstream stored at the second encoded bitstream buffer address (The decoded picture generation process occurs by decoding all of the decoding units of a picture from. The process disclosed in Jeon in [0021] is understood to loop until completion. As disclosed in [0174] with respect to table 6, the decoder monitors status of each picture as to whether it is fully decoded.)
storing the third decoded picture at the third DPB address (As shown in figure 4b, and disclosed in [0091], the DUs of a picture stored at specific addresses within a DPB, and are also grouped together in the DPB according to what picture they belong to, “DUs of picture k that have been decoded, such as decoded DU.sub.2 424 and DU.sub.1, will be stored in the DPB at a location 426 that is allocated to DUs of picture k”).
Regarding claim 8, Potetsianakis discloses: the decoding method of claim 1, further comprising:
reading a second input data including information on a second encoded bitstream buffer address from the input data buffer (As disclosed in [0145], “the decoding prioritization of DUs of a picture in the CPB may be realized on AU level. For this approach, an ordered list may be determined that comprises the identities, for example the DU identities as defined by the decoding_unit_idx parameter, for all the DUs in the AU in order of priority (higher to lower or vice versa” – Decoding units are removed from the CPB by referencing their decoding_unit_idx.);
reading third DPB data from the DPB data buffer, wherein the third DPB data includes information on a third DPB address (Processor allocates memory in a DPB to store a set of decoded pixels, as disclosed in [0020].);
generating a third decoded picture by decoding a second encoded bitstream stored at the second encoded bitstream buffer address (The decoded picture generation process occurs by decoding all of the decoding units of a picture from. The process disclosed in Jeon in [0021] is understood to loop until completion. As disclosed in [0174] with respect to table 6, the decoder monitors status of each picture as to whether it is fully decoded.); and
storing the second decoded picture at the first DPB address (As shown in figure 4b, and disclosed in [0091], the DUs of a picture stored at specific addresses within a DPB, and are also grouped together in the DPB according to what picture they belong to, “DUs of picture k that have been decoded, such as decoded DU.sub.2 424 and DU.sub.1, will be stored in the DPB at a location 426 that is allocated to DUs of picture k. A second picture is stored at a first location when the first location is emptied of its content and subsequently marked as unused (“Y”).);
reading a third input data including information on a third encoded bitstream buffer address from the input data buffer (See coded picture buffer (CPB), which as disclosed in [0003] stores encoded pictures with a removal order based on a priority, such as based on picture order count (POC). Specifically, as in [0145], “the decoding prioritization of DUs of a picture in the CPB may be realized on AU level. For this approach, an ordered list may be determined that comprises the identities, for example the DU identities as defined by the decoding_unit_idx parameter, for all the DUs in the AU in order of priority (higher to lower or vice versa.);
generating a fourth decoded picture by decoding a third encoded bitstream stored at the third encoded bitstream buffer address (The decoded picture generation process occurs by decoding all of the decoding units of a picture from. The process disclosed in Jeon in [0021] is understood to loop until completion. As disclosed in [0174] with respect to table 6, the decoder monitors status of each picture as to whether it is fully decoded.); and
storing the fourth decoded picture at the third DPB address (As shown in figure 4b, and disclosed in [0091], the DUs of a picture stored at specific addresses within a DPB, and are also grouped together in the DPB according to what picture they belong to, “DUs of picture k that have been decoded, such as decoded DU.sub.2 424 and DU.sub.1, will be stored in the DPB at a location 426 that is allocated to DUs of picture k. A second picture is stored at a first location when the first location is emptied of its content and subsequently marked as unused (“Y”).).
Regarding claim 10, Potetsianakis discloses: the decoding method of claim 1, further comprising:
writing the second DPB data including information on the second DPB address in the DPB data buffer (See [0190], “In contrast, in the second embodiment (case 2), decoded DUs of video frame (step A) are used as a base for the next step in the decoding process. Thus, when in step B, the first DU of video frame N+1, DU.sub.1,N+1, is decoded, it is copied into the allocated memory of the DPB, overwriting pixel values that belong to the first DU of video frame N, DU.sub.1,N.”).
System-on-chip claims 12, 17, and 18 are directed to a system-on-chip comprising a processor configured to perform steps corresponding to the method steps of claims 1, 7, 8, respectively. Therefore, claims 12, 17, and 18 are rejected for the same reasons of anticipation as set forth above with respect to method claims 1, 7, and 8
Decoding device claim 19 is drawn to an apparatus implementing the corresponding method claimed in decoding method claim 1. Therefore, device claim 19 corresponds to method claim 1 and is rejected for the same reasons of anticipation as used above.
Regarding claim 20, Potetsianakis discloses, the decoding device of claim 19, wherein the plurality of DPB data further includes a plurality of flag data (See [0168], “pic_dpb_output_du_delay), and
the system-on-chip is further configured to use or update the plurality of DPB data on a basis of the plurality of flag data (As disclosed in [0168], “This delay value may be used by the decoder to compute the picture dpb output delay, i.e. the time after removal of the last decoding unit in an access unit from the CPB before the decoded picture is output from the DPB.”).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-4, 11, and 13-15 are rejected under 35 U.S.C. 103 as being unpatentable over Potetsianakis in view of Jeon, US 2013/0011074 A1.
Regarding claim 2, Potetsianakis discloses the limitations of claim 1, upon which claim 2 depends. Potetsianakis does not disclose: the decoding method of claim 1, further comprising:
determining whether a value of flag data of the first DPB data is a first value;
wherein the storing the first decoded picture at the first DPB address includes storing the first decoded picture at the first DPB address based on the value of the flag data of the first DPB data being the first value.
However, Jeon discloses in an analogous art directed to a video decoder using a buffer state flag to indicate a usable or not available state of each buffer.
determining whether a value of flag data of the first DPB data is a first value (See S516 in figure 5A- a first value is a “Y”, indicating an unused state of the buffer.);
wherein the storing the first decoded picture at the first DPB address includes storing the first decoded picture at the first DPB address based on the value of the flag data of the first DPB data being the first value (See [0068], disclosing storing a decoded image signal in a selected buffer based on its having a unused state flag.).
It would have been obvious to one having ordinary skill in the art before the time of the applicant’s effective filing date to incorporate the DPB usable/not-available flag disclosed in Jeon, in order to keep the encoder apprised of buffer available locations for more effective management of the buffer. See [0083] in Jeon.
Regarding claim 3, the combination of Potetsianakis in view of Jeon discloses the limitations of claim 2, upon which claim 3 depends. This combination, specifically Jeon, further discloses: the decoding method of claim 2, further comprising: changing the value of the flag data of the first DPB data to a second value based on storing the first decoded picture at the first DPB address (See [0054]-[0056], disclosing setting a buffer flag 210 in figure 3 to a not-available state when the buffer is in use.).
Regarding claim 4, the combination of Potetsianakis in view of Jeon discloses the limitations of claim 2, upon which claim 4 depends. This combination, specifically Jeon, further discloses: the decoding method of claim 2, wherein the reading the second DPB data comprises reading the second DPB data from a next address of the DPB data buffer where the first DPB data has been stored, based on the value of the flag data of the first DPB data being a second value (See [0059], which discloses, “host 110 may control the display device 140 to read out an image signal from the buffer B0 in the buffer pool 230. Until the display device 140 reads out an image signal from the buffer B0 within the buffer pool 230, the host 110 may set a flag bit corresponding to the buffer B0 to a not-available state N.”).
Regarding claim 11, Potetsianakis discloses the limitation of claim 10, upon which claim 11 depends. Potetsianakis does not disclose: the decoding method of claim 10, wherein the writing the second DPB data includes:
determining whether a value of flag data of the first DPB data is a second value; and
writing the second DPB data at an address where the first DPB data has been stored, based on the value of the flag data of the first DPB data being the second value.
It would have been obvious to one having ordinary skill in the art before the time of the applicant’s effective filing date to incorporate the DPB usable/not-available flag disclosed in Jeon, in order to keep the encoder apprised of buffer available locations for more effective management of the buffer. See [0083] in Jeon.
System-on-chip claims 13-15, are directed to a system-on-chip comprising a processor configured to perform steps corresponding to the method steps of claims 3, 4, 11, respectively. Therefore, claims 13-15 are rejected for the same reasons of obviousness as set forth above with respect to method claims 3, 4, and 11.
Allowable Subject Matter
Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art does not disclose or suggest:
The decoding method of claim 8, wherein the first decoded picture and the second decoded picture are top field data and bottom field data of an interlaced picture of one frame, respectively, and
the decoding method further includes writing an output data including information
indicating that decoding of the interlaced picture of one frame has been completed, in an output data buffer.
In particular, Jeon US 2013/0011074 A1, discloses in [0050] receiving information indicating decoding completion, but does not disclose indicating completion of a top or bottom field of an interlaced frame, as claimed in claim 9.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KYLE M LOTFI whose telephone number is (571)272-8762. The examiner can normally be reached 9:00-5:00.
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/KYLE M LOTFI/Examiner, Art Unit 2425
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