DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to the filling of the Amendment on 08/07/2026.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-8 and 13-20 are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al. (US 2023/0134427), hereinafter Liu, in view of Giuliano et al. (US 8,724,353), hereinafter Giuliano.
Regarding claim 1, Liu discloses (see figures 1-35) a voltage converter (figure 3, part 200) comprising: a plurality of switches (figure 3, parts 211, 213-218, 221 and 223-228); a first conversion circuit (figure 3, part first conversion circuit generated by 211-213, 215, 221-223 and 225) connected to a voltage source (figure 3, part VIN), the first conversion circuit (figure 3, part first conversion circuit generated by 211-213, 215, 221-223 and 225) comprising a first flying capacitor (figure 3, part 222) and a second flying capacitor (figure 3, part 212) connected to the first flying capacitor (figure 3, part 222); a second conversion circuit (figure 3, part second conversion circuit generated by 214, 216-219, 224 and 226-229) comprising a third flying capacitor (figure 3, part 229) and a fourth flying capacitor (figure 3, part 219) each being connected to an output node (figure 3, part output node at VOUT), the second conversion circuit (figure 3, part second conversion circuit generated by 214, 216-219, 224 and 226-229) being configured to output a charging current through the output node (figure 3, part output node at VOUT); and a switch controller (figure 3, part switch controller [not shown] that control 211, 213-218, 221 and 223-228) connected to the first conversion circuit (figure 3, part first conversion circuit generated by 211-213, 215, 221-223 and 225) and the second conversion circuit (figure 3, part second conversion circuit generated by 214, 216-219, 224 and 226-229), wherein the switch controller (figure 3, part switch controller [not shown] that control 211, 213-218, 221 and 223-228) is configured to control the plurality of switches (figure 3, parts 211, 213-218, 221 and 223-228) to alternately (figure 6, parts 1st half cycle and 2nd half cycle) perform: a first operation (figure 6, parts 1st half cycle) that connects the first flying capacitor (figure 4, part 222) to the voltage source (figure 4, part VIN; through 221), connects the third flying capacitor (figure 4, part 229) to the first flying capacitor (figure 4, part 222; through 224) and the second flying capacitor (figure 4, part 212; through 225), and connects the second flying capacitor (figure 4, part 212; through 213) and the fourth flying capacitor to a ground (figure 4, part 219; through 218), and a second operation (figure 6, parts 2nd half cycle) that connects the first flying capacitor (figure 5, part 222; through 223) and the third flying capacitor to the ground (figure 5, part 229; through 228), connects the second flying capacitor (figure 5, part 212; through 211) to the voltage source (figure 5, part VIN), and connects the fourth flying capacitor (figure 5, part 219) to the first flying capacitor (figure 5, part 222; through 215) and the second flying capacitor (figure 5, part 212; through 214), each of the third flying capacitor (figure 3, part 229) and the fourth flying capacitor (figure 3, part 219) is a capacitor (figure 3, parts 229 and 219) and a gate voltage to at least one of the plurality of switches (figure 3, parts gate voltage to at least one of 211, 213-218, 221 and 223-228) (paragraphs [0060]-[0078]).
Liu does not expressly disclose each of the third flying capacitor and the fourth flying capacitor is a bootstrap capacitor to apply a gate voltage to at least one of the plurality of switches.
Giuliano teaches (see figures 1-13) each of the third flying capacitor (figure 8, part C3A) and the fourth flying capacitor (figure 8, part C3B) is a bootstrap capacitor (figure 8, parts C3A and C3B) to apply a gate voltage to at least one of the plurality of switches (figure 8, part a gate voltage of M3A and M3B [through 34]) (columns 7-8; lines 16-67 and 1-56; Powering the gate drivers from a parallel charge transfer path (i.e. opposing phase) results in one less voltage follower per phase and the voltage followers do not consume power).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the voltage converter of Liu with the bootstrap capacitor features as taught Giuliano and obtain a voltage converter comprising: a plurality of switches; a first conversion circuit connected to a voltage source, the first conversion circuit comprising a first flying capacitor and a second flying capacitor connected to the first flying capacitor; a second conversion circuit comprising a third flying capacitor and a fourth flying capacitor each being connected to an output node, the second conversion circuit being configured to output a charging current through the output node; and a switch controller connected to the first conversion circuit and the second conversion circuit, wherein the switch controller is configured to control the plurality of switches to alternately perform: a first operation that connects the first flying capacitor to the voltage source, connects the third flying capacitor to the first flying capacitor and the second flying capacitor, and connects the second flying capacitor and the fourth flying capacitor to a ground, and a second operation that connects the first flying capacitor and the third flying capacitor to the ground, connects the second flying capacitor to the voltage source, and connects the fourth flying capacitor to the first flying capacitor and the second flying capacitor, wherein each of the third flying capacitor and the fourth flying capacitor is a bootstrap capacitor to apply a gate voltage to at least one of the plurality of switches, because it provides more efficient and compact driver circuit with less power consumption and less circuit components (column 8; lines 1-12).
Regarding claim 2, Liu and Giuliano teach everything claimed as applied above (see claim 1). Further, Liu discloses (see figures 1-35) based on the switch controller (figure 3, part switch controller [not shown] that control 211, 213-218, 221 and 223-228) controlling the plurality of switches (figure 3, parts 211, 213-218, 221 and 223-228) to alternately perform the first operation (figure 6, part 1st half cycle) and the second operation (figure 6, part 2nd half cycle), the voltage source (figure 6, part VIN) is configured to generate a first input voltage having a predetermined first ratio (figure 6, part VIN = 4VOUT) with respect to a charging voltage according to the charging current (figure 3, part output node at VOUT) (paragraph [0060]; FIG. 3 illustrates a schematic diagram of a 4:1 dual-phase switched capacitor converter).
Regarding claim 3, Liu and Giuliano teach everything claimed as applied above (see claim 2). Further, Liu discloses (see figures 1-35) the first conversion circuit (figure 3, part first conversion circuit generated by 211-213, 215, 221-223 and 225) further comprises: a first switch (figure 3, part 221) connected between the voltage source (figure 3, part VIN) and the first flying capacitor (figure 3, part 222); a second switch (figure 3, part 223) connected between the first flying capacitor (figure 3, part 222) and the ground (figure 3, part ground); a third switch (figure 3, part 211) connected between the voltage source (figure 3, part VIN) and the second flying capacitor (figure 3, part 212); a fourth switch (figure 3, part 213) connected between the second flying capacitor (figure 3, part 212) and the ground (figure 3, part ground); a fifth switch (figure 3, part 215) connected between a point between the first switch (figure 3, part 212) and the first flying capacitor (figure 3, part 222) and a point between the second flying capacitor (figure 3, part 212) and the fourth switch (figure 3, part 213; through 214); and a sixth switch (figure 3, part 225) connected between a point between the third switch (figure 3, part 211) and the second flying capacitor (figure 3, part 212) and a point between the first flying capacitor (figure 3, part 222) and the second switch (figure 3, part 223; through 224), and wherein the plurality of switches (figure 3, parts 211, 213-218, 221 and 223-228) comprise the first switch (figure 3, part 221), the second switch (figure 3, part 223), the third switch (figure 3, part 211), the fourth switch (figure 3, part 213), the fifth switch (figure 3, part 215), and the sixth switch (figure 3, part 225).
Regarding claim 4, claim 18 has the same limitations, based on this is rejected for the same reasons.
Regarding claim 5, Liu and Giuliano teach everything claimed as applied above (see claim 3). Further, Liu discloses (see figures 1-35) the first flying capacitor (figure 3, part 222) and the second flying capacitor (figure 3, part 212) are maintained at a first intermediate voltage (figure 3, part intermediate voltage at 222 and 212) having a level between the charging voltage (figure 3, part VOUT) and the first input voltage (figure 6, part VIN = 4VOUT), and wherein, based on the switch controller (figure 3, part switch controller [not shown] that control 211, 213-218, 221 and 223-228) controlling the plurality of switches (figure 3, parts 211, 213-218, 221 and 223-228) to alternately perform the first operation (figure 6, part 1st half cycle) and the second operation (figure 6, part 2nd half cycle), a first intermediate current (figure 3, part intermediate current applied to 222 and 212) smaller than the charging current (figure 3, part charging current at output node at VOUT) is applied to the first flying capacitor (figure 3, part 222) and the second flying capacitor (figure 3, part 212).
Regarding claim 6, Liu and Giuliano teach everything claimed as applied above (see claim 3). Further, Liu discloses (see figures 1-35) Liu discloses (see figures 1-35) the second conversion circuit (figure 3, part second conversion circuit generated by 214, 216-219, 224 and 226-229) comprises: a seventh switch (figure 3, part 224), an eighth switch (figure 3, part 226), a ninth switch (figure 3, part 227), and a tenth switch (figure 3, part 228) connected in series between the ground (figure 3, part ground) and a first connection node (figure 3, part first connection node between 222 and 223), the first connection node (figure 3, part first connection node between 222 and 225) being between the first flying capacitor (figure 3, part 222) and the sixth switch (figure 3, part 225); an eleventh switch (figure 3, part 214), a twelfth switch (figure 3, part 216), a thirteenth switch (figure 3, part 217), and a fourteenth switch (figure 3, part 218) connected in series between the ground (figure 3, part ground) and a second connection node (figure 3, part second connection node between 212 and 215), the second connection node (figure 3, part second connection node between 212 and 215) being between the second flying capacitor (figure 3, part 212) and the fifth switch (figure 3, part 215); wherein the second conversion circuit (figure 3, part second conversion circuit generated by 214, 216-219, 224 and 226-229) is further configured to output the charging current (figure 3, part charging current at output node at VOUT) through the output node (figure 3, part output node at VOUT) that is commonly connected to the eighth switch (figure 3, part 226), the ninth switch (figure 3, part 227), the twelfth switch (figure 3, part 216), and the thirteenth switch (figure 3, part 217), and wherein the output node (figure 3, part output node at VOUT) is between the eighth switch (figure 3, part 226) and the ninth switch (figure 3, part 227), and the output node (figure 3, part output node at VOUT) is between the twelfth switch (figure 3, part 216) and the thirteenth switch (figure 3, part 217), and wherein the plurality of switches (figure 3, parts 211, 213-218, 221 and 223-228) comprise the seventh switch (figure 3, part 224), the eighth switch (figure 3, part 226), the ninth switch (figure 3, part 227), the tenth switch (figure 3, part 228), the eleventh switch (figure 3, part 214), the twelfth switch (figure 3, part 216), the thirteenth switch (figure 3, part 217), and the fourteenth switch (figure 3, part 218) (paragraphs [0060]-[0078]).
Regarding claim 7, Liu and Giuliano teach everything claimed as applied above (see claim 6). Further, Liu discloses (see figures 1-35) the third flying capacitor (figure 3, part 229) is connected between a first node (figure 3, part first node between 224 and 226), the first node (figure 3, part first node between 224 and 226) being between the seventh switch (figure 3, part 224) and the eighth switch (figure 3, part 226), and a second node (figure 3, part second node between 227 and 228), the second node (figure 3, part second node between 227 and 228) being between the ninth switch (figure 3, part 227) and the tenth switch (figure 3, part 228), and wherein the fourth flying capacitor (figure 3, part 219) is connected between a third node (figure 3, part third node between 214 and 216), the third node (figure 3, part third node between 214 and 216) being between the eleventh switch (figure 3, part 214) and the twelfth switch (figure 3, part 216), and a fourth node (figure 3, part fourth node between 217 and 218), the fourth node (figure 3, part fourth node between 217 and 218) being between the thirteenth switch (figure 3, part 217) and the fourteenth switch (figure 3, part 218).
Regarding claim 8, Liu and Giuliano teach everything claimed as applied above (see claim 5). Further, Liu discloses (see figures 1-35) the third flying capacitor (figure 3, part 229) and the fourth flying capacitor (figure 3, part 219) are maintained at a second intermediate voltage having a level (figure 3, part second intermediate voltage at 229 and 219), which is smaller than the first intermediate voltage current (figure 3, part intermediate current applied to 222 and 212), between the charging voltage (figure 3, part VOUT) and the first input voltage (figure 6, part VIN = 4VOUT), and wherein, based on the switch controller controlling (figure 3, part switch controller [not shown] that control 211, 213-218, 221 and 223-228) the plurality of switches (figure 3, parts 211, 213-218, 221 and 223-228) to alternately perform the first operation (figure 6, part 1st half cycle) and the second operation (figure 6, part 2nd half cycle), a second intermediate current (figure 3, part second intermediate current applied to 229 and 219), which is greater than the first intermediate current (figure 3, part intermediate current applied to 222 and 212) and smaller than the charging current (figure 3, part charging current at output node at VOUT), is applied to the third flying capacitor (figure 3, part 229) and the fourth flying capacitor (figure 3, part 219).
Regarding claim 13, claim 19 has the same limitations, based on this is rejected for the same reasons.
Regarding claim 14, Liu and Giuliano teach everything claimed as applied above (see claim 2). Further, Liu discloses (see figures 1-35) based on the switch controller (figure 3, part switch controller [not shown] that control 211, 213-218, 221 and 223-228) controlling the plurality of switches (figure 3, parts 211, 213-218, 221 and 223-228) to alternately perform the first operation (figure 6, part 1st half cycle) and the second operation (figure 6, part 2nd half cycle), a first voltage stress corresponding to the charging voltage (figure 3, part VOUT) is applied to switches that are turned off among a plurality of switches (figure 3, parts 211, 213-218, 221 and 223-228) in the second conversion circuit (figure 3, part second conversion circuit generated by 214, 216-219, 224 and 226-229).
Regarding claim 15, Liu and Giuliano teach everything claimed as applied above (see claim 1). Further, Liu discloses (see figures 1-35) the first conversion circuit (figure 3, part first conversion circuit generated by 211-213, 215, 221-223 and 225) further comprises: a first switch (figure 3, part 221) connected between the voltage source (figure 3, part VIN) and the first flying capacitor (figure 3, part 222); a second switch (figure 3, part 223) connected between the first flying capacitor (figure 3, part 222) and the third flying capacitor (figure 3, part 229; through 228); a third switch (figure 3, part 211) connected between the voltage source (figure 3, part VIN) and the second flying capacitor (figure 3, part 212); a fourth switch (figure 3, part 213) connected between the second flying capacitor (figure 3, part 212) and the fourth flying capacitor (figure 3, part 219; through 218); a fifth switch (figure 3, part 215) connected between a point between the first switch (figure 3, part 221) and the first flying capacitor (figure 3, part 222) and a point between the second flying capacitor (figure 3, part 212) and the fourth switch (figure 3, part 213; through 214); and a sixth switch (figure 3, part 225) connected between a point between the third switch (figure 3, part 211) and the second flying capacitor (figure 3, part 212) and a point between the first flying capacitor (figure 3, part 222) and the second switch (figure 3, part 223; through 224).
Regarding claim 16, Liu discloses (see figures 1-35) a voltage conversion circuit (figure 3, part 200) comprising: a first switch (figure 3, part 221) and a second switch (figure 3, part 223) that connected in series between a voltage source (figure 3, part VIN) and a ground (figure 3, part ground); a first flying capacitor (figure 3, part 222) connected between the first switch (figure 3, part 221) and the second switch (figure 3, part 223); a third switch (figure 3, part 211) and a fourth switch (figure 3, part 213) that connected in parallel with the first switch (figure 3, part 221) and the second switch (figure 3, part 223), the third switch (figure 3, part 211) and the fourth switch (figure 3, part 213) being between the voltage source (figure 3, part VIN) and the ground (figure 3, part ground); a second flying capacitor (figure 3, part 212) connected between the third switch (figure 3, part 211) and the fourth switch (figure 3, part 213); a fifth switch (figure 3, part 215) connected between a point between the first switch (figure 3, part 221) and the first flying capacitor (figure 3, part 222) and a point between the second flying capacitor (figure 3, part 212) and the fourth switch (figure 3, part 213; through 214); a sixth switch (figure 3, part 225) connected between a point between the third switch (figure 3, part 211) and the second flying capacitor (figure 3, part 212) and a point between the first flying capacitor (figure 3, part 222) and the second switch (figure 3, part 223; through 224); a seventh switch (figure 3, part 224), an eighth switch (figure 3, part 226), a ninth switch (figure 3, part 227), and a tenth switch (figure 3, part 228) connected in series between the ground (figure 3, part ground) and a first connection node (figure 3, part first connection node between 222 and 223), the first connection node (figure 3, part first connection node between 222 and 225) being between the first flying capacitor (figure 3, part 222) and the sixth switch (figure 3, part 225); an eleventh switch (figure 3, part 214), a twelfth switch (figure 3, part 216), a thirteenth switch (figure 3, part 217), and a fourteenth switch (figure 3, part 218) connected in series between the ground (figure 3, part ground) and a second connection node (figure 3, part second connection node between 212 and 215), the second connection node (figure 3, part second connection node between 212 and 215) being between the second flying capacitor (figure 3, part 212) and the fifth switch (figure 3, part 215); a third flying capacitor (figure 3, part 229) connected between a first node between the seventh switch (figure 3, part 224) and the eighth switch (figure 3, part 226) and a second node between the ninth switch (figure 3, part 227) and the tenth switch (figure 3, part 228); and a fourth flying capacitor (figure 3, part 219) connected between a third node between the eleventh switch (figure 3, part 214) and the twelfth switch (figure 3, part 216) and a fourth node between the thirteenth switch (figure 3, part 217) and the fourteenth switch (figure 3, part 218), wherein a charging current is output through an output node (figure 3, part output node at VOUT) that is commonly connected to the eighth switch (figure 3, part 226), the ninth switch (figure 3, part 227), the twelfth switch (figure 3, part 216), and the thirteenth switch (figure 3, part 217), and wherein the output node (figure 3, part output node at VOUT) is between the eighth switch (figure 3, part 226) and the ninth switch (figure 3, part 227), and the output node (figure 3, part output node at VOUT) is between the twelfth switch (figure 3, part 216) and the thirteenth switch (figure 3, part 217), wherein a plurality of switches (figure 3, parts gate voltage to at least one of 211, 213-218, 221 and 223-228) comprise the first switch (figure 3, part 221), the second switch (figure 3, part 223), the third switch (figure 3, part 211), the fourth switch (figure 3, part 213), the fifth switch (figure 3, part 215), the sixth switch (figure 3, part 225), the seventh switch (figure 3, part 224), the eighth switch (figure 3, part 226), the ninth switch (figure 3, part 227), the tenth switch (figure 3, part 228), the eleventh switch (figure 3, part 214), the twelfth switch (figure 3, part 216), the thirteenth switch (figure 3, part 217), and the fourteenth switch (figure 3, part 218), and wherein each of the third flying capacitor (figure 3, part 229) and the fourth flying capacitor (figure 3, part 219) is a capacitor (figure 3, parts 229 and 219) and a gate voltage to at least one of the plurality of switches (figure 3, parts gate voltage to at least one of 211, 213-218, 221 and 223-228) (paragraphs [0060]-[0078]).
Liu does not expressly disclose each of the third flying capacitor and the fourth flying capacitor is a bootstrap capacitor to apply a gate voltage to at least one of the plurality of switches.
Giuliano teaches (see figures 1-13) each of the third flying capacitor (figure 8, part C3A) and the fourth flying capacitor (figure 8, part C3B) is a bootstrap capacitor (figure 8, parts C3A and C3B) to apply a gate voltage to at least one of the plurality of switches (figure 8, part a gate voltage of M3A and M3B [through 34]) (columns 7-8; lines 16-67 and 1-56; Powering the gate drivers from a parallel charge transfer path (i.e. opposing phase) results in one less voltage follower per phase and the voltage followers do not consume power).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the voltage converter of Liu with the bootstrap capacitor features as taught Giuliano and obtain a voltage conversion circuit comprising: a first switch and a second switch that are connected in series between a voltage source and a ground; a first flying capacitor connected between the first switch and the second switch; a third switch and a fourth switch that are connected in parallel with the first switch and the second switch, the third switch and the fourth switch being between the voltage source and the ground; a second flying capacitor connected between the third switch and the fourth switch; a fifth switch connected between a point between the first switch and the first flying capacitor and a point between the second flying capacitor and the fourth switch; a sixth switch connected between a point between the third switch and the second flying capacitor and a point between the first flying capacitor and the second switch; a seventh switch, an eighth switch, a ninth switch, and a tenth switch connected in series between the ground and a first connection node, the first connection node being between the first flying capacitor and the sixth switch; an eleventh switch, a twelfth switch, a thirteenth switch, and a fourteenth switch connected in series between the ground and a second connection node, the second connection node being between the second flying capacitor and the fifth switch; a third flying capacitor connected between a first node between the seventh switch and the eighth switch and a second node between the ninth switch and the tenth switch; and a fourth flying capacitor connected between a third node between the eleventh switch and the twelfth switch and a fourth node between the thirteenth switch and the fourteenth switch, wherein a charging current is output through an output node that is commonly connected to the eighth switch, the ninth switch, the twelfth switch, and the thirteenth switch, wherein the output node is between the eighth switch and the ninth switch, and the output node is between the twelfth switch and the thirteenth switch, wherein a plurality of switches comprise the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, the seventh switch, the eighth switch, the ninth switch, the tenth switch, the eleventh switch, the twelfth switch, the thirteenth switch, and the fourteenth switch, and wherein each of the third flying capacitor and the fourth flying capacitor is a bootstrap capacitor to apply a gate voltage to at least one of the plurality of switches, because it provides more efficient and compact driver circuit with less power consumption and less circuit components (column 8; lines 1-12).
Regarding claim 17, Liu and Giuliano teach everything claimed as applied above (see claim 16). Further, Liu discloses (see figures 1-35) a switch controller (figure 3, part switch controller [not shown] that control 211, 213-218, 221 and 223-228) connected to the plurality of switches (figure 3, parts 211, 213-218, 221 and 223-228), wherein the switch controller (figure 3, part switch controller [not shown] that control 211, 213-218, 221 and 223-228) is configured to control the plurality of switches (figure 3, parts 211, 213-218, 221 and 223-228) to alternately (figure 6, parts 1st half cycle and 2nd half cycle) perform: a first operation (figure 6, parts 1st half cycle) that connects the first flying capacitor (figure 4, part 222) to the voltage source (figure 4, part VIN; through 221), connects the third flying capacitor (figure 4, part 229) to the first flying capacitor (figure 4, part 222; through 224) and the second flying capacitor (figure 4, part 212; through 225), and connects the second flying capacitor (figure 4, part 212; through 213) and the fourth flying capacitor to a ground (figure 4, part 219; through 218), and a second operation (figure 6, parts 2nd half cycle) that connects the first flying capacitor (figure 5, part 222; through 223) and the third flying capacitor to the ground (figure 5, part 229; through 228), connects the second flying capacitor (figure 5, part 212; through 211) to the voltage source (figure 5, part VIN), and connects the fourth flying capacitor (figure 5, part 219) to the first flying capacitor (figure 5, part 222; through 215) and the second flying capacitor (figure 5, part 212; through 214) (paragraphs [0060]-[0078]).
Regarding claim 18, Liu and Giuliano teach everything claimed as applied above (see claim 17). Further, Liu discloses (see figures 1-35) the switch controller (figure 3, part switch controller [not shown] that control 211, 213-218, 221 and 223-228) is further configured to: in the first operation (figure 6, parts 1st half cycle), turn on the first switch (figure 4, part 221; turn-on), the fourth switch (figure 4, part 213; turn-on), the sixth switch (figure 4, part 225; turn-on), the seventh switch (figure 4, part 224; turn-on), the ninth switch (figure 4, part 227; turn-on), the twelfth switch (figure 4, part 216; turn-on), and the fourteenth switch (figure 4, part 218; turn-on), in the first operation (figure 6, parts 1st half cycle), turn off the second switch (figure 4, part 223; turn-off), the third switch (figure 4, part 211; turn-off), the fifth switch (figure 4, part 215; turn-off), the eighth switch (figure 4, part 226; turn-off), the tenth switch (figure 4, part 228; turn-off), the eleventh switch (figure 4, part 214; turn-off), and the thirteenth switch (figure 4, part 217; turn-off), in the second operation (figure 6, parts 2nd half cycle), turn on the second switch (figure 5, part 223; turn-on), the third switch (figure 5, part 211; turn-on), the fifth switch (figure 5, part 215; turn-on), the eighth switch (figure 5, part 226; turn-on), the tenth switch (figure 5, part 228; turn-on), the eleventh switch (figure 5, part 214; turn-on), and the thirteenth switch (figure 5, part 217; turn-on), and in the second operation (figure 6, parts 2nd half cycle), turn off the first switch (figure 5, part 221; turn-off), the fourth switch (figure 5, part 213; turn-off), the sixth switch (figure 5, part 225; turn-off), the seventh switch (figure 5, part 224; turn-off), the ninth switch (figure 5, part 227; turn-off), the twelfth switch (figure 5, part 216; turn-off), and the fourteenth switch (figure 5, part 218; turn-off).
Regarding claim 19, Liu and Giuliano teach everything claimed as applied above (see claim 17). Further, Liu discloses (see figures 1-35) the switch controller (figure 3, part switch controller [not shown] that control 211, 213-218, 221 and 223-228) is further configured to control the plurality of switches (figure 3, parts 211, 213-218, 221 and 223-228) to perform: the first operation (figure 6, part 1st half cycle) based on a first signal having a predetermined duty ratio (figure 6, part first signal having a predetermined duty ratio at 1st half cycle), and the second operation (figure 6, part 2nd half cycle) based on a second signal having the predetermined duty ratio and a phase opposite (figure 6, part second signal having the predetermined duty ratio at 2nd half cycle) to the first signal (figure 6, part first signal having a predetermined duty ratio at 1st half cycle).
Regarding claim 20, claim 1 has the same limitations, based on this is rejected for the same reasons.
Allowable Subject Matter
Claims 9-12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The closest prior art (which has been made of record) fail to disclose (by themselves or in combination):
Regarding claim 9, each of the plurality of switches is implemented with a transistor, wherein a source electrode of the fifth switch is connected to a source electrode of the eleventh switch, and wherein a source electrode of the sixth switch is connected to a source electrode of the seventh switch;
Regarding claim 10, the claim 10 is dependent claim of claim 9, therefore, it is objected by the same reason presented above;
Regarding claim 11, a first auxiliary switch connected between the voltage source and the third flying capacitor, the first auxiliary switch being connected between the voltage source and the eighth switch; and a second auxiliary switch connected between the voltage source and the fourth flying capacitor, the second auxiliary switch being connected between the voltage source and the twelfth switch, wherein the switch controller is configured to: turn off the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, the seventh switch, and the eleventh switch, and control the first auxiliary switch, the second auxiliary switch, and at least some of the plurality of switches in the second conversion circuit to allow the voltage source to generate the charging voltage and a second input voltage smaller than the first input voltage;
Regarding claim 12, the first conversion circuit further comprises: a first additional switch connected between the first switch and the voltage source; a second additional switch connected between the third switch and the voltage source; a fifth flying capacitor connected between a point between the first additional switch and the first switch and a point between the fifth switch and the second connection node; and a sixth flying capacitor connected between a point between the second additional switch and the third switch and a point between the sixth switch and the first connection node, and wherein the switch controller is further configured to control the plurality of switches in the first conversion circuit and the second conversion circuit to allow the voltage source to generate a third input voltage greater than the first input voltage;
In combination with the additionally claimed features, as are claimed by the Applicant. Thus, the Applicant’s claims are determined to be novel and non-obvious.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance”.
Response to Arguments
Applicant’s arguments with respect to claims 1, 16 and 20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Carlos O. Rivera-Pérez, whose telephone number is (571) 272-2432 and fax is (571) 273-2432. The examiner can normally be reached on Monday through Friday, 8:30 AM – 5:00 PM EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu V. Tran can be reached on (571) 270-1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/C.O.R. /
Examiner, Art Unit 2838
/THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838
