DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Response to Arguments
Applicant's arguments filed 03/02/2026 regarding the prior art rejections of Claims 1 – 22 have been fully considered, but they are not persuasive.
The Remarks argue that:
Favorable reconsideration of this application is respectfully requested in view of amendments above and the following remarks.
By virtue of the amendments above, claims 7-11, 14-16, and 18-21 have been amended to recite additional patentable features in independent claim(s) and make minor/editorial changes in claims 7-11, 14-16, and 18-21. Support for the amendments may at least be found in the original specification.
Accordingly, claims 1-22 are pending in the present application of which claims 1, 12, and 22 are independent.
No new matter has been introduced by way of the above amendments or addition; entry thereof is therefore respectfully requested.
Claims 1-22 were rejected under 35 U.S.C. §103 as allegedly being unpatentable over U.S. Patent Application Publication No. 2017/0302294 Al to Zeng et al. ("Zeng") in view of U.S. Patent Application Publication No. 2023/0386543 Al to Tran et al. ("Tran") in view of U.S. Patent Application Publication No. 2024/0054046 Al to Khayat et al. ("Khayat").
Drawings
The indication that the drawings submitted on May 30, 2024 have been approved is noted with appreciation.
Information Disclosure Statement
The indication that the documents cited in the Information Disclosure Statement (IDS) filed on May 30, 2024 have been considered is noted with appreciation.
Claim Rejections Under 35 U.S.C. §103
The test for determining if a claim is rendered obvious by one or more references for purposes of a rejection under 35 U.S.C. § 103 is set forth in KSR International Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007):
"Under §103, the scope and content of the prior art are to be determined; differences
between the prior art and the claims at issue are to be ascertained; and the level of
ordinary skill in the pertinent art resolved. Against this background the obviousness or nonobviousness of the subject matter is determined. Such secondary considerations as commercial success, long felt but unsolved needs, failure of others, etc., might be utilized to give light to the circumstances surrounding the origin of the subject matter sought to be patented." Quoting Graham v. John Deere Co. of Kansas City, 383 U.S. 1 (1966).
As set forth in MPEP 2143.03, to ascertain the differences between the prior art and the
claims at issue, "[a]ll claim limitations must be considered" because "all words in a claim must
be considered in judging the patentability of that claim against the prior art." In re Wilson, 424
F.2d 1382, 1385. According to the Examination Guidelines for Determining Obviousness Under
35 U.S.C. 103 in view of KSR International Co. v. Teleflex Inc., 550 U.S. 398 (2007), once the
Graham factual inquiries are resolved, there must be a determination of whether the claimed
invention would have been obvious to one of ordinary skill in the art based on any one of the
following proper rationales:
(A) Combining prior art elements according to known methods to yield predictable results; (B) Simple substitution of one known element for another to obtain predictable results; (C) Use of known technique to improve similar devices (methods, or products) in the same way; (D) Applying a known technique to a known device (method, or product) ready for improvement to yield predictable results; (E) "Obvious to try"-choosing from a finite number of identified, predictable solutions, with a reasonable expectation of success; (F) Known work in one field of endeavor may prompt variations of it for use in either the same field or a different one based on design incentives or other market forces if the variations would have been predictable to one of ordinary skill in the art; (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Furthermore, as set forth in KSR International Co. v. Teleflex Inc., quoting from In re Kahn, 441 F.3d 977, 988 (CA Fed. 2006), "[R]ejections on obviousness grounds cannot be sustained by mere conclusory statements; instead, there must be some articulated reasonings with some rational underpinning to support the legal conclusion of obviousness."
Therefore, if the above-identified criteria and rationales are not met, then the cited reference(s) fails to render obvious the claimed invention and thus, the claimed invention is distinguishable over the cited reference(s).
Claims 1-11
Claims 1-7, 9 and 10 were rejected under 35 U.S.C. §103 as being unpatentable over Zeng in view of Tran. Claims 8 and 11 were rejected under 35 U.S.C. § 103 as being unpatentable over Zeng in view of Tran and further in view of Khayat. Without a disclaimer to any other reason that may have been previously raised or can be raised for traversal of this rejection, this rejection is respectfully traversed for at least the following reasons.
Claim 1 recites:
A method for calculating checksums in a controller inside a memory
device, comprising:
selecting a subset matrix derived from an error correction code (ECC)
parity-check matrix used in the controller; and
performing a partial checksum calculation using the subset matrix to
estimate bit error rate (BER).
Zeng fails to teach or suggest "selecting a subset matrix derived from an error correction code (ECC) parity-check matrix used in the controller". More specifically, the Office Action at page 2 asserts that converting the initial parity-check matrix into a new parity-check matrix according to a preset condition as described at paragraph 25 of Zeng corresponds to "selecting a subset matrix derived from an error correction code (ECC) parity-check matrix used in the controller" as recited by claim 1. The Applicant further submits that Zeng does not disclose "A method for calculating checksums in a controller inside a memory device" as recited by claim 1. Indeed, Zeng does not disclose "checksums."
The Abstract of Zeng states that it is directed to
A data processing method based on a quasi-cyclic LDPC includes: when a size of service data is less than a magnitude of information bit of the quasi-cyclic LDPC, calculating a difference value between the magnitude of the information bit of the quasi-cyclic LDPC and the size of the service data, and filling the service data with the same amount of known data as the difference value (S103); coding the filled service data to obtain redundancy check data corresponding to the service data (S 104); and sending the service data and the redundancy check data to a corresponding physical location redundancy check data to a corresponding physical location in the storage unit (S 105). It ensures that when a code length of the quasi-cyclic LDPC is constant, the code length ideally adapts to internal space of the storage unit, and the quasi cyclic LDPC has a relatively high error correction capability, thereby improving reliability and service life of the storage unit.
Paragraph 25 of Zeng has to be read in this context. Thus, when Zeng at paragraph 25 states "converting the initial parity-check matrix into a new parity-check matrix according to a preset condition," the reference therein is to adapting the initial parity-check matrix into a code length that matches the internal space of the storage unit. Indeed, paragraphs 95-97 of Zeng further describes converting as deleting rows based on a "preset quantity [that] is a difference value between a magnitude of a check bit of the quasi-cyclic LDPC and a redundancy check space size given by an organizational structure of the storage unit. The Applicant respectfully submits that a person of skill in the art would not conflate this process that uses a redundancy check with a checksum, which is used in LDPC decoding to check to see if all errors have been removed from a codeword containing user data or bit data (see, for example, paragraph 30 of Applicant's originally filed specification "the checksum representing the number of nonzero elements in the syndrome vector is 0"). A redundancy check as described in Zeng cannot be reasonably construed as corresponding to, suggesting or disclosing checksums as described in claim 1.
Tran fails to cure the deficiencies in Zeng with respect to claim 1. Tran is also silent regarding the cited features of claim 1. The Office Action, at page 3, alleges that Tran teaches "performing a partial checksum calculation using the subset matrix to estimate bit error rate (BER)" as recited by claim 1. In support of this allegation the Examiner cites to paragraph 60 of Tran. Paragraph 60 of Tran describes various decoding algorithms that can be used to estimate a number of bit errors. Neither Tran nor Zeng suggest or disclose the use of checksums, much less a partial checksum calculation. Paragraph 60 of Tran, or any portion of Tran, does not suggest or disclose a partial checksum calculation or a subset matrix, much less "performing a partial checksum calculation using the subset matrix to estimate bit error rate (BER)" as recited by claim 1.
Additionally, while page 3 of the Office Action asserts that it would have been obvious to modify Zeng in view of Tran to have quality data communications, the Office Action has not shown why such modification would be advantageous or desired. As set forth in MPEP 2141, "[t]he key to supporting any rejection under 35 U.S.C. 103 is the clear articulation of the reason(s) why the claimed invention would have been obvious." Here, the Office Action has not clearly articulated reasons for modifying Zeng. For example, the Office Action does not explain whether the partial checksum calculation would likely be utilized in Zeng or how benefits of any such utility of the proposed modification in Zeng, which is directed towards a redundancy check process, outweigh the added complexity or costs in circuitry that would result from such proposed modification. Therefore, it is respectfully submitted that the Office Action fails to establish a prima facie case of obviousness.
For at least the foregoing reasons, it is respectfully submitted that a prima facie case of obviousness has not been established under 35 U.S.C. § 103 with respect to independent claim 1 and its dependent claims. Khayat, cited with respect to claims 8 and 11 and described herein below with respect to claim 22, does not remedy the deficiencies in Zeng and Tran. Accordingly, the Examiner is respectfully requested to withdraw the rejection of independent claim 1 and its dependent claims and to allow these claims.
Claims 12-22
Independent claims 12 and 22 each recite features similar to those discussed above for
claim 1. Thus, for at least the same reasons set forth earlier with respect to claim 1, the proposed combination of Zeng and Tran fails to teach all of the features of independent claims 12 and 22. Khayat, which is further cited with respect to claim 22 as disclosing "A NAND memory device comprising: a NAND storage; and a system on chip processor configured to process data exchanged between a host and the NAND storage" (Office Action, page 11), does not remedy the above described deficiencies in Zeng and Tran. The features of Khayat and the remainder of Khayat's disclosure fail to teach or suggest the above-discussed features of claim 1.
Accordingly, it is respectfully submitted that a primafacie case of obviousness has not been established under 35 U.S.C. § 103 with respect to independent claims 12 and 22 and the dependent claims (claims 13 to 21) of independent claim 12. The Examiner is respectfully requested to withdraw the rejection of independent claims 12 and 22 and the dependent claims of independent claim 12 and to allow these claims.
The Examiner disagrees Zeng teach and suggest "selecting a subset matrix derived from an error correction code (ECC) parity-check matrix used in the controller." (Zeng: 0024-0025 & 0072, constructing an initial parity-check matrix of the quasi-cyclic LDPC; converting the initial parity-check matrix into a new parity-check matrix according to a preset condition; The matrix H may be obtained by expanding an M.sub.b×N.sub.b basic matrix H.sub.b)
The Examiner disagrees Zeng does not explicitly teach “calculating checksums in a controller” but does suggest it as the C in the given formula stands for check, is a sum value, and used to validate the service data space. (Zeng: 0003 & 0017, Each time reading the service data, the controller uses a corresponding ECC to perform error checking and correction on the data, so as to ensure as far as possible that the service data returned to the upper-layer service is accurate and valid. Calculating a code length of the quasi-cyclic LDPC according to a formula where L indicates the code length of the quasi-cyclic LDPC, C indicates a sum value of the size of the service data space in the storage unit and a redundancy check space size in the storage unit, z indicates a magnitude of a circulant matrix of the quasi-cyclic LDPC, and ┌ ┐ indicates round-up.)
The Examiner agrees Tran does not cure the deficiencies in Zeng regarding "the checksum representing the number of nonzero elements in the syndrome vector is 0" and "performing a partial checksum calculation using the subset matrix to estimate bit error rate (BER)."
The Examiner disagrees Khayat does remedy the deficiencies in Zeng in view of Tran as it teaches error handling, bit error rate, and checksums. (Khayat: 0049 & 0083, In some embodiments, the controller 115 (e.g., processing device) includes an error-correcting code (ECC) encoder/decoder 111. The ECC encoder/decoder 111 can perform ECC encoding for data written to the memory devices; Example ECC processes can include parity checks, Hamming codes, checksums, cyclic redundancy checks (CRCs), cryptographic hashes, block codes, convolutional codes, turbo codes, low-density parity check (LDPC), etc. The data integrity check can verify that the data stored at memory cells does not include any errors, or that the number of errors are below a predetermined threshold. During a scan operation, the processing logic identifies one or more data integrity metrics, such as the bit error count (BEC) or the raw bit error rate (RBER), representing a number of bit errors per unit of time that the data stored at the data block experiences.)
The prior art of Zeng, Tran, and Khayat don’t teach the claimed invention individually. However, in combination with one another, one skilled in the art could conclude the claimed invention. The previous prior art rejection is maintained.
Claims 2 – 11 which depend from claim 1, have been considered and rejected.
Claims 13 – 21 which depend from claim 12, have been considered and rejected.
Claim 22 which corresponds to claim 12 has been considered and rejected.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 – 22 are rejected under 35 U.S.C. 103 as being unpatentable over Zeng (US 2017/ 0302294 A1) in view of Tran (US 2023/0386543 A1) in view of Khayat (US 2024/0054046 A1).
In regards to claim 1, Zeng teaches:
A method for calculating checksums in a controller inside a memory device, comprising (0017, calculating a code length of the quasi-cyclic LDPC according to a formula where L indicates the code length of the quasi-cyclic LDPC, C indicates a sum value of the size of the service data space in the storage unit and a redundancy check space size in the storage unit, z indicates a magnitude of a circulant matrix of the quasi-cyclic LDPC): selecting a subset matrix derived from an error correction code (ECC) parity-check matrix used in the controller (0025, converting the initial parity-check matrix into a new parity-check matrix according to a preset condition);
Zeng fails to teach:
and performing a partial checksum calculation using the subset matrix to estimate bit error rate (BER).
However, Tran teaches:
and performing a partial checksum calculation using the subset matrix to estimate bit error rate (BER) (0060, In an embodiment, the ECC engine 269 calculates the syndrome of the codeword in order to estimate the number of bit errors in the codeword).
It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to modify the method of Zeng which teaches A method for calculating checksums in a controller with the teaching of Tran which teaches calculation using the subset matrix to estimate bit error rate in order to have quality data communications (Tran: 0060, decoding a codeword provided that there are no more than a certain number of bits in error in the codeword).
In regards to claim 2, Zeng in view of Tran teaches the method of claim 1.
Zeng fails to teach:
performing the partial checksum calculation utilizing a gate-count efficient syndrome calculator module which resides close to the memory device where actual data is stored.
However, Tran teaches:
performing the partial checksum calculation utilizing a gate-count efficient syndrome calculator module which resides close to the memory device where actual data is stored (0060, In an embodiment, the ECC engine 269 calculates the syndrome of the codeword in order to estimate the number of bit errors in the codeword).
It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to modify the method of Zeng which teaches A method for calculating checksums in a controller with the teaching of Tran which teaches checksum calculation utilizing a gate-count efficient syndrome calculator in order to have quality data communications (Tran: 0060, decoding a codeword provided that there are no more than a certain number of bits in error in the codeword).
In regards to claim 3, Zeng in view of Tran teaches the method of claim 1.
Zeng teaches:
wherein the performing the partial checksum calculation comprises utilizing quasi-cyclic codes comprising circulant layers selected from the ECC parity-check matrix, each circulant layer comprising a group of check nodes, thereby reducing a gate count for the gate-count efficient syndrome calculator module (0005, the LDPC based on the quasi-cyclic structure is not designed by using an integral multiple of a Byte, but designed by using an integral multiple of a magnitude of a circulant matrix).
In regards to claim 4, Zeng in view of Tran teaches the method of claim 1.
Zeng teaches:
wherein the subset matrix has fewer check nodes than the ECC parity-check matrix (0025, converting the initial parity-check matrix into a new parity-check matrix according to a preset condition);
In regards to claim 5, Zeng in view of Tran teaches the method of claim 4.
Zeng teaches:
wherein the ECC parity-check matrix comprises m check nodes and the subset matrix has a reduced number of check nodes ranging from m/2 to m/8 (0025, converting the initial parity-check matrix into a new parity-check matrix according to a preset condition).
In regards to claim 6, Zeng in view of Tran teaches the method of claim 1.
Zeng teaches:
wherein the partial checksum calculation is calculated using a punctured set of parity bits (0006, A puncturing operation is performed on check bits of the LDPC based on the quasi-cyclic structure).
In regards to claim 7, Zeng in view of Tran teaches the method of claim 6.
Zeng teaches:
wherein the performing the partial checksum calculation selects circulant layers that do not have nonzero elements corresponding to punctured parity bits (0006, z indicates a magnitude of a circulant matrix of the quasi-cyclic LDPC).
In regards to claim 8, Zeng in view of Tran teaches the method of claim 7.
Zeng in view of Tran fails to teach:
wherein the performing the partial checksum calculation comprises calculating checksums by counting non-zero syndrome bits for columns in the circulant layers.
However, Khayat teaches:
wherein the performing the partial checksum calculation comprises calculating checksums by counting non-zero syndrome bits for columns in the circulant layers (0083, The processing logic can count a number of flipped bits between the decoded code word and the raw code word, with a ratio of the number of flipped bits to the total number of bits in the code word representing the RBER).
It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to modify the method of Zeng which teaches A method for calculating checksums in a controller with the teaching of Khayat which teaches counting non-zero syndrome bits for columns in the circulant layers in order determine data integrity (Khayat: 0083, The data integrity check can verify that the data stored at memory cells does not include any errors, or that the number of errors are below a predetermined threshold. During a scan operation, the processing logic identifies one or more data integrity metrics, such as the bit error count (BEC) or the raw bit error rate (RBER), representing a number of bit errors per unit of time that the data stored at the data block experiences).
In regards to claim 9, Zeng in view of Tran teaches the method of claim 7.
Zeng fails to teach:
wherein the performing the partial checksum calculation comprises providing the checksum calculator with code generation constraints identifying which entries of the ECC parity-check matrix are used when more than one circulant layer is used.
However, Tran teaches:
wherein the performing the partial checksum calculation comprises providing the checksum calculator with code generation constraints identifying which entries of the ECC parity-check matrix are used when more than one circulant layer is used (0055, System control logic 260 includes storage 266, which may be used to store parameters for operating the memory structure 202).
It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to modify the method of Zeng which teaches A method for calculating checksums in a controller with the teaching of Tran which teaches calculation using the subset matrix to estimate bit error rate in order to have quality data communications (Tran: 0060, decoding a codeword provided that there are no more than a certain number of bits in error in the codeword).
In regards to claim 10, Zeng in view of Tran teaches the method of claim 1.
Zeng teaches:
wherein, prior to the performing the partial checksum calculation, converting a shift value, representing bit shifts between different circulant layers, to zero for all nonzero circulant layers (0071, circulant matrix, which may be specifically a unit cyclic shift matrix or an all-zero matrix).
In regards to claim 11, Zeng in view of Tran teaches the method of claim 1.
Zeng in view of Tran fails to teach:
wherein performing the partial checksum calculation comprises calculating checksums on scrambled-encoded data read from a buffer, and the scrambled-encoded data has information bits of the codeword data randomized.
However, Khayat teaches:
wherein performing the partial checksum calculation comprises calculating checksums on scrambled-encoded data read from a buffer, and the scrambled-encoded data has information bits of the codeword data randomized (0019 & 0049, The SDC is a memory element accessible to the host system and is used as a data read/write buffer. The ECC decoding can be performed to decode an ECC codeword).
It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to modify the method of Zeng which teaches A method for calculating checksums in a controller with the teaching of Khayat which teaches scrambled-encoded data read from a buffer of the storage of the memory system and randomized bits in order ensure data integrity (Khayat: 0083, The data integrity check can verify that the data stored at memory cells does not include any errors, or that the number of errors are below a predetermined threshold).
In regards to claim 12, Zeng teaches:
select a subset matrix from an error correction code (ECC) parity-check matrix used in a controller of the storage, and perform a partial checksum calculation (0025, converting the initial parity-check matrix into a new parity-check matrix according to a preset condition;).
Zeng fails to teach:
A memory system, comprising: a storage; and a checksum calculator in the storage, the checksum calculator including a gate-count efficient syndrome calculator module and configured to; using the subset matrix to estimate bit error rate (BER) utilizing the gate-count efficient syndrome calculator module.
However, Tran teaches:
A memory system, comprising: a storage; and a checksum calculator in the storage, the checksum calculator including a gate-count efficient syndrome calculator module and configured to; using the subset matrix to estimate bit error rate (BER) utilizing the gate-count efficient syndrome calculator module (0060, In an embodiment, the ECC engine 269 calculates the syndrome of the codeword in order to estimate the number of bit errors in the codeword).
It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to modify the method of Zeng which teaches A method for calculating checksums in a controller with the teaching of Tran which teaches syndrome calculation using the subset matrix to estimate bit error rate in order to have quality data communications (Tran: 0060, decoding a codeword provided that there are no more than a certain number of bits in error in the codeword).
In regards to claim 13, Zeng in view of Tran teaches the memory system of claim 12.
Zeng teaches:
wherein the checksum calculator comprises: a first input for receiving codeword data; a second input for receiving information on selecting the subset matrix from the ECC parity-check matrix (0069 & 0025, Each variable of the matrix H is corresponding to a variable vi of the codeword. The LDPC is a systematic code. Therefore, the first six variables (v0 to v5) are corresponding to information bits, and the last three 3 variables (v6 to v8) are corresponding to check bits. converting the initial parity-check matrix into a new parity-check matrix according to a preset condition).
In regards to claim 14, Zeng in view of Tran teaches the memory system of claim 13.
Zeng fails to teach:
wherein the checksum calculator is configured to perform the partial checksum calculation on the codeword data, and the partial checksum calculation estimates the BER in the codeword data.
However, Tran teaches:
wherein the checksum calculator is configured to perform the partial checksum calculation on the codeword data, and the partial checksum calculation estimates the BER in the codeword data (0060, In an embodiment, the ECC engine 269 calculates the syndrome of the codeword in order to estimate the number of bit errors in the codeword).
It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to modify the method of Zeng which teaches A method for calculating checksums in a controller with the teaching of Tran which teaches checksum calculations estimate the BER in the codeword data in order to have quality data communications (Tran: 0060, decoding a codeword provided that there are no more than a certain number of bits in error in the codeword).
In regards to claim 15, Zeng in view of Tran teaches the memory system of claim 14. The claim corresponds to claim 4 as analyzed accordingly.
In regards to claim 16, Zeng in view of Tran teaches the memory system of claim 15. The claim corresponds to claim 5 as analyzed accordingly.
In regards to claim 17, Zeng in view of Tran teaches the memory system of claim 15. The claim corresponds to claim 6 as analyzed accordingly.
In regards to claim 18, Zeng in view of Tran teaches the memory system of claim 12. The claim corresponds to claim 3 as analyzed accordingly.
In regards to claim 19, Zeng in view of Tran teaches the memory system of claim 18. The claim corresponds to claim 8 as analyzed accordingly.
In regards to claim 20, Zeng in view of Tran teaches the memory system of claim 12. The claim corresponds to claim 10 as analyzed accordingly.
In regards to claim 21, Zeng in view of Tran teaches the memory system of claim 12. The claim corresponds to claim 11 as analyzed accordingly.
In regards to claim 22, Zeng teaches:
Zeng fails to teach:
wherein the NAND storage includes therein a checksum calculator including a gate-count efficient syndrome calculator module. and perform a partial checksum calculation using the subset matrix to estimate bit error rate (BER) utilizing the gate-count efficient syndrome calculator module.
However, Tran teaches:
wherein the NAND storage includes therein a checksum calculator including a gate-count efficient syndrome calculator module. and perform a partial checksum calculation using the subset matrix to estimate bit error rate (BER) utilizing the gate-count efficient syndrome calculator module (0060, In an embodiment, the ECC engine 269 calculates the syndrome of the codeword in order to estimate the number of bit errors in the codeword).
It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to modify the method of Zeng which teaches A method for calculating checksums in a controller with the teaching of Tran which teaches checksum calculation utilizing a gate-count efficient syndrome calculator in order to have quality data communications (Tran: 0060, decoding a codeword provided that there are no more than a certain number of bits in error in the codeword).
Zeng in view of Tran fails to teach:
A NAND memory device comprising: a NAND storage; and a system on chip processor configured to process data exchanged between a host and the NAND storage;
However, Khayat teaches:
A NAND memory device comprising: a NAND storage; and a system on chip processor configured to process data exchanged between a host and the NAND storage (0016, A memory sub-system can include high density non-volatile memory devices where retention of data is desired when no power is supplied to the memory device. One example of non-volatile memory devices is a negative-and (NAND) memory device).
It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to modify the method of Zeng which teaches A method for calculating checksums in a controller with the teaching of Khayat which teaches A NAND memory device in order to operate the memory without power (Khayat: 0016, A memory sub-system can include high density non-volatile memory devices where retention of data is desired when no power is supplied to the memory device).
Prior Art Made of Record
The prior art mode of record and not relied upon is considered pertinent to
Applicant’s disclosure:
Jang (US 2024/0184669 A1): An Error correction code (ECC) decoder including an input manager configured to sequentially receive a first read data including a plurality of data units read from a plurality of sectors in a memory cell array of a nonvolatile memory device, by unit of sector, a pre-decoder configured to sequentially receive the first read data and generate a respective syndrome of each of the data units, and a main decoder configured to sequentially perform a first ECC decoding on the first read data based on the respective syndrome.
Conclusion
Applicant's arguments filed 03/02/2026 regarding the prior art rejections of Claims 1 – 22 have been fully considered, but they are not persuasive.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/V.P./Examiner, Art Unit 2111
/GUERRIER MERANT/Primary Examiner, Art Unit 2111 5/22/2026
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