Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Response to Arguments
Applicant’s arguments, see, filed 05/04/26, with respect to the rejection(s) of claim(s) 1-19 under Non-Final Rejection have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Wang et al. (US 9659851 B2) hereinafter Wang.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim (s) 1, 7-10, and 17-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Kawano (US 2005/0221601 A1).
Regarding claim 1, Wang discloses a circuit module (Fig.2) comprising: a substrate (226) ; a stud electrode (226) on a surface of the substrate (226); a molding resin ( 202; made of epoxy resin) on the surface of the substrate and covering a periphery of the stud electrode (202 surrounds the via 226) , the molding resin including: a first main surface (210) adjacent the surface of the substrate; and a second main surface (206) opposed to the first main surface, the molding resin including a recess (see 716 in Fig.8) in the second main surface (see 704;Fig.8) , the recess being located such that an end surface and a side surface of the stud electrode are exposed in the recess from the molding resin (see end surface and side surface of 700 exposed from 702;Fig.8);
Wang is silent with respect to a plating layer on the exposed side surface of the stud electrode.
Kawano discloses a plating layer (133; Fig.3) on the exposed side surface of the stud electrode (131).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use the teachings of Kawano to modify the stud electrode of Wang in order to assist in establishing a strong electrical connection to perform electrical connections.
Regarding claim 2, a modified Wang discloses wherein the plating layer is also on the exposed end surface of the stud electrode (see 133 plated on the end of 131; Fig.1 of Kawano).
Regarding claim 7, a modified Wang discloses wherein a height of the exposed side surface of the stud electrode in a thickness direction of the molding resin is 5% to 30% of a thickness of the molding resin.
It would have been obvious to one of ordinary skill in the art during the effective filing date of the invention to use a stud electrode with a thickness direction of the molding resin is 5% to 30% of a thickness of the molding resin in order to make electrical contact with electrical devices of various sizes, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ233.
Regarding claim 8, a modified Wang discloses wherein a height of the exposed side surface of the stud electrode in a thickness direction of the molding resin is 10% to 25% of a thickness of the molding resin.
It would have been obvious to one of ordinary skill in the art during the effective filing date of the invention to use a stud electrode with a thickness direction of the molding resin is 10% to 25% of a thickness of the molding resin in order to make electrical contact with electrical devices of various sizes, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ233.
Regarding claim 9, a modified Wang discloses wherein a depth of the recess in a thickness direction of the molding resin is 10% to 50% of a thickness of the molding resin.
It would have been obvious to one of ordinary skill in the art during the effective filing date of the invention to use a depth of the recess in a thickness direction of the molding resin to be 10% to 50% of a thickness of the molding resin in order to assist in accommodating excess soldering material, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ233.
Regarding claim 10, a modified Wang discloses wherein a depth of the recess in a thickness direction of the molding resin is 20% to 45% of a thickness of the molding resin.
It would have been obvious to one of ordinary skill in the art during the effective filing date of the invention to use a depth of the recess in a thickness direction of the molding resin to be 20% to 45% of a thickness of the molding resin in order to assist in accommodating excess soldering material, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ233.
Regarding claim 17, a modified Wang discloses wherein an area inside a contour of a bottom surface of the recess of the second main surface as viewed from a direction perpendicular to the second main surface is 0.03 mm2 to 0.30 mm2.
It would have been obvious to one of ordinary skill in the art during the effective filing date of the invention to use an area inside a contour of a bottom surface of the recess of the second main surface as viewed from a direction perpendicular to the second main surface is 0.03 mm2 to 0.30 mm2 in order to assist in accommodating excess soldering material, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ233.
Regarding claim 18, a modified Wang discloses wherein the recess has a tapered shape (see tapered shape of 716).
Regarding claim 19, Wang fails to specifically disclose wherein the plating layer is further disposed on a portion of the side surface of the stud electrode which is covered with the molding resin.
Kawano discloses herein the plating layer is further disposed on a portion of the side surface of the stud electrode which is covered (see 143 covering 131 in Fig.3).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use the teachings of Kawano to modify the stud electrode of Wang in order to assist in establishing a strong electrical connection to perform electrical connections.
Claim (s) 3-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Kawano, as applied to claim 1 and claim 2 above, and further in view of lijima et al. (US 20010008309 A1) hereinafter lijima.
Regarding claim 3-4, Wang fails to specifically disclose wherein the exposed end
surface of the stud electrode is located on a same plane as the second main surface of the molding resin.
lijima discloses wherein the exposed end surface of the stud electrode (see top surface of 208;
Fig.4) is located on a same plane as the second main surface of the molding resin (see top surface of 201; Fig.4).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use the teachings of lijima to modify the device of Wang in order to accommodate various electronic devices with different under bump mentalization dimensions.
Regarding claim 5-6, Wang fails to specifically disclose wherein the exposed end surface of the stud electrode is located closer to the substrate as compared to the second main surface of the molding resin.
lijima discloses wherein the exposed end surface of the stud electrode (see 208a; Fig.7A) is located closer to the substrate (see H1in Fig.7A) as compared to the second main surface of the molding resin (see H2 in Fig.7A).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use the teachings of lijima to modify the device of Wang in order to accommodate various electronic devices with different under bump mentalization dimensions.
Page 7
Claim (s) 11-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Kawano, as applied to claim 1, and further in view of Ishikawa et al. (US 20200219652 A1) hereinafter Ishikawa.
Regarding claim 11 and 14, Wang fails to specifically disclose wherein the stud electrode comprises a porous body.
Ishikawa discloses a stud electrode (see 20 in Fig.2 and Fig.9A) with a porous body (see 20;Fig.9A).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use the teachings of Ishikawa to modify the stud electrode of Wang in order to enhance the longevity of the electrode by preventing cracking.
Regarding claim 12 and 15, Wang fails to specifically disclose wherein the porous body has an internal porosity of 5 vol% to 40 vol%.
However, Ishikawa discloses wherein the porous body (20; Fig.2) has an internal porosity of less than 50% (see [0052]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use wherein the porous body has an internal porosity of 5 vol% to 40 vol% to modify the stud electrode of Wang in order to enhance the longevity of the electrode by preventing cracking since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ233.
Regarding claim 13 and 16, Wang fails to specifically disclose wherein the porous body has an internal porosity of 10 vol% to 35 vol%.
However, Ishikawa discloses wherein the porous body (20; Fig.2) has an internal porosity of less than 50% (see [0052]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use an internal porosity of 10 vol% to 35 vol%. to modify the stud electrode of Wang in order to enhance the longevity of the electrode by preventing cracking since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ233.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PETE LEE whose telephone number is (571) 270-5921. The examiner can normally be reached on Monday-Friday (2nd & 4th Friday Off). If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Timothy Dole can be reached at (571) 272-2229 The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
/PETE T LEE/Primary Examiner, Art Unit 2847
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