DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2-6 and 9-14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 2 recites the limitation "the third end of the second transistor" in lines 1 and 2. There is insufficient antecedent basis for this limitation in the claim.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, 7, and 15 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ito et al. (US 2019/0068129).
In regard to Claim 1:
Ito discloses, in Figure 7, an electronic device, comprising:
a driving amplifier (110), configured to output a radio frequency (RF) signal (RF1);
a power amplifier (112), electrically connected to the driving amplifier (110), comprising an input end (112 input), configured to receive the RF signal through the input end (RF1 connected to 112), and amplify the RF signal;
a power detector (130A), electrically coupled to the input end (112 input), configured to detect an input power of the RF signal (RFin, ¶ 0044), and output a driving voltage according to the input power (¶ 0052); and
a bias circuit (122A), electrically connected to the power amplifier (112) and the power detector (110), configured to output a first driving current (Ibias2) to the power amplifier (112) according to the driving voltage (¶ 0052);
wherein the power amplifier (112) amplifies the power of the RF signal (RF1) from the input power (RFin) to a target power (RFout) according to the first driving current (Ibias2; ¶ 0066).
In regard to Claim 2:
Ito discloses, in Figure 7, the electronic device as claimed in claim 1, wherein the bias circuit comprises:
a first transistor (Q6), having a first end electrically coupled to a first voltage (Q6 base connected to Vcc via Q5 and Q4), a second end electrically coupled to the power amplifier (Q6 collector connected to 112 via Q5 and Q4), and a third end electrically connected to a ground voltage (Q6 emitter connected to ground);
a second transistor (Q4), having a first end electrically connected to the first voltage (Q4 collector connected to Vcc), and a second end electrically coupled to the first end of the first transistor (Q4 base connected to Q6 base via R3); and
a third transistor (Q5), having a first end electrically connected to the third end of the second transistor (Q5 emitter connected to Q4 via R3), a second end electrically connected to the power detector (Q5 collector connected to 130A), and a third end electrically connected to the power amplifier (Q5 base connected to 112 via Q4).
In regard to Claim 7:
Ito discloses, in Figure 7, the electronic device as claimed in claim 1, further comprising: a coupling element (120A), electrically connected between the input end (112 input) and the power detector (130A), configured to couple the RF signal (RFin) to the power detector (130A).
In regard to Claim 15:
Ito discloses, in Figure 7, the electronic device as claimed in claim 1, wherein the driving amplifier (110) amplifies the power of the RF signal from an initial power (RFin) to the input power (RF1, ¶ 0021).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ito et al. (US 2019/0068129), in view of Sukemori (US 2021/0126600).
In regard to Claim 8:
All of the claim limitations have been discussed with respect to Claim 1 above, except for further comprising a second bias circuit, electrically connected to the driving amplifier, configured to output a second driving current to the driving amplifier; wherein the second driving current is less than the first driving current.
Sukemori discloses, in Figure 1, further comprising a second bias circuit (40), electrically connected to the driving amplifier (11), configured to output a second driving current (Q31 output) to the driving amplifier (11); wherein the second driving current (Q31 output) is less than the first driving current (Q21, Q11 outputs; ¶ 0050).
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the second bias circuit taught by Sukemori with the driving amplifier taught by Ito, since all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination yielded nothing more than predictable results to one of ordinary skill in the art. (KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385).
Allowable Subject Matter
Claims 3-6 and 9-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding Claim 3, Ito et al. (US 2019/0068129) discloses a first resistor (R2), electrically connected between the second end of the first transistor (Q6 collector) and the power amplifier (112); a second resistor (R3), electrically connected between the second end of the second transistor (Q4 base) and the first end of the first transistor (Q6 base).
Ito does not disclose a third resistor, electrically connected between the first end of the first transistor and the first voltage; and a fourth resistor, electrically connected between the third end of the third transistor and the ground voltage, and it would not have been obvious to one having ordinary skill in the art to combine any prior art to teach or fairly suggest the features not disclosed by Ito.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Ichitsubo et al. (US 2010/0109778) discloses a broad-band linear amplifier circuit includes a driver amplifier to produce a first amplified radio frequency (RF) signal in a first single RF band in response to a first input RF signal and to produce a second amplified RF signal in a second single RF band in response to a second input RF signal.
Wang (US 10,348,254) discloses a protection circuit for use in an RF active circuit includes a signal strength detecting circuit, a current detecting circuit, a logic circuit, and a switching unit.
Honda et al. (US 2020/0052658) discloses a power amplifier circuit includes an amplifier transistor, a bias circuit that supplies a bias current or voltage to the amplifier transistor, and a resistance element connected between a base of the amplifier transistor and the bias circuit.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to John W Poos whose telephone number is (571)270-5077. The examiner can normally be reached M-Th 8-5.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Han can be reached at 571-272-2078. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JOHN W POOS/Primary Examiner, Art Unit 2843
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