Prosecution Insights
Last updated: July 17, 2026
Application No. 18/680,167

SENSOR PACKAGE AND MANUFACTURING METHOD THEREOF

Non-Final OA §102
Filed
May 31, 2024
Priority
Jun 04, 2015 — RE 10-2015-0079157 +6 more
Examiner
BOATMAN, CASEY PAUL
Art Unit
Tech Center
Assignee
Amkor Technology Singapore Holding Pte. Ltd.
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
1y 5m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
61 granted / 74 resolved
+22.4% vs TC avg
Moderate +12% lift
Without
With
+11.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
23 currently pending
Career history
96
Total Applications
across all art units

Statute-Specific Performance

§103
79.3%
+39.3% vs TC avg
§102
13.6%
-26.4% vs TC avg
§112
6.8%
-33.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 74 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 21-40 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Gozzini (US 20110254108 A1). Regarding Claim 21, Gozzini teaches a sensor device (90, see Fig. 11) comprising: a substrate (92, see [0064]) having a top substrate side, a bottom substrate side, and a lateral substrate side between the top substrate side and the bottom substrate side (shown Fig. 11), the substrate comprising a conductive pattern (98) exposed at the top substrate side (shown Fig. 11); a semiconductor die (94) having a top die side, a bottom die side, and lateral die sides between the top and bottom die sides (shown Fig. 11), wherein the semiconductor die comprises a bond pad (100) on the top die side (shown Fig. 11); a bond wire (102) electrically connecting the bond pad and the conductive pattern (shown Fig. 11); an encapsulating material (104) surrounding the lateral die sides and having a top encapsulant side, a bottom encapsulant side, and a lateral encapsulant side between the top encapsulant side and the bottom encapsulant side (shown Fig. 11); a dielectric layer (DL) (110, a die attach material shown in Fig. 11 and described in [0065]) having a top DL side, a bottom DL side coupled to the top die side, and lateral DL sides between the top DL side and the bottom DL side (shown Fig. 11); and a plate (108) having a top plate side, a bottom plate side coupled to the top DL side, and lateral plate sides between the top plate side and the bottom plate side (shown Fig. 11), wherein the plate is positioned over only a portion of the top die side that is laterally offset from the bond pad (shown Fig. 11). Regarding Claim 22, Gozzini teaches the sensor device of claim 21, wherein the encapsulating material contacts the lateral plate sides (shown Fig. 11). Regarding Claim 23, Gozzini teaches the sensor device of claim 21, wherein the top encapsulant side and the top plate side are coplanar (shown Fig. 11). Regarding Claim 24, Gozzini teaches the sensor device of claim 21, wherein the dielectric layer (DL) comprises a transparent adhesive that adheres the bottom plate side to the top die side (see [0065] and [0043] which describes implementing an optically transparent adhesive to secure an analogous capacitive lens 24). Regarding Claim 25, Gozzini teaches the sensor device of claim 21, wherein the encapsulating material is over the bond pad (shown Fig. 11). Regarding Claim 26, Gozzini teaches the sensor device of claim 21, wherein the lateral encapsulant side and the lateral substrate side are coplanar (shown Fig. 11). Regarding Claim 27, Gozzini teaches the sensor device of claim 21, wherein the plate comprises a glass (see [0017] describing the capacitive lens being a “glass plate”). Regarding Claim 28, Gozzini teaches the sensor device of claim 21, wherein the dielectric layer (DL) is formed of a different material than the encapsulating material (see [0064-0065], wherein an encapsulating material may be a common mold material and the dielectric layer may be a die attach material). Regarding Claim 29, Gozzini teaches the sensor device of claim 21, wherein the encapsulating material covers only a portion of the top die side that is not covered by the plate (shown Fig. 11). Regarding Claim 30, Gozzini teaches a sensor device comprising: a substrate (92) having a top substrate side, a bottom substrate side, and a lateral substrate side between the top substrate side and the bottom substrate side (shown Fig. 11), the substrate comprising a conductive pattern (98) exposed at the top substrate side (shown Fig. 11); a semiconductor die (94) having a top die side, a bottom die side, and lateral die sides between the top and bottom die sides (shown Fig. 11), wherein the semiconductor die comprises a bond pad (100) on the top die side; a bond wire (102) electrically connecting the bond pad and the conductive pattern (shown Fig. 11); an encapsulating material (104) surrounding the lateral die sides and having a top encapsulant side, a bottom encapsulant side, and a lateral encapsulant side between the top encapsulant side and the bottom encapsulant side (shown Fig. 11), wherein the encapsulating material covers a first portion of the top die side (portion corresponding to bond pad 100) having the bond pad (shown Fig. 11); a dielectric layer (DL) (110, a die attach material shown in Fig. 11, see also [0065]) having a top DL side, a bottom DL side coupled to the top die side, and lateral DL sides between the top DL side and the bottom DL side (shown Fig. 11); and a plate (108) having a top plate side, a bottom plate side coupled to the top DL side, and lateral plate sides between the top plate side and the bottom plate side (shown Fig. 11), wherein the plate covers a second portion of the top die side (central portion), different from the first portion of the top die side (shown Fig. 11). Regarding Claim 31, Gozzini teaches the sensor device of claim 30, wherein the encapsulating material contacts the lateral plate sides (shown Fig. 11). Regarding Claim 32, Gozzini teaches the sensor device of claim 30, wherein the top encapsulant side and the top plate side are coplanar (shown Fig. 11). Regarding Claim 33, Gozzini teaches the sensor device of claim 30, wherein the dielectric layer (DL) comprises a transparent adhesive that adheres the bottom plate side to the top die side (see [0065] and [0043] which describes implementing an optically transparent adhesive to secure an analogous capacitive lens 24). Regarding Claim 34, Gozzini teaches the sensor device of claim 30, wherein the lateral encapsulant side and the lateral substrate side are coplanar (shown Fig. 11). Regarding Claim 35, Gozzini teaches a method of manufacturing a sensor device (90, see Fig. 11) comprising: providing a substrate (92, see [0064]) having a top substrate side, a bottom substrate side, and a lateral substrate side between the top substrate side and the bottom substrate side (shown Fig. 11), the substrate comprising a conductive pattern (98) exposed at the top substrate side (shown Fig. 11); providing a semiconductor die (94) having a top die side, a bottom die side, and lateral die sides between the top and bottom die sides (shown Fig. 11), wherein the semiconductor die comprises a bond pad (100) on the top die side (shown Fig. 11); providing a bond wire (102) electrically connecting the bond pad and the conductive pattern (shown Fig. 11); providing an encapsulating material (104) surrounding the lateral die sides and having a top encapsulant side, a bottom encapsulant side, and a lateral encapsulant side between the top encapsulant side and the bottom encapsulant side (shown Fig. 11); providing a dielectric layer (DL) (110, a die attach material shown in Fig. 11 and described in [0065]) having a top DL side, a bottom DL side coupled to the top die side, and lateral DL sides between the top DL side and the bottom DL side (shown Fig. 11); and providing a plate (108) having a top plate side, a bottom plate side coupled to the top DL side, and lateral plate sides between the top plate side and the bottom plate side (shown Fig. 11), wherein the plate is positioned over only a portion of the top die side that is laterally offset from the bond pad (shown Fig. 11). Regarding Claim 36, Gozzini teaches the method of claim 35, wherein the encapsulating material contacts the lateral plate sides (shown Fig. 11). Regarding Claim 37, Gozzini teaches the method of claim 35, wherein the top encapsulant side and the top plate side are coplanar (shown Fig. 11). Regarding Claim 38, Gozzini teaches the method of claim 35, wherein the dielectric layer (DL) comprises a transparent adhesive that adheres the bottom plate side to the top die side (see [0065] and [0043] which describes implementing an optically transparent adhesive to secure an analogous capacitive lens 24). Regarding Claim 39, Gozzini teaches the method of claim 35, wherein the encapsulating material is over the bond pad (shown Fig. 11). Regarding Claim 40, Gozzini teaches the method of claim 35, wherein the lateral encapsulant side and the lateral substrate side are coplanar (shown Fig. 11). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: McElrea (US 20100117224 A1) teaches a sensor device (see Fig. 2) wherein a cover (34) and an encapsulant (30) have top surfaces which are coplanar a substrate has a lateral surface that is coplanar with a lateral surface of the encapsulant. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CASEY PAUL BOATMAN whose telephone number is (703)756-4778. The examiner can normally be reached M-F 7:30 AM - 5:30 PM ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached at (571)270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /C.P.B./Examiner, Art Unit 2893 /Britt Hanley/Supervisory Patent Examiner, Art Unit 2893
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Prosecution Timeline

May 31, 2024
Application Filed
Sep 13, 2024
Response after Non-Final Action
Jun 16, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
94%
With Interview (+11.6%)
3y 6m (~1y 5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 74 resolved cases by this examiner. Grant probability derived from career allowance rate.

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