Office Action Predictor
Last updated: April 15, 2026
Application No. 18/680,887

SYSTEMS AND METHODS FOR MEASURING WAVEFORMS AT DEVICES UNDER TEST

Non-Final OA §102§103
Filed
May 31, 2024
Examiner
RHODES-VIVOUR, TEMILADE S
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Keysight Technologies, INC.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
97%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allow Rate
707 granted / 799 resolved
+20.5% vs TC avg
Moderate +8% lift
Without
With
+8.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
18 currently pending
Career history
817
Total Applications
across all art units

Statute-Specific Performance

§101
1.0%
-39.0% vs TC avg
§103
46.7%
+6.7% vs TC avg
§102
45.0%
+5.0% vs TC avg
§112
6.1%
-33.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 799 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1, 7, 8, 9, 11, 17-19 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Consiglio (US PAT 5,519,327). With respect to claim 1, Consiglio discloses a method comprising: outputting an electrical signal from a signal generator (See Col. 5, line 65-68 of Consiglio) of a measurement instrument (See [100] in figure 3 of Consiglio); measuring a first voltage (See Col. 6, lines 35-38 of Consiglio wherein the examiner interprets the measurement of the “incident waveform” as the “first voltage” being claimed in view of Col 7, lines 42-58 of Consiglio) at an input (See “terminal A” disclosed in Col. 7, lines 42-58 of Consiglio) to an output resistance of the measurement instrument (See Col. 7, lines 42-58 of Consiglio); measuring a second voltage (See Col. 6, lines 35-38 of Consiglio wherein the examiner interprets the measurement of the “reflected waveform” as the “second voltage” being claimed in view of Col 7, lines 42-58 of Consiglio) at an output of the output resistance of the measurement instrument (See Col. 7, lines 42-58 of Consiglio); and determining a test measurement voltage at a device under test (DUT) electrically connected to the measurement instrument (See Col. 5, lines 45-58 of Consiglio) using the first voltage, the second voltage, and a propagation delay of a transmission line electrically connecting the measurement instrument to the DUT (See Col. 7, lines 42-58 of Consiglio which discloses the use of the first voltage, second voltage and propagation delay which is represented by this portion of the represented as the measurements being a function of time which further is a function of the transmission line impedance). With respect to claim 7, Consiglio discloses the method of claim 1, comprising capturing first and second waveforms for the first and second voltages for a period of time greater than twice the propagation delay of the transmission line (See Col. 7, lines 11-32 of Consiglio in view of the timing diagram shown in figure 4 of Consiglio). With respect to claim 8, Consiglio discloses the method of claim 1, comprising measuring the propagation delay of the transmission line using an oscilloscope (See Col. 6, lines 10-38 of Consiglio). With respect to claim 9, Consiglio discloses the method of claim 1, wherein measuring the first voltage or the second voltage or both comprises using an oscilloscope (See Col. 6, lines 10-38 of Consiglio). With respect to claim 11, Consiglio discloses a system comprising: a measurement instrument comprising a signal generator configured for outputting an electrical signal (See Col. 5, line 65-68 of Consiglio); and a controller (See Col. 6, lines 61-67 of Consiglio) configured for: measuring a first voltage (See Col. 6, lines 35-38 of Consiglio wherein the examiner interprets the measurement of the “incident waveform” as the “first voltage” being claimed in view of Col 7, lines 42-58 of Consiglio) at an input (See “terminal A” disclosed in Col. 7, lines 42-58 of Consiglio) to an output resistance of the measurement instrument (See Col. 7, lines 42-58 of Consiglio); measuring a second voltage (See Col. 6, lines 35-38 of Consiglio wherein the examiner interprets the measurement of the “reflected waveform” as the “second voltage” being claimed in view of Col 7, lines 42-58 of Consiglio) at an output of the output resistance of the measurement instrument (See Col. 7, lines 42-58 of Consiglio); and determining a test measurement voltage at a device under test (DUT) electrically connected to the measurement instrument (See Col. 5, lines 45-58 of Consiglio) using the first voltage, the second voltage, and a propagation delay of a transmission line electrically connecting the measurement instrument to the DUT (See Col. 7, lines 42-58 of Consiglio which discloses the use of the first voltage, second voltage and propagation delay which is represented by this portion of the represented as the measurements being a function of time which further is a function of the transmission line impedance). With respect to claim 17, Consiglio discloses the system of claim 11, wherein the controller is configured for capturing first and second waveforms for the first and second voltages for a period of time greater than twice the propagation delay of the transmission line (See Col. 7, lines 11-32 of Consiglio in view of the timing diagram shown in figure 4 of Consiglio). With respect to claim 18, Consiglio discloses the system of claim 11, wherein the controller is configured for measuring the propagation delay of the transmission line using an oscilloscope (See Col. 6, lines 10-38 of Consiglio). With respect to claim 19, Consiglio discloses the system of claim 11, wherein measuring the first voltage or the second voltage or both comprises using an oscilloscope (See Col. 6, lines 10-38 of Consiglio). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 2 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Consiglio as applied to claim 1 above, and further in view of Goeke (US PAT 8,410,804). With respect to claim 2, Consiglio discloses the method of claim 1, wherein the DUT is a semiconductor device on a semiconductor wafer (See Col. 6, lines 39-51 of Consiglio), but fails to disclose wherein the transmission line includes a coaxial cable. However, Goeke does disclose wherein the transmission line includes a coaxial cable (See the abstract of Goeke). Furthermore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the method disclosed by Consiglio to include the method step disclosed by Goeke because doing so enables efficient, low loss transmission of signals for accurate impedance detection. With respect to claim 12, Consiglio discloses the system of claim 11, wherein the DUT is a semiconductor device on a semiconductor wafer (See Col. 6, lines 39-51 of Consiglio), but fails to disclose wherein the transmission line includes a coaxial cable. However, Goeke does disclose wherein the transmission line includes a coaxial cable (See the abstract of Goeke). Furthermore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the device disclosed by Consiglio to include the feature disclosed by Goeke because doing so enables efficient, low loss transmission of signals for accurate impedance detection. Claim(s) 3 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Consiglio as applied to claim 1 above, and further in view of Jan et al. (US PUB 2021/0325460), hereinafter Jan. With respect to claim 3, Consiglio discloses the method of claim 1, but fails to disclose wherein measuring the first voltage comprises using a first analog-to-digital converter (ADC) and wherein measuring the second voltage comprises using a second analog-to-digital converter. However, Jan does disclose wherein measuring the first voltage comprises using a first analog-to-digital converter (ADC) (See claim 16 of Jan) and wherein measuring the second voltage comprises using a second analog-to-digital converter (See claim 16 of Jan). Furthermore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the method disclosed by Consiglio to include the method step disclosed by Jan because doing so helps to maximize the signal-to-noise ratio. With respect to claim 13, Consiglio discloses the system of claim 11, but fails to disclose wherein measuring the first voltage comprises using a first analog-to-digital converter (ADC) and wherein measuring the second voltage comprises using a second analog-to-digital converter. However, Jan does disclose wherein measuring the first voltage comprises using a first analog-to-digital converter (ADC) and wherein measuring the second voltage comprises using a second analog-to-digital converter (See claim 16 of Jan). Furthermore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the device disclosed by Consiglio to include the features disclosed by Jan because doing so helps to maximize the signal-to-noise ratio. Allowable Subject Matter Claims 4, 5 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: With respect to claim 4, the prior art of record neither shows nor suggests the combination of method steps wherein measuring the first voltage comprises: closing a first switch between an analog-to-digital converter (ADC) and the input to the output resistance; opening a second switch between the ADC and the output to the output resistance; and measuring the first voltage using the ADC. Claim 5 depends from objected to claim 4 and is therefore also objected to. With respect to claim 6, the prior art of record neither shows nor suggests the combination of method steps comprising repeatedly outputting the electrical signal, adding an increasing time delay to each output of the electrical signal, and summing a plurality of waveforms captured at each time delay to determine a waveform at the DUT having a shorter sampling period than a configured sampling period of an analog-to-digital (ADC) converter used for measuring the first voltage and the second voltage. With respect to claim 10, the prior art of record neither shows nor suggests the combination of method steps comprising measuring a differential signal at the DUT by measuring a third voltage at a second input to a second output resistance and a further voltage at a second output to a second output resistance and using a second propagation delay of a second transmission line. With respect to claim 14, the prior art of record neither shows nor suggests the combination of structural elements wherein measuring the first voltage comprises: closing a first switch between an analog-to-digital converter (ADC) and the input to the output resistance; opening a second switch between the ADC and the output to the output resistance; and measuring the first voltage using the ADC. Claim 15 depends from objected to claim 14 and is therefore also objected to. With respect to claim 16, the prior art of record neither shows nor suggests the combination of structural elements wherein the controller is configured for repeatedly outputting the electrical signal, adding an increasing time delay to each output of the electrical signal, and summing a plurality of waveforms captured at each time delay to determine a waveform at the DUT having a shorter sampling period than a configured sampling period of an analog-to-digital (ADC) converter used for measuring the first voltage and the second voltage. With respect to claim 20, the prior art of record neither shows nor suggests the combination of structural elements wherein the controller is configured for measuring a differential signal at the DUT by measuring a third voltage at a second input to a second output resistance and a further voltage at a second output to a second output resistance and using a second propagation delay of a second transmission line. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to TEMILADE S RHODES-VIVOUR whose telephone number is (571)270-5814. The examiner can normally be reached M-F (flex schedule). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Phan can be reached at 571-272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TEMILADE S RHODES-VIVOUR/Examiner, Art Unit 2858 /HUY Q PHAN/Supervisory Patent Examiner, Art Unit 2858
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Prosecution Timeline

May 31, 2024
Application Filed
Dec 23, 2025
Non-Final Rejection — §102, §103
Mar 31, 2026
Response Filed

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
97%
With Interview (+8.2%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 799 resolved cases by this examiner. Grant probability derived from career allow rate.

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