DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
New corrected drawings in compliance with 37 CFR 1.121(d) are required in this application because in figure 2, “CMD Encoder 310)” should be “CMD Decoder (310)”. Applicant is advised to employ the services of a competent patent draftsperson outside the Office, as the U.S. Patent and Trademark Office no longer prepares new drawings. The corrected drawings are required in reply to the Office action to avoid abandonment of the application. The requirement for corrected drawings will not be held in abeyance.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1,4,8-11 are rejected under 35 U.S.C. 103 as being unpatentable over Walker et al (pat# 6,282,682) in view of Pagani (Pat# 8,358,147).
As to claim 1, Walker et al disclose a test circuit configured to receive an inspection command from automatic test equipment (ATE) and test a device under test (DUT "112") as shown in figures 1-3, the test circuit comprising: a plurality of analog inspection circuits (335,336,338,339) electrically connected to the DUT (112) as shown in figure 1 to test an operation thereof; and a digital control circuit (226) configured to control operations of the analog inspection circuits, wherein the digital control circuit and the analog inspection circuits are located apart from each other. It is noted that Walker et al do not teach the test circuit further comprising a probe card, wherein the probe card includes a substrate on which the plurality of analog inspection circuits and the digital control circuit are disposed, the probe card including an analog signal processing area and a digital signal processing area, and the substrate including a first side and a second side, wherein the plurality of analog inspection circuits is located in the analog signal processing area, and the digital control circuit is located in the digital signal processing area, the digital signal processing area being distinct from the analog signal processing area, wherein the analog signal processing area is disposed on the first side, and wherein the digital signal processing area is disposed on the second side, the second side being different from the first side.
Pagani et al teaches that it would have been well-known in the art to provide test circuit (all electronic components) located on a substrate of a probe card (125) as shown in figure 1.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to provide test circuit Walker et al on a probe card as taught by Pagani et al for the purpose of making the test structure more compact and reducing the electrical noises in order to obtain more accurate test result. As soon as the test circuit is disposed on the substrate of the probe card, it would have been obvious that the substrate would include analog signal processing area and a digital signal processing area, and the substrate including a first side and a second side, wherein the plurality of analog inspection circuits is located in the analog signal processing area, and the digital control circuit is located in the digital signal processing area, the digital signal processing area being distinct from the analog signal processing area, wherein the analog signal processing area is disposed on the first side, and wherein the digital signal processing area is disposed on the second side, the second side being different from the first side. Furthermore, the locations of plurality of analog inspection circuits and the digital control circuit would not change the function of the test circuit, therefore their orientations are also considered as an obvious rearrangement of parts (see In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950).
As to claim 4, Walker et al in view of Pagani et al disclose a test circuit as mentioned in claim 1. It appears that the digital control circuit (226_ controls at least some of
the plurality of analog inspection circuits (335,336,338,339).
As to claim 9, Walker et al in view of Pagani et al disclose a test circuit as mentioned in claim 1 but do not explicitly mention about the analog signal processing area is distributed and located within the first side of the substrate of the probe card. However, this orientation is considered as an obvious rearrangement of parts since this rearrangement of parts does not changed the operations of the test circuit (see In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950).
As to claim 10, Walker et al in view of Pagani et al disclose a test circuit as mentioned in claim 1, it appears that the analog signal processing area and the digital signal processing area are located in different areas of the substrate
AS to claim 11, Walker et al in view of Pagani et al disclose a test circuit as mentioned in claim 1. It appears that in the device of Walker et al, each of the plurality of analog circuits (335,336,338,339) includes a plurality of channels, each of the plurality of channels being connected to the DUT, and the digital control circuit (226) is configured to individually control the plurality of channels ((335,336,338,339).
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Walker et al in view of Pagani et al as applied to claim 1 above, and further in view of Dastidar et al (Pat# 8,952,713)
As to claim 8, Walker et al in view of Pagani et al disclose a test circuit as mentioned in claim 1 but do not mention about the substrate is a multilayer board.
Dastidar et al teach that it is well-known in the art to have probe card (220) with multilayer substrate.
It would have been obvious for one of ordinary skill in the art to provide the probe card in the device of Walker et al in view of Pagani et al with a multilayer substrate probe card as taught by Dastidar et al for the purpose elongating the probe card lifetime.
Claim Objections
Claim 3 is objected to because of the following informalities:
Claim 3 should depends from claim 2 instead of claim 1 since “the encoded inspection circuit control command” recited in claim 2.
Appropriate correction is required.
Allowable Subject Matter
Claims 2-3 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The prior art does not disclose the digital control circuit comprises: a decoder configured to decode a digital command provided by a controller, an inspection circuit selector configured to select one of the analog inspection circuits to perform inspection according to the decoded digital command, and a command encoder configured to encode and provide an inspection circuit control command to control the analog inspection circuit to perform inspection as recited in claim 2 and in combined with the limitation of claim 1. Claim 3 depend from objected claim 2, it is also objected to.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Wang et al (9,372,227) disclose a probe card with test circuit disposed thereon.
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/VINH P NGUYEN/Primary Examiner, Art Unit 2858