DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Applicant is advised that should Claim 4 be found allowable, Claim 6 will be objected to under 37 CFR 1.75 as being a substantial duplicate thereof. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-4 and 6 rejected under 35 U.S.C. 103 as being unpatentable over Kato et al (PGPub 2017/0186546) in view of Horikoshi et al (JPS5580310A cited in IDS with references to the machine English translation provided herewith).
Regarding Claim 1, Kato teaches a method for manufacturing multilayer ceramic electronic components (Abstract), the method comprising:
cutting a multilayer base (Figs. 8a-c; Fig. 4- step S03) including a plurality of dielectric ceramic bodies and a plurality of internal electrode layers alternately stacked on one another along a cutting line orthogonal to the multilayer base to obtain a plurality of base precursors (Fig. 6- ceramic sheets 101, 102, 103 and internal electrodes 112, 113), each of the plurality of base precursors including a cut side surface on which the plurality of internal electrode layers is exposed (Fig. 8c);
aligning the plurality of base precursors each to have the cut side surface being opened (Fig. 14); and
placing a side green sheet into contact with the air remover applied to the cut side surface and pressing the side green sheet (Figs. 13a and b; [0114]- The side surface P of the multi-layer chip 116 is pressed against the side margin sheet 117s).
Kato does not specify applying an air remover to the cut side surface being opened.
Horikoshi teaches an alternative method of manufacturing multilayer ceramic electronic components [0001] wherein an air remover (water) is applied between laminate layers [0002] in order to avoid delamination between layers [0002].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Kato to include applying an air remover as taught by Horikoshi with reasonable expectation of success to avoid delamination between layers [0002].
Regarding Claim 2, Horikoshi further teaches the air remover is a plasticizer ([0002]- utilizing water as the air remover; Examiner notes water is a plasticizer).
Regarding Claim 3, Kato further teaches the side green sheet is pressed using a press with an elastic member placed between a press punch and a support sheet on which the plurality of base precursors is placed (Figs. 13a and b; [0114]).
Regarding Claim 4, Kato further teaches removing a portion of the side green sheet other than a portion pressed against the cut side surface with a jet stream including dry ice microparticles [0140].
Regarding Claim 6, Kato teaches a method for manufacturing multilayer ceramic electronic components (Abstract), the method comprising:
cutting a multilayer base (Figs. 8a-c; Fig. 4- step S03) including a plurality of dielectric ceramic bodies and a plurality of internal electrode layers alternately stacked on one another along a cutting line orthogonal to the multilayer base to obtain a plurality of base precursors (Fig. 6- ceramic sheets 101, 102, 103 and internal electrodes 112, 113), each of the plurality of base precursors including a cut side surface on which the plurality of internal electrode layers is exposed (Fig. 8c);
aligning the plurality of base precursors each to have the cut side surface being opened (Fig. 14);
placing a side green sheet into contact with the air remover applied to the cut side surface and pressing the side green sheet (Figs. 13a and b; [0114]- The side surface P of the multi-layer chip 116 is pressed against the side margin sheet 117s); and
removing a portion of the side green sheet other than a portion pressed against the cut side surface with a jet stream including dry ice microparticles [0140].
Kato does not specify applying an air remover to the cut side surface being opened.
Horikoshi teaches an alternative method of manufacturing multilayer ceramic electronic components [0001] wherein an air remover (water) is applied between laminate layers [0002] in order to avoid delamination between layers [0002].
Allowable Subject Matter
Claim 5 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The closest prior art to dependent Claim 5 is Kato et al (PGPub 2017/0186546) in view of Horikoshi et al (JPS5580310A cited in IDS) as set forth above. However, the prior art fails to teach or suggest placing a support at a periphery of the aligned plurality of base precursors to support the portion of the side green sheet other than the portion pressed against the cut side surface. Further, there is no teaching or suggestion to modify the combination of Kato and Horikoshi to include an additional support surrounding the periphery of the base precursors. Thus, the prior art does not teach or suggest the claimed invention.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Adrianna Konves whose telephone number is (571)272-3958. The examiner can normally be reached Monday-Friday 8:00-4:00 MST (Arizona).
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Abbas Rashid can be reached at (571) 270-7457. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/A.K./Examiner, Art Unit 1748 1/6/26
/Abbas Rashid/Supervisory Patent Examiner, Art Unit 1748