DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect amended claims 17, 23, 25, 27, 34 and canceled claim 24 and added new claim 36 filed on 3/9/2026 have been considered but they are not persuasive.
However, examiner found some amended limitations are taught by references previous introduced.
In Remark page 12, last paragraph , applicant argued that fails to disclose identifying, by the second processor based on a corresponding drawing instruction for each control in the set of controls, a first-type control, wherein a quality of a graphics primitive corresponding to the first-type control does not meet a preset condition when the graphics primitive of the first-type control is drawn by the second processor. Choi also fails to disclose sending, by the second processor, a first drawing instruction corresponding to the first-type control to the first processor, wherein the first drawing instruction requests the primary chip to perform drawing of the graphics primitive of the first-type control; [and] obtaining, by the second processor, a graphics primitive drawing
result of the primary chip corresponding to the first-type control requested in the first drawing instruction.
The examiner respectfully disagrees with Applicant’s argument. In fact, in paragraph [0010] Choi discloses “generating and outputting, by a first processor, a first image in a first mode, generating and outputting, by a second processor, a second image, in a second mode running at lower power than the first mode” and [0102] “when the electronic device 501 is in an active mode, the first processor 510 operates in a wake-up state. In the active mode, the second processor 520 may maintain the sleep state by blocking power supplied to at least any one of a plurality of function blocks” and [0153] “FIGS. 9B to 9E, a second layer among the plurality of layers, the second layer includes at least any one of an hour image object, a minute image object, and a second image object. The second layer may be kept in a memory of at least any one of a second processor 520” and [0157] “the second layer illustrated in FIG. 9B implements analog watch information objects (or a clock hand) 921 and 922. The analog watch images 921 and 922 may include the image object 922 of at least any one of rotating hour, minute and second hands” Choi teaches identifying, by the second processor 520, in the first type control (the active mode), and corresponding drawing instruction to control a quality of a graphic primitive (e.g., a clock hand 922, Fig. 9B), is maintained in the sleep state which does not meet a preset condition as the wake-up state for rotating the clock hands;
Furthermore, in paragraph [0103], Choi discloses “In the low power display mode, the second processor 520 may alternately operate in the wake-up state and the sleep state. The second processor 520 may periodically switch to the wake-up state and may update image information displayed on the display” and [0102] “when the electronic device 501 is in an active mode, the first processor 510 operates in a wake-up state” and [0153] FIG. 9A, the first layer includes a background image object. The first layer may be kept in a memory in a first processor 510” and [0157],[0158] “FIGS 9D and 9E, The number image objects 941 and 951 may be formed by means of meta data including coordinate information and size information... the first processor 510 may store image data and meta data for being displayed in a low power display mode” Choi teaches sending (switching) by the second processor to the wake-up state (the first-type control in active mode) to the first processor (wake-up state) to perform drawing a background image of a visual object in a first layer e.g., the number image objects 941, 951, Figs 9D, 9E;
Also, in paragraph [0125], Choi discloses “The screen for low power display mode may be generated by blending (or combining) the plurality of layers. For example, upon the low power display mode, a second layer including a watch image is blended on a first layer including a background image” Choi teaches obtaining, by the second processor, the second layer include the graphics primitive drawing result of the first processor, a background image (Figs 9D, 9E) corresponding to the first-type control requested;
Independent claims 28 has been amended similarly to independent claim 17 and is rejected as the explanation above.
The rejection of claims 17-22 under 35 U.S.C. §112 (b) is withdrawn in of Applicant’s amendment in claims 17.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 17-20 and 28-31 are rejected under 35 U.S.C. 102 (a) (1) as being unpatentable by Choi et al. (U.S. 2024/0169626 A1)
Regarding Claims 1-16 (Cancelled).
Regarding Claim 17 (Currently amended), Choi discloses a method, applied to an electronic device (Choi, [0206] “An operation method of an electronic device”, wherein the electronic device comprises a primary chip, a secondary chip, and a display (Choi, Figs. 1, 2, [0061] “the display module 160 may include a display 210, the image information may be received from the processor 120 (e.g., the main processor 121 (e.g., an application processor) or the auxiliary processor 123 (e.g., the graphic processing device) operated independently from the function of the main processor 121)” Choi teaches the electronic device include a primary chip (the main processor 120), a secondary chip (the auxiliary processor 123), a display 120), the primary chip is configured to run a first operating system, the secondary chip is configured to run a second operating system (Choi, [0009] “The electronic device includes a display” and [0097] “FIG. 6A, the electronic device 501 may include a plurality of processors 510, 520, and 530. The second 520 may be formed with the third processor 530 as one package” and [0104] “the first processor 510 may execute the first software module 410 including a platform 512, a first operating system 513” and [0132] “a second operating system 523 included in the second processor 520” Choi the primary chip (the first processor 510) runs on a first OS (Fig. 6A) and the secondary chip (the second processor 520) runs on a second OS , and the graphics primitive sharing method comprises:
when the secondary chip performs drawing of interface content, obtaining, by the secondary chip, a set of controls corresponding to the interface content, wherein the set of controls comprise at least one control (Choi, Fig. 6A, [0100] “The mailbox 550 may be an interface used for communication between the first processor 510, the second interface 520” and [0128] “The second processor 520 may include a second IPC driver 5243, a meta parser 522” and [0123] “the second IPC driver 5243 receives an instruction to start/stop the low power display mode and meta data. The second IPC driver 5243 may perform a command of the received instruction and may deliver the meta data to the meta parser 522” and [0124] “The meta parser 522 may extract draw information necessary for the low power display mode from the received meta data” Choi teaches the second processor 520 (second chip) performs drawing of interface content (mail box 550) include a set of control (start/stop) for low power display mode;
identifying, by the secondary chip based on a corresponding drawing instruction for each control in the set of controls, a first-type control that does not meet a preset condition wherein a quality of a graphics primitive corresponding to the first-type control does not meet a present condition, when the graphics primitive of the first-type control is drawn by the secondary chip (Choi, [0010] “generating and outputting, by a first processor, a first image in a first mode, generating and outputting, by a second processor, a second image, in a second mode running at lower power than the first mode” and [0102] “when the electronic device 501 is in an active mode, the first processor 510 operates in a wake-up state. In the active mode, the second processor 520 may maintain the sleep state by blocking power supplied to at least any one of a plurality of function blocks” and [0153] “FIGS. 9B to 9E, a second layer among the plurality of layers, the second layer includes at least any one of an hour image object, a minute image object, and a second image object. The second layer may be kept in a memory of at least any one of a second processor 520” and [0157] “the second layer illustrated in FIG. 9B implements analog watch information objects (or a clock hand) 921 and 922. The analog watch images 921 and 922 may include the image object 922 of at least any one of rotating hour, minute and second hands” Choi teaches identifying, by the second processor 520, in the first type control (the active mode), and corresponding drawing instruction to control a quality of a graphic primitive (e.g., a clock hand 922, Fig. 9B), is maintained in the sleep state which does not meet a preset condition as the wake-up state for rotating the clock hands;
sending, by the secondary chip, a first drawing instruction corresponding to the first-type control to the primary chip, wherein the first drawing instruction requests the primacy chip to perform drawing of the graphics primitive of the first-type control (Choi, [0103] “In the low power display mode, the second processor 520 may alternately operate in the wake-up state and the sleep state. The second processor 520 may periodically switch to the wake-up state and may update image information displayed on the display” and [0102] “when the electronic device 501 is in an active mode, the first processor 510 operates in a wake-up state” and [0153] FIG. 9A, the first layer includes a background image object. The first layer may be kept in a memory in a first processor 510” and [0157],[0158] “FIGS 9D and 9E, The number image objects 941 and 951 may be formed by means of meta data including coordinate information and size information... the first processor 510 may store image data and meta data for being displayed in a low power display mode” Choi teaches sending (switching) by the second processor to the wake-up state (the first-type control in active mode) to the first processor (wake-up state) to perform drawing a background image of a visual object in a first layer e.g., the number image objects 941, 951, Figs 9D, 9E;
obtaining, by the secondary chip, a graphics primitive drawing result of the primary chip corresponding to the first-type control requested in the first drawing instruction (Choi, [0125] “The screen for low power display mode may be generated by blending (or combining) the plurality of layers. For example, upon the low power display mode, a second layer including a watch image is blended on a first layer including a background image” Choi teaches obtaining, by the second processor, the second layer include the graphics primitive drawing result of the first processor, a background image (Figs 9D, 9E) corresponding to the first-type control requested; and
compositing, by the secondary chip, a local graphics primitive drawing result and the graphics primitive drawing result of the primary chip to obtain a composited result, and sending the composited result to the display, wherein the local graphics primitive drawing result is obtained by the secondary chip executing the corresponding drawing instruction for each control in the set of controls to perform drawing (Choi, [0125] “the data composer 521 may store a screen for low power display mode based on the draw information corresponding to the meta data extracted from the meta parser 522. The screen for low power display mode may be generated by blending (or combining) the plurality of layers , upon the low power display mode, a second layer including a watch image is blended on a first layer including a background image” and [0153] “ FIGS. 9A to 9E, an electronic device (e.g., an electronic device 501 of FIG. 5) may blend a plurality of layers upon a low power display mode to implement a screen. For example, the first layer includes a background image object. The first layer may be kept in a memory in a first processor 510. As illustrated in FIGS. 9B to 9E, a second layer among the plurality of layers may include image information capable of being frequently changed over time, the second layer includes at least any one of an hour image object, a minute image object, and a second image object. The second layer may be kept in a memory of at least any one of a second processor 520 and a sensor hub” Choi teaches compositing (blending), by the second processor, the local graphic primitive drawing results (an hour image object, a minute image object) in the second layer and the graphic primitive result (a background image object) from the first processor in the first layer.
Regarding Claim 18, Choi discloses the method according to claim 17, further comprising:
invoking, by the secondary chip, a user interface (UI) drawing framework to obtain the corresponding drawing instruction for each control in the set of controls (Choi, Fig. 1, [0048] “The interface 177 may support one or more specified protocols to be used for the electronic device 101” and [0061] “FIG. 2, the auxiliary processor 123 (e.g., the graphic processing device) operated independently from the function of the main processor 121). The DDI 230 may make communication with a touch circuit 250 or the sensor module 176 through the interface module 231, in unit of a frame. The image processing module 235 may perform pretreatment or post-treatment (e.g., adjusting a resolution, a brightness, or a size), with respect to” Choi teaches the secondary processor (the auxiliary processor 123 as a graphic processing device), through the interface module 231, invoke to the image processing module 235 to perform drawing instruction for controls e.g., adjusting a resolution, a brightness, or a size.
Regarding Claim 19, Choi discloses the method according to claim 17, wherein sending, by the secondary chip, the first drawing instruction corresponding to the first-type control to the primary chip to perform drawing comprises:
marking, by the secondary chip, a control that does not meet the preset condition as the first-type control (Choi, [0010] “generating and outputting, by a first processor, a first image in a first mode, generating and outputting, by a second processor, a second image, in a second mode running at lower power than the first mode” and [0102] “when the electronic device 501 is in an active mode, the first processor 510 operates in a wake-up state. In the active mode, the second processor 520 may maintain the sleep state by blocking power supplied to at least any one of a plurality of function blocks” Choi teaches marking, by the second processor, corresponding drawing instruction e.g., design instruction sleep state does not meet a preset condition, the first mode, when the electronic device is in an active mode; and
sending, by the secondary chip, the first drawing instruction corresponding to the first- type control to the primary chip to perform drawing (Choi, [0103] “In the low power display mode, the second processor 520 may alternately operate in the wake-up state and the sleep state. The second processor 520 may periodically switch to the wake-up state and may update image information displayed on the display” and [0163] “FIG. 10A is a drawing illustrating a background image included in a first layer of an electronic device and a visual object” Choi teaches sending (switching) by the second processor to the wake-up state (the first-type control in active mode) to the first processor (wake-up state) to perform drawing a background image of a visual object in a first layer.
Regarding Claim 20, Choi discloses the method according to claim 19, wherein the electronic device further comprises a memory, the memory is configured to store the graphics primitive drawing result of the primary chip, and obtaining, by the secondary chip, the graphics primitive drawing result of the primary chip comprises:
reading, by the secondary chip, the graphics primitive drawing result of the primary chip from the memory (Choi, [0125] “the data composer 521 may store a screen for low power display mode based on the draw information corresponding to the meta data extracted from the meta parser 522. The screen for low power display mode may be generated by blending (or combining) the plurality of layers. For example, upon the low power display mode, a second layer including a watch image is blended on a first layer including a background image” Choi teaches reading (extracting drawing information), by the second processor, the second layer include the graphics primitive drawing result of the first processor, a background image.
Regarding Claim 28 (Currently amended), Choi discloses an electronic device (Choi, [0038] “FIG. 1, an electronic device 101”), comprising:
a primary chip configured to run a first operating system;
a secondary chip configured to run a second operating system;
a memory; and
a display, wherein the secondary chip is further configured to:
obtain a set of controls corresponding to interface content when performing drawing of the interface content;
identify, based on a corresponding drawing instruction for each control in the set of controls, a first-type control that does not meet a preset condition wherein a quality of a graphics primitive corresponding to the first-type control does not meet a present condition when the graphics primitive of the first-type control is drawn by the secondary chip;
send a first drawing instruction corresponding to the first-type control to the primary chip, wherein the first drawing instruction requests the primary chip to perform drawing of the graphics primitive of the first-type control;
obtain a graphics primitive drawing result of the primary chip corresponding to the first-type control requested in the first drawing instruction;
composite a local graphics primitive drawing result and the graphics primitive drawing result of the primary chip to obtain a composited result, and send a composited result to the display, wherein the local graphics primitive drawing result is obtained by the secondary chip executing the corresponding drawing instruction for each control of the set of controls to perform drawing.
Claim 28 is substantially similar to claim 17 is rejected based on similar analyses.
Regarding Claim 29, Choi discloses the electronic device according to claim 28, the secondary chip is further configured to:
invoke a UI drawing framework to obtain the corresponding drawing instruction for each control in the set of controls.
Claim 29 is substantially similar to claim 18 is rejected based on similar analyses.
Regarding Claim 30, Choi discloses the electronic device according to claim 28, the secondary chip is further configured to:
mark a first control of the set of controls that does not meet the preset condition to obtain the first-type control; and
send the first drawing instruction corresponding to the first-type control to the primary chip to perform drawing.
Claim 30 is substantially similar to claim 19 is rejected based on similar analyses.
Regarding Claim 31, Choi discloses the electronic device according to claim 30, wherein the memory is configured to store the graphics primitive drawing result of the primary chip, and the secondary chip is further configured to:
read the graphics primitive drawing result of the primary chip from the memory.
Claim 31 is substantially similar to claim 20 is rejected based on similar analyses.
Allowable Subject Matter
Independent claim 23 is allowed after rewritten in independent form including all of the limitation of the base claim 24 (allowable subject matter).
a method, applied to an electronic device, wherein the electronic device comprises a primary chip, a secondary chip, a memory, and a display, the primary chip is configured to run a first operating system, the secondary chip is configured to run a second operating system, and the method comprises:
when the secondary chip performs drawing of interface content, obtaining, by the secondary chip, a first set of controls corresponding to the interface content, wherein the first set of controls comprise at least one control;
identifying, by the secondary chip based on a corresponding drawing instruction for each control in the first set of controls, a first-type control that does not meet a preset condition;
reading, by the secondary chip, a graphics primitive drawing result corresponding to the first-type control from the memory; and
compositing, by the secondary chip, a local graphics primitive drawing result and the graphics primitive drawing result read from the memory to obtain a composited result, and sending a composited result to the display, wherein the local graphics primitive drawing result is obtained by the secondary chip executing the corresponding drawing instruction for each control of the first set of controls to perform drawing.
obtaining. by the primacy chip. a second set of controls corresponding to drawing interface content of the preset application;
identifying. by the primacy chip. a first control that is in the second set of controls and that does not meet the preset condition;
executing. by the primacy chip. a first drawing instruction corresponding to the first control that is in the second set of controls and that does not meet the preset condition, o obtain a plurality of shared graphics primitives through drawing; and
storing. by the primacy chip. the plurality of shared graphics primitives in the memory.
Dependent claims 34, 35 and 36 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding to independent claims 17, 28 the closest prior art references the examiner found are Choi et al. (U.S. 2022/0139352 A1) has been made of record as teaching: the electronic device comprises a primary chip, a secondary chip, and a display (Choi, Figs. 1, 2, [0061]); the primary chip is configured to run a first operating system, the secondary chip is configured to run a second operating system (Choi, [0009], [0104]); when the secondary chip performs drawing of interface content, obtaining, by the secondary chip, a set of controls corresponding to the interface content, wherein the set of controls comprise at least one control (Choi, Fig. 6A, [0100], [0123], [0124]); identifying, by the secondary chip based on a corresponding drawing instruction for each control in the set of controls, a first-type control that does not meet a preset condition (Choi, [0010], [0102]); compositing, by the secondary chip, a local graphics primitive drawing result and the graphics primitive drawing result of the primary chip to obtain a composited result, and sending the composited result to the display, wherein the local graphics primitive drawing result is obtained by the secondary chip executing the corresponding drawing instruction for each control in the set of controls to perform drawing (Choi, [0125], [0153]), recited in claims 17, 28.
However, the art of record did not teach or suggest the claim taken as a whole and particular the limitation pertaining
“wherein the first operating system comprises a first graphics primitive sharing service program and a graphics primitive drawing program, and the second operating system comprises a second graphics primitive sharing service program and a first application;
when the first application performs drawing of interface content, the first application obtains a shared graphics primitive comprised in the interface content, wherein the shared graphics primitive is a graphics primitive whose drawing effect on the secondary chip side does not meet a preset requirement;
the first application sends a drawing request of the shared graphics primitive to the graphics primitive drawing program through the second graphics primitive sharing service program and the first graphics primitive sharing service program;
the graphics primitive drawing program performs graphics primitive drawing in response to the drawing request of the shared graphics primitive to obtain the graphics primitive drawing result; and
the primary chip stores the graphics primitive drawing result from the graphics primitive drawing program in the memory”, recited on claims 34, 36.
Dependent claim 35 is allowed because it depends on claim 34.
Dependent claim 36 is substantially similar to dependent claim 34 and is allowed based on similar analyses.
Dependent claims 25-27 are allowed because they depend on independent claim 23.
Dependent claims 21, 22, 32,33 are substantially similar to dependent claims 26, 27 and are allowed based on similar analyses.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance”.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/KEE M TUNG/Supervisory Patent Examiner, Art Unit 2611
/KHOA VU/Examiner, Art Unit 2611