DETAILED ACTION
This office action is in response to the application filed on 2/26/24.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Inventorship
This application currently names joint inventors. In considering patentability of the claims under 35 U.S.C. 103(a), the examiner presumes that the subject matter of the various claims was commonly owned at the time any inventions covered therein were made absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and invention dates of each claim that was not commonly owned at the time a later invention was made in order for the examiner to consider the applicability of 35 U.S.C. 103(c) and potential 35 U.S.C. 102(e), (f) or (g) prior art under 35 U.S.C. 103(a).
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(B) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claim 5 is rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
Claim 5 recites the limitation "the ferrite inductor is an equivalent circuit corresponding to the ferrite inductor". It is unclear what is meant by this limitation. The Examiner will interpret said claims as “the ferrite inductor is an equivalent circuit corresponding to an inductor.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 2, 5 and 7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Curbow et al. (US11652473, hereinafter Curbow).
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Regarding Claim 1, Curbow discloses a switching circuit (fig. 3 as annotated above, hereinafter fig. 3’) comprising: a switching device (500) configured to conduct or open a state between a drain terminal and a source terminal based on a voltage applied between a gate terminal and the source terminal (gate and source of 220); a drive circuit including a first switch element (218) having one end connected to a positive electrode side (V+) of a control power supply and an other end connected to an output end N1), and a second switch element (218b) having one end connected to the output end and an other end connected to a reference potential to which a negative electrode side of the control power supply is connected (V-), the drive circuit being configured to open and close the first switch element and the second switch element in accordance with a predetermined control signal, generate a drive voltage for driving the switching device (V @N2), and output the generated drive voltage to the gate terminal of the switching device via the output end; a clamp circuit (104) including a third switch element (302) configured to conduct between the reference potential of the drive circuit and a connection point of a path connecting the output end of the drive circuit and the gate terminal of the switching device (N2) based on a comparison result between a threshold potential generated based on the reference potential of the drive circuit and a potential at the connection point (via 214); and a ferrite inductor (Lgs) provided immediately near the output end of the drive circuit, and having one end connected to the output end (N1) and an other end connected to the connection point (N2).
Regarding Claim 2, Curbow discloses (fig. 3’) a resistance element (Rg) connected in series with the ferrite inductor between the output end of the drive circuit and the connection point (R and L are connected in series between N1 and N2).
Regarding Claim 5, Curbow discloses (fig. 3’) the ferrite inductor is an equivalent circuit corresponding to the ferrite inductor (LGS).
Regarding Claim 7, Curbow discloses (fig. 3’) A power converter comprising a switching circuit according to claim 1 in a configuration (col. 12, line 59- col. 13, line 2).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3 and 6 are rejected under 35 U.S.C. 103(a) as being unpatentable over Curbow in view of Nosaka et al. (US20210320653, hereinafter Nosaka).
Regarding Claim 3, Curbow does not disclose a diode element having an anode connected to the reference potential of the drive circuit and a cathode connected to the connection point.
Nosaka discloses (fig. 1) a diode element (15) having an anode connected to the reference potential of the drive circuit (@124) and a cathode connected to the connection point (gate of 1).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Curbow to include a diode to ground as disclosed in Nosaka to alleviate noise and allow for proper operation.
Regarding Claim 6, Curbow does not disclose the switching device includes a wide bandgap semiconductor including at least a SiC semiconductor or a GaN semiconductor.
Nosaka discloses the switching device includes a wide bandgap semiconductor including at least a SiC semiconductor or a GaN semiconductor (¶2).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device of CUrbow to include a SiC type switch as disclosed in Nosaka to meet design needs of the system.
Claim 4 is rejected under 35 U.S.C. 103(a) as being unpatentable over Curbow in view of Ikeda (US20180019686).
Regarding Claim 4, Curbow discloses (fig. 3’) the resistance element (R ) connected in series with the ferrite inductor (L ).
Curbow does not disclose a capacitor element is connected in parallel to the resistance element.
Ikeda discloses (fig. 6) a capacitor element (40) is connected in parallel to a resistance element (20).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Curbow to include a parallel Resistor Capacitor circuit as disclosed in Ikeda to suppress the abrupt variation of the gate voltage thus stabilizing the gate voltage.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
US 20090058499, Yamashiro; Keisuke et al. discloses a gate driving circuit and method for driving semiconductor device
US 20100283515, Kelley; Robin Lynn et al. discloses a gate driver for enhancement-mode and depletion-mode wide bandgap semiconductor JFETS.
US 20120153998, Kitamura; Tatsuya et al. discloses a gate drive circuit.
US 20120306545, Machida; Osamu et al. discloses a gate driver.
US 20160261266, Kampl; Severin et al. discloses an electronic circuit.
US 8451045, Yim; Jeongbin et al. discloses an inverter control system.
US 9300285, Pang; Sung Man discloses a gate driver circuit.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KYLE J MOODY whose telephone number is (571)272-5242. The examiner can normally be reached on M-F 10 AM - 4 PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached on 571-272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/KYLE J MOODY/
Primary Examiner, Art Unit 2838