Prosecution Insights
Last updated: August 06, 2026
Application No. 18/687,035

SPOT-SIZE CONVERTER STRUCTURE AND PHOTONIC DEVICE

Non-Final OA §102
Filed
Feb 27, 2024
Priority
Oct 19, 2022 — CN 202211281928.2 +1 more
Examiner
BEDTELYON, JOHN M
Art Unit
2874
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Nanjing Lycore Technologies Co. Ltd.
OA Round
1 (Non-Final)
78%
Grant Probability
Favorable
1-2
OA Rounds
1m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
641 granted / 819 resolved
+10.3% vs TC avg
Moderate +14% lift
Without
With
+14.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
10 currently pending
Career history
832
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
46.1%
+6.1% vs TC avg
§102
38.0%
-2.0% vs TC avg
§112
11.0%
-29.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 819 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statements (IDS) submitted on February 27, 2024 and February 24, 2025 are being considered by the examiner. Drawings The drawings were received on February 27, 2024. These drawings are acceptable. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jiang et al. (U.S. Patent Application Publication 2018/0180818, hereinafter referred to as “Jiang”). Jiang anticipates claims: 1 and 14: A spot-size converter (including a photonic device comprising such structures) structure (see figures 1-8), provided with a first end face configured to be coupled to an integrated optical waveguide and a second end face parallel to the first end face configured to be coupled to an optical fiber (see abstract), the spot-size converter structure comprising: a substrate (the bottom most layer of substrate layer 405 as seen in figure 4A is interpreted as the substrate); an isolation layer (see figure 4A, comprises the portion 437 and the etched portions on either side and/or below it in some cases) located on one side (the top side is interpreted as the one side, see figure 4A) of the substrate, the isolation layer comprising a first etched portion (the left etched opening to the left of the portion 437 is interpreted as the first etched portion), a second etched portion (the right etched opening to the right of the portion 437 is interpreted as the second etched portion) and a first transmission portion (the space between the end of the silicon taper 430 and edge 440 of tip 437 is interpreted as the first transmission portion), wherein the first etched portion, the second etched portion, and the first transmission portion which extend to the second end face in a longitudinal direction (see figures 4A and 4B), wherein the first transmission portion is located between the first etched portion and the second etched portion, and the longitudinal direction is orthogonal to the second end face (see figure 4A); a waveguide layer (the silicon layer that includes silicon inverted taper 430 is interpreted as the waveguide layer) located on one side of the isolation layer away from the substrate (see figure 4B), a width of the waveguide layer decreasing in a gradient manner in a direction approaching the second end face (see figure 4A), wherein a width direction is orthogonal to the longitudinal direction and parallel to a bottom face of the substrate (see figures 4A and 4B); and a covering layer (the silica layer that includes the silica inverted taper 435 is interpreted as the covering layer) located on one side of the waveguide layer away from the substrate and covering the waveguide layer, the covering layer comprising a second transmission portion (the entirety of the tip 437 of the silica inverted tip 435 is interpreted as the second transmission portion) extending to the second end face in the longitudinal direction and protruding in a form of a ridge on a surface of the first transmission portion (see figures 4A and 4B). 2 and 15: The spot-size converter structure according to claim 1, wherein the first etched portion and the second etched portion are each an etched blind groove (see figure 4A, the portions are interpreted as each being at etched blind groover) having an etched depth less than a thickness of the isolation layer (as the isolation layer thickness includes the undercut 452, the etched depth of the first and second portions is less than a thickness of the isolation layer) and extending to the second end face. 3 and 16: The spot-size converter structure according to claim 1, wherein the first etched portion and the second etched portion are each an etched through groove having an etched depth equal to a thickness of the isolation layer and extending to the second end face (see figure 4A, here the depths are interpreted as equal thickness). 4 and 17: The spot-size converter structure according to claim 3, wherein the substrate is provided with an etched recess (undercut 452 is here interpreted as the etched recess), and the etched through grooves are in communication with the etched recess (see figure 4A). 5 and 18: The spot-size converter structure according to claim 1, wherein the first etched portion and the second etched portion each comprise a plurality of etched through holes (formed on the opposing sides of the bridges 454) arranged in the longitudinal direction, wherein the etched through holes closest to the second end face are open holes and have openings facing the second end face (see figure 4A). 6 and 19: The spot-size converter structure according to claim 5, wherein the substrate is provided with an etched recess (undercut 452 is interpreted as the etched recess), and the plurality of etched through holes are in communication with the etched recess (see figure 4A). 7 and 20: The spot-size converter structure according to claim 1, wherein a width of the first transmission portion is a constant, and a width of the second transmission portion is a constant (see figure 4A, since these are simply required to be portions, the portions can be interpreted to be any shaped parts or portions of the device, and are here interpreted as being constant widths). 8. The spot-size converter structure according to claim 1, wherein a width of the first transmission portion decreases gradually in the direction approaching the second end face, and a width of the second transmission portion decreases gradually in the direction approaching the second end face (see figures 1-4B). 9. The spot-size converter structure according to claim 1, wherein the second transmission portion is centered relative to two side faces of the first transmission portion (see figure 4A). 10. The spot-size converter structure according to claim 1, wherein a width of the covering layer decreases in a gradient manner in the direction approaching the second end face (see figure 4A). 11. The spot-size converter structure according to claim 1, wherein the waveguide layer comprises a flat plate layer (the bottom of the waveguide is interpreted as the flat plate layer) and a ridge layer (the ridge of the waveguide core that forms portion 430 is interpreted as the ridge layer) located on one side of the flat plate layer away from the substrate (see figures 4A and 4B). 12. The spot-size converter structure according to claim 1, wherein the waveguide layer extends to the second end face (see figure 4A, the waveguide layer is interpreted as extending to the second end face). 13. The spot-size converter structure according to claim 1, wherein there is a spacing between a narrow end of the waveguide layer close to the second end face and the second end face (see figure 4A, the space between these elements is interpreted as its spacing). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN M BEDTELYON whose telephone number is (571)270-1290. The examiner can normally be reached 8:00am - 4:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uyen-Chau Le can be reached at 571-272-2397. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /John Bedtelyon/Primary Examiner, Art Unit 2874
Read full office action

Prosecution Timeline

Feb 27, 2024
Application Filed
Jul 15, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
78%
Grant Probability
92%
With Interview (+14.1%)
2y 7m (~1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 819 resolved cases by this examiner. Grant probability derived from career allowance rate.

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