DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group 1, Claims 1-8 in the reply filed on 01/16/2026 is acknowledged.
Claims 9-15 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Group 2, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 01/16/2026.
The restriction requirement has been made FINAL.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3 are rejected under 35 U.S.C. 103 as being unpatentable over Itani et al. (US 2004/0187768 A1) in view of Eichler et al. (US 2022/0106702 A1).
Regarding Claims 1, Itani teaches a GaAs wafer (Abstract; Paragraph 0040) have 1.0×10 17 to 5.0×1019/cm3 of Si atoms, 1.0×1017 to 5.0×1019/cm3 of B atoms, and 1.0×1017 to 5.0×1019/cm3 of In atoms, and a carrier concentration n of 1.0×10 17 to 6.0×1019 cm−3. (Paragraph 0012-0013). These ranges overlap the claimed range. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. (MPEP §2144.05).
Itani teaches the average dislocation density should be 100 cm−2 or less. (Abstract; Claim 1 of Itani). Itani does not specifically teach a proportion of the area of a region with zero dislocation density is 91% or more.
Eichler teaches a GaAs wafer (Abstract; Claim 20-24 of Eichler). Eichler teaches the area of the crystal and resulting wafer should have 95% or more of area free from dislocations. (Paragraph 0037). Eichler teaches this will improve the yield of forming components, which improves economic efficiency of the wafer. (Paragraph 0038). Eichler does not specifically teach the claimed method of measuring a proportion of the area of a region with zero dislocation density. However, it would be reasonable to one with ordinary skill in the art the teachings of Eichler would direct one of ordinary skill in the art to overlap the range of the proportion of the area of a region with zero dislocation density of Itani measured under the claimed method to the claimed range, as higher proportion of area of a region with zero dislocation density improves the economic efficiency of resulting wafers.
Regarding Claim 2, Itani teaches the average dislocation density should be 100 cm−2 or less. (Abstract; Claim 1 of Itani). Itani teaches lower average dislocation density leads to be more reliability when the wafer is processed for use. (Paragraph 0040). Itani does not specifically teach the claimed method of measuring average dislocation density. However, it would be reasonable to one with ordinary skill in the art the teachings of Itani would direct one of ordinary skill in the art to overlap the claimed average dislocation density measured under the claimed method, as Itani teaches lower average dislocation density improves the reliability when the wafer is used.
Regarding Claim 3, Itani teaches making 3-inch wafers. (Paragraph 0040).
Claims 4-8 are rejected under Itani in view of Eichler, Freiberger (NPL) and UNSW (NPL).
Regarding Claim 4-6, Itani teaches a plurality of GaAs wafers (Abstract; Paragraph 0040) have 1.0×10 17 to 5.0×1019/cm3 of Si atoms, 1.0×1017 to 5.0×1019/cm3 of B atoms, and 1.0×1017 to 5.0×1019/cm3 of In atoms, and a carrier concentration n of 1.0×10 17 to 6.0×1019 cm−3. (Paragraph 0012-0013). These ranges overlap the claimed range. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. (MPEP §2144.05).
Itani teaches the average dislocation density should be 100 cm−2 or less. (Abstract; Claim 1 of Itani). Itani teaches lower average dislocation density leads to be more reliability when the wafer is processed for use. (Paragraph 0040). Itani does not specifically teach the claimed method of measuring average dislocation density. However, it would be reasonable to one with ordinary skill in the art the teachings of Itani would direct one of ordinary skill in the art to overlap the claimed average dislocation density measured under the claimed method, as Itani teaches lower average dislocation density improves the reliability when the wafer is used.
Itani does not specifically teach a proportion of the area of a region with zero dislocation density is 91% or more.
Eichler teaches a GaAs wafer (Abstract; Claim 20-24 of Eichler). Eichler teaches the area of the crystal and resulting wafer should have 95% or more of area free from dislocations. (Paragraph 0037). Eichler teaches this will improve the yield of forming components, which improves economic efficiency of the wafer. (Paragraph 0038). Eichler does not specifically teach the claimed method of measuring a proportion of the area of a region with zero dislocation density. However, it would be reasonable to one with ordinary skill in the art the teachings of Eichler would direct one of ordinary skill in the art to overlap the range of the proportion of the area of a region with zero dislocation density of Itani measured under the claimed method to the claimed range, as higher proportion of area of a region with zero dislocation density improves the economic efficiency of resulting wafers.
Itani and Eichler do not specifically tach the GaAs wafers are obtained from center portion of a straight body portion of an identical GaAs ingot.
Freiberger teaches GaAs wafers are formed by creating a GaAs crystal ingot and cutting wafers from the ingot, where cuts are made through the center portion of a straight body portion of one identical ingot. USNW teaches a plurality of wafers are formed by cutting multiple wafers from the center portion of a straight body portion of one identical ingot, which allows the plurality of wafers to be used for a commercial purpose. Thus, it would have been obvious to one with ordinary skill in the art to form a plurality of wafers from a center portion of the straight body portion of a GaAs ingot as taught by Freiberger and UNSW in order to yield commercially plurality of wafers.
Regarding Claim 7, the limitation that the plurality of the GaAs wafers is half or more of the total wafers from the straight body portion of the identical GaAs ingot is product-by-process limitation, as it limits the number of wafers extract from ingot. This does not seem to place a structural limit on the plurality of GaAs wafers themselves; thus, the numbers of wafers that are formed or not formed form an ingot does not place a structural limitation on the resulting wafer group. In addition, Freiberger and UNSW teaches slicing the entire ingot to form wafers.
Regarding Claim 8, UNSW teaches GaAs wafers are cut from the straight body portion of an identical ingot from tail side to a seed side, as those are portions of an ingot formed from CZ method. (Paragraph 0029).
Correspondence
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL ZHANG whose telephone number is (571)270-0358. The examiner can normally be reached Monday through Friday: 9:30am-3:30pm, 8:30PM-10:30PM.
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/Michael Zhang/Primary Examiner, Art Unit 1781