Response to Amendment
This Office Action is in response to claim amendment filed on July 29, 2026.
Claims 1-20 are currently pending in this application
Information Disclosure Statement
The information disclosure statement filed August 03, 2026 has been considered.
Response to Arguments
The objection to the specification has been withdrawn for the reasons stated in
applicant’s response (see remarks Pg. 1).
Applicant’s acknowledgement of claim 14 Claim Interpretation under 35 U.S.C. 112(f) is considered and as result claim Interpretation of claim 14 under 35 U.S.C. 112(f) is maintained (see remarks Pg. 1).
The applicant’s arguments, directed towards the 35 USC §103 rejections of Claims 1-3 and 14-16 as set forth in the previous Office Action, have been fully considered, but are not persuasive (see remarks Pg. 1-8).
Applicant submits that, Liu fails to disclose or suggest determining/calculating a total number of code blocks corresponding to the time deviation value and controlling the designated device to insert code blocks of a preset type into the cell stream to be sent, in accordance with the calculated number of code blocks, so as to adjust the actual time of sending the cell in the designated device to the reference time, as recited in claim 1.
In Liu, the time error/deviation is minimized by adjusting the clock at the egress node, so that all traffics passing through that egress node are to be affected, which is fundamentally different from adjusting the actual time of sending the cell in the designated device to the reference time (which is directed to a particular cell stream and affects only a particular cell stream), as recited in claim 1.
Moreover, because the technical solution of claim 1 is directed to a cell stream, the operation of "adjust the actual time of sending the cell (of the cell stream) in the designated device to the reference time" as recited in claim 1 can be performed separately for different cell streams, which facilitates to ensure the phase relationships among multiple cell streams of different devices to be constant and stable.
Liu, by adjusting the clock of the egress node cannot ensure the phase relationships among multiple cell streams of different devices to be constant and stable, and Liu minimizing the time error/deviation by adjusting the clock of the egress node is even contrary to the objective of ensuring the phase relationships among multiple cell streams of different devices to be constant and stable.
Furthermore, if the scheme in Liu of minimizing the time error/deviation by adjusting the clock of the egress node is combined with the scheme in LIU of inserting idle blocks between code blocks of a code stream for adjusting a rate of transmitting the code blocks of the code stream, the scheme in Liu of adjusting the clock of the egress node would disrupt positioning code blocks in LIU, thereby affecting the implementation of the scheme of LIU.
The examiner has considered all the arguments but disagrees. Claim 1 is rejected under 35 USC §103 and Liu does not teach but teachings of LIU is relied upon for “calculating a total number of code blocks corresponding to the time deviation value and controlling the designated device to insert code blocks of a preset type into the cell stream to be sent according to the calculated number of code blocks” (see ¶ [0074], ¶ [0122], wherein predetermined interval or predetermined number of code blocks to be inserted between idle blocks can be determined based on the maximum time deviation value and transmission rate of the network device and the insertion module may be specifically used to insert one of the free blocks in the bitstream at predetermined intervals of code blocks.).
Liu further teaches time error/deviation is minimized by adjusting the clock at the egress node, which includes adjusting the actual time of sending the cell included in the traffic passing through that egress node (see Col. 2, lines 31-67 – Col. 3, lines 1-8). Applicant’s argument directed towards Liu’s teachings being fundamentally different from “adjusting the actual time of sending the cell in the designated device to the reference time (which is directed to a particular cell stream and affects only a particular cell stream)” is not persuasive since claim language does not explicitly mention that it affects only a particular cell and does not affect other traffic. Also, the claim language is silent about behavior of multiple cell streams or multiple devices and whether the operation ensures the phase relationships among multiple cell streams of different devices to be constant and stable.
The Applicant further argues the scheme in Liu of minimizing the time error/deviation by adjusting the clock of the egress node would affect the implementation of the scheme of LIU. LIU teaches calculating a total number of code blocks corresponding to the time deviation value based on the maximum time deviation value and transmission rate of the network device and which does not correspond to the actual time of sending a cell in a designated device (see ¶ [0074]), Teaching of Liu are incorporated to further improve LIU to so as to detect and adjust the actual time of sending the cell in the designated device to the reference time (see Fig. 6, e.g., element 300, 306, 308, Col. 11, lines 49-60)
As result, applicant’s arguments are not persuasive and the 35 USC §103 rejections of
claims 1 and 14-16 are maintained.
The 35 USC §103 rejection of dependent claims 2-3 are maintained for the
reasons set forth above.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are:
“a time detection module configured to detect a time deviation value …; a code block calculation module configured to calculate a total number of code blocks …; and a code block insertion module configured to control the designated device to insert code blocks …” in claim 14, lines 2, 4 and 6.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or non-obviousness.
Claim(s) 1-3 and 14-16 are rejected under 35 U.S.C. 103 as being unpatentable over LIU, CN110266612A (see the English translated copy), (hereinafter LIU), in view of Liu et al., US 11212068 B1, (hereinafter Liu).
Regarding claim 1 and 14-16, LIU teaches a method for sending a cell stream, comprising (see ¶ [0056] - ¶ [0061], As shown in Figure 1A, this embodiment provides a data transmission method, including):
calculating a total number of code blocks corresponding to the time deviation value (see ¶ [0074], e.g., At this time, when determining the predetermined interval or predetermined number of code blocks, the number of code blocks to be inserted between idle blocks can be determined based on the maximum time deviation value and transmission rate of the network device.); and
controlling the designated device to insert code blocks of a preset type into the cell stream to be sent according to the calculated number of code blocks (see ¶ [0122], e.g., Optionally, the insertion module may be specifically used to insert one of the free blocks in the bitstream at predetermined intervals of code blocks. For example, if the bandwidth of a time slot is 5 Gbit/s, then a predetermined number of 5,000 codeblocks or slightly less than 5,000 code blocks can be inserted into an idle block for rate adjustment.),
however, it does not explicitly teach detecting a time deviation value between an actual time of sending a cell in a designated device and a reference time; and so as to adjust the actual time of sending the cell in the designated device to the reference time.
Liu teaches, detecting a time deviation value between an actual time of sending a cell in a designated device and a reference time (Fig. 6, e.g., element 300, 306, 308, Col. 11, lines 49-60, e.g., determining an actual transmission time when the specific part of the signal is transmitted (step 306); and causing adjustment of a clock based on a time error derived from a difference between the presentation time and the actual transmission time (step 308)); and
so as to adjust the actual time of sending the cell in the designated device to the reference time (see Fig. 6, e.g., element 300, 306, 308, Col. 11, lines 49-60, FIG. 6 is a flowchart of a process 300 for Differential Clock Recovery (DCR) using a global reference time. The process 300 includes, at an egress node, synchronizing with a global reference time (step 302);… and causing adjustment of a clock based on a time error derived from a difference between the presentation time and the actual transmission time (step 308).).
It would have been obvious to one of ordinary skill in the art before the effective
filing date of the claimed invention to have modified actual time of sending the cell in the designated device of LIU to incorporate the teachings of Liu to include detecting a time deviation value between an actual time of sending a cell in a designated device and a reference time; and so as to adjust the actual time of sending the cell in the designated device to the reference time. Doing so would facilitate in achieving removing underrun or overrun causing packet loss or packet variation, out of range of the application requirements as suggested by Liu (see Col. 12, lines 56-65, e.g., The DCR algorithm is used to recover a clock 70 at the demapper 58 so that a stream output over a radio interface can match the input of a clock 72 at the mapper 52, so that there is no underrun or overrun causing packet loss or packet variation, out of range of the application requirements. For the DCR algorithm, there is a need to convey a timestamp, from the timestamper functionality 68 on the mapper 52, to the demapper 58, such that the clocks 70, 72 have a common reference).
Regarding claim 2, LIU as combined with Liu teaches the limitations of Claim 1.
LIU does not teach but Liu teaches, wherein the detecting a time deviation value between an actual time of sending a cell in a designated device and a reference time comprises:
according to the reference time, selecting a cell with a preset sequence number in the designated device as a reference cell to be subjected to a time comparison;
determining a time comparison period according to the reference time; and in each time comparison period (see Col. 14, lines 52-59, e.g., The process 650 can further include including a sequence number in an orderInfo field in the RoE frame in addition to the timestamp in the payload (step 662); see Col. 9, lines 43-59, e.g., The connections between the RoE demapper 58 and the DCR control functionality 62 include a reference bit presentation time, a reference bit transmitted (Tx), and a flow enable. The flow enable is asserted when the global reference time matches the reference bit presentation time of the packet at the head of a demapper queue. The reference bit Tx is asserted when a reference bit is transmitted to the transceiver 60. The reference bit presentation time is the value of the presentation time from the packet at the head of the demapper queue),
perform the time comparison to detect the time deviation value between an actual time of sending the reference cell and the reference time (see Col. 2, lines 31-40, e.g., an egress node includes circuitry configured to synchronize with a global reference time, receive a signal including a presentation time for when a specific part of the signal is to be transmitted, wherein the presentation time was determined by an ingress node with reference to the global reference time, determine an actual transmission time when the specific part of the signal is transmitted, and cause adjustment of a clock based on a time error derived from a difference between the presentation time and the actual transmission time).
It would have been obvious to one of ordinary skill in the art before the effective
filing date of the claimed invention to have modified actual time of sending the cell in the designated device of LIU to incorporate the teachings of Liu to include detecting a time deviation value between an actual time of sending a cell in a designated device and a reference time. Doing so would facilitate in achieving removing underrun or overrun causing packet loss or packet variation, out of range of the application requirements as suggested by Liu (see Col. 12, lines 56-65, e.g., The DCR algorithm is used to recover a clock 70 at the demapper 58 so that a stream output over a radio interface can match the input of a clock 72 at the mapper 52, so that there is no underrun or overrun causing packet loss or packet variation, out of range of the application requirements. For the DCR algorithm, there is a need to convey a timestamp, from the timestamper functionality 68 on the mapper 52, to the demapper 58, such that the clocks 70, 72 have a common reference).
Regarding claim 3, LIU as combined with Liu teaches the limitations of Claim 2.
LIU does not teach but Liu teaches, wherein the reference time comprises any one of following time values obtained by a preset time acquisition method:
a time value of a Global Clock corresponding to the cell,
an occurrence time value of a pulse having a global clock attribute, and
a desired value of the time of sending the cell (see Col. 2, lines 54-67 - Col. 3, lines 1-8, e.g., an ingress node includes circuitry configured to synchronize with a global reference time, receive a signal for transmission to the egress node and detect a reference therein with respect to the global reference time, determine a presentation time for when the reference in the signal is to be transmitted from the egress node, and transmit the signal to the egress node with the presentation time included therein for the egress node to adjust its clock based on a time error derived from a difference between the presentation time and an actual transmission time… and wherein the presentation time can be when the egress node should transmit the reference);
wherein the time comparison period is a time duration between two consecutive reference times (see Col. 9, lines 43-59, e.g., The connections between the RoE demapper 58 and the DCR control functionality 62 include a reference bit presentation time, a reference bit transmitted (Tx), and a flow enable. The flow enable is asserted when the global reference time matches the reference bit presentation time of the packet at the head of a demapper queue. The reference bit Tx is asserted when a reference bit is transmitted to the transceiver 60. The reference bit presentation time is the value of the presentation time from the packet at the head of the demapper queue); and
the preset time acquisition method comprises using any one of: a calibration of a 1588 function supported by the designated device, a Global Positioning System clock signal, or an external clock source (see Col. 7, lines 61-64, Accordingly, the process 30 further includes synchronizing a global reference time between the nodes 20, 22, such as via Precision Time Protocol (PTP) (IEEE 1588), a Global Navigation Satellite System (GNSS), etc.).
It would have been obvious to one of ordinary skill in the art before the effective
filing date of the claimed invention to have modified sending the cell in the designated device of LIU to incorporate the teachings of Liu to include detecting a time deviation value between an actual time of sending a cell in a designated device and a reference time. Doing so would facilitate in achieving common time reference, removing underrun or overrun causing packet loss or packet variation, out of range of the application requirements as suggested by Liu (see Col. 12, lines 49-64, e.g., The objective of the DCR control functionality 62 and the timestamper functionality 68 and is to provide a common time reference (e.g., SyncE and PTP 1588 ToD). The DCR algorithm is used to recover a clock 70 at the demapper 58 so that a stream output over a radio interface can match the input of a clock 72 at the mapper 52, so that there is no underrun or overrun causing packet loss or packet variation, out of range of the application requirements.).
Allowable Subject Matter
Claim 4-13 and 17-20 are objected to as being dependent upon a rejected base claim but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to POONAM SHARMA whose telephone number is (571)272-6579. The examiner can normally be reached Monday thru 8:30-5:30 pm, ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kevin Bates can be reached at (571) 272-3980. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/POONAM SHARMA/Examiner, Art Unit 2472
/KEVIN T BATES/Supervisory Patent Examiner, Art Unit 2472
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