DETAILED ACTION
This office action is in response to the application filed on 03/08/2024
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 03/08/2024 and 11/17/2025 has been considered by the examiner.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in claims 1, 3 and 7-8. Therefore, the “ in response to a switching time interval of the second switching transistor being less than or equal to a first preset value after high-voltage startup of the switching power supply, acquiring, by the secondary control module, a voltage waveform at a second connection point” and “ and the first voltage divider circuit is configured to generate a first voltage divider signal so that the primary control module acquires the voltage waveform at the first connection point” must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Examiner’s Note: Claims 1, 3 and 7 do not show by the operation graph or which circuitry is accomplishing the function.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Objections
Claim 7 is objected to because of the following informalities: Claim 7 lines 21 an d31 “a drive signal” and “an output voltage” this should be “the drive signal” and “the output voltage”. Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yang et al. US 2020/0036280.
Regarding Claim 1, Yang teaches (Figures 1-8) a switching power supply control method, wherein a switching power supply (2) comprises a primary winding (w1), a secondary winding (w2), a primary control module (200), a secondary control module (100), a first switching transistor (20) connected to the primary winding, and a second switching transistor (50) connected to the secondary winding, wherein the method comprises: in response to a switching time interval (SR control pulse) of the second switching transistor being less than or equal to a first preset value (demagnetization time see Vdmg) after high-voltage startup (after regular startup) of the switching power supply, acquiring, by the secondary control module (100), a voltage waveform at a second connection point (VTR at time t2) between the secondary winding (w2) and the second switching transistor (50); in response to the voltage waveform at the second connection point not achieving zero voltage switching (fig. 3a, at t2), adjusting, by the secondary control module, a cut-off current of the second switching transistor (current for turning on and off the transistor) until a voltage waveform at a first connection point (Va at wa) between the primary winding and the first switching transistor just reaches zero (at time t3 with ZVS pulse); and in response to the voltage waveform at the first connection point just reaching zero (at time t4), controlling, by the primary control module, the first switching transistor (20) to be turned on to achieve zero-voltage turn-on of the first switching transistor (at timet5). (For example: Par. 39-50)
Regarding Claim 2, Yang teaches (Figures 1-8) wherein the switching power supply (2) further comprises an auxiliary winding (WA) and a first voltage divider circuit (40 and 45), wherein the first voltage divider circuit is connected between the auxiliary winding and a voltage detection terminal (pin Vdmg) of the primary control module (200); in response to the voltage waveform (Vdmg) at the first connection point just reaching zero, controlling, by the primary control module, the first switching transistor to be turned on to achieve the zero-voltage turn-on of the first switching transistor (time t4-t5 in fig. 3a, par. 54-57) comprises: in response to the primary control module detecting, through the first voltage divider circuit (40 and 45), that the voltage waveform (Vdmg) at the first connection point just reaching zero, controlling, by the primary control module, the first switching transistor to be turned on to achieve the zero-voltage turn-on of the first switching transistor (times t4-t5 in fig. 3a). (For example: Par. 39-50)
Regarding Claim 3, Yang teaches (Figures 1-8) wherein the switching power supply (2) further comprises an optocoupler (70) and a second voltage divider circuit (Fig. 5, at Vo), wherein the optocoupler is connected between an optocoupler output port of the primary control module (100) and a current drive port of the secondary control module (at 200, see fig. 2), and the second voltage divider circuit is connected between the secondary winding and an output voltage detection terminal of the secondary control module (Fig. 2, Vo); wherein the method further comprises: in response to an output load of the switching power supply changing (determined by the error amplifier and the Vb signal) and the switching time interval of the second switching transistor being less than or equal to the first preset value (SR pulse less than demagnetization time), acquiring, by the secondary control module, an output voltage of the switching power supply through the second voltage divider circuit (sent to 150) and generating an optocoupler drive signal (sent to 70); generating, by the optocoupler (70), a current feedback signal (Vfb) according to the optocoupler drive signal; and adjusting, by the primary control module (100), a peak current of the first switching transistor (the on and off times of the transistor 50) according to the current feedback signal to achieve loop control for stabilizing the output voltage of the switching power supply (par. 34-35). (For example: Par. 39-50)
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4-5 and 7-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang in view of YE US 2017/0288440.
Regarding Claim 4, Yang teaches (Figures 1-8) in response to the output load of the switching power supply changing (with signal VFB). (For example: Par. 39-50)
Yang does not teach in response a switching current of the first switching transistor being less than a second preset value, controlling, by the primary control module, the switching current of the first switching transistor to maintain at the second preset value and changing a frequency of a drive signal of the first switching transistor to adjust the output voltage of the switching power supply.
Ye teaches (Figures 1-9) in response a switching current of the first switching transistor (at pin 5, fig. 5) being less than a second preset value (reference at cp3), controlling, by the primary control module, the switching current of the first switching transistor to maintain at the second preset value and changing a frequency of a drive signal of the first switching transistor to adjust the output voltage of the switching power supply (the CP3 controls the SR latch 413 which generates the driving signal for the power switch, also see par. 47-48). (For example: Par. 47-55)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Yang to include in response a switching current of the first switching transistor being less than a second preset value, controlling, by the primary control module, the switching current of the first switching transistor to maintain at the second preset value and changing a frequency of a drive signal of the first switching transistor to adjust the output voltage of the switching power supply, as taught by Ye to avoid a phenomenon that a low power load is charged with a large current, affecting the life of the system.
Regarding Claim 5, Yang teaches (Figures 1-8) in response to the output load of the switching power supply changing (with signal VFB) and the switching time interval of the second switching transistor being less than or equal to the first preset value (SR Pulse less than the demagnetization time), readjusting, by the secondary control module, the second switching transistor so that the voltage waveform at the first connection point reaches zero (with the operation as shown in figure 3a-3b). (For example: Par. 39-50)
Regarding Claim 7, Yang teaches (Figures 1-8) a switching power supply (2) comprises a primary winding (w1), a secondary winding (w2), a primary control module (200), a secondary control module (100), a first switching transistor (20) connected to the primary winding, and a second switching transistor (50) connected to the secondary winding, wherein the primary winding (w1) is configured to store energy in response to the first switching transistor (20) being turned on; the secondary winding is configured to generate an output voltage (Vo) in response to the second switching transistor being turned on (50); the first switching transistor is configured to be turned on or off according to a drive signal generated by the primary control module (sw from 200); the second switching transistor (50) is configured to be turned on or off according to a drive signal generated by the secondary control module (sg from 100); the primary control module is configured to: control the first switching transistor to be turned on in response to a voltage waveform at a first connection point just reaching zero (turning on 20 after the Vdmg is zero see figs. 3); adjust a peak current of the first switching transistor (current passing through the switch 20 when said switch is turned on) according to a current feedback signal (VFB signal from 70); and in response to an output load of the switching power supply changing (with 150 and 70) and the secondary control module (200) is configured to: in response to a switching time interval (SR control pulse) of the second switching transistor being less than or equal to a first preset value (demagnetization time see Vdmg) after high-voltage startup (after regular startup) of the switching power supply, acquiring, by the secondary control module (100), a voltage waveform at a second connection point (VTR at time t2) between the secondary winding (w2) and the second switching transistor (50); in response to the voltage waveform at the second connection point not achieving zero voltage switching (fig. 3a, at t2), adjusting, by the secondary control module, a cut-off current of the second switching transistor (current for turning on and off the transistor) until a voltage waveform at a first connection point (Va at wa) between the primary winding and the first switching transistor just reaches zero (at time t3 with ZVS pulse); in response to the output load of the switching power supply changing (Vo changing value either high or low), acquire an output voltage of the switching power supply through a second voltage divider circuit (Fig. 5, at Vo) and generate an optocoupler drive signal (sent to 70); and in response to the output load of the switching power supply changing and the switching time interval of the second switching transistor being less than or equal to the first preset value (SR pulse less than demagnetization time, figs. 3), readjust the second switching transistor so that the voltage waveform at the first connection point reaches zero (times t4-t5, figs. 3). (For example: Par. 39-50)
Yang does not teach in response to a switching current of the first switching transistor being less than a second preset value, control the switching current of the first switching transistor to maintain at the second preset value and change a frequency of a drive signal of the first switching transistor.
Ye teaches (Figures 1-9) in response a switching current of the first switching transistor (at pin 5, fig. 5) being less than a second preset value (reference at cp3), controlling, by the primary control module, the switching current of the first switching transistor to maintain at the second preset value and changing a frequency of a drive signal of the first switching transistor (the CP3 controls the SR latch 413 which generates the driving signal for the power switch, also see par. 47-48). (For example: Par. 47-55)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Yang to include in response a switching current of the first switching transistor being less than a second preset value, controlling, by the primary control module, the switching current of the first switching transistor to maintain at the second preset value and changing a frequency of a drive signal of the first switching transistor, as taught by Ye to avoid a phenomenon that a low power load is charged with a large current, affecting the life of the system.
Regarding Claim 8, Yang teaches (Figures 1-8) further comprising an auxiliary winding (Wa) and a first voltage divider circuit (40 and 45), wherein the first voltage divider circuit comprises a first resistor and a second resistor (40 and 45); and the first voltage divider circuit is configured to generate a first voltage divider signal (Vdmg) so that the primary control module acquires the voltage waveform at the first connection point (see fig. 2). (For example: Par. 39-50)
Yang does not teach the auxiliary winding is configured to provide electrical power for the primary control module.
Ye teaches (Figures 1-9) the auxiliary winding is configured to provide electrical power for the primary control module (Vdd, par. 31). (For example: Par. 31 and 36)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Yang to include the auxiliary winding is configured to provide electrical power for the primary control module, as taught by Ye to avoid a phenomenon that a low power load is charged with a large current, affecting the life of the system.
Regarding Claim 9, Yang teaches (Figures 1-8) further comprising an optocoupler (70) and the second voltage divider circuit (fig. 5, vo divider), wherein the second voltage divider circuit comprises a third resistor and a fourth resistor; the optocoupler is configured to generate the current feedback signal (VFB) according to the optocoupler drive signal (sent to 70); and the second voltage divider circuit is configured to generate a second voltage divider signal (sent to 150) so that the secondary control module acquires the output voltage of the switching power supply through the second voltage divider circuit. (For example: Par. 39-50)
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang in view of Jitaru US 20200169180.
Regarding Claim 6, Yang teaches (Figures 1-8) the method.
Yang does not teach wherein the switching power supply further comprises an absorption circuit, wherein the absorption circuit is connected in parallel to two ends of the primary winding and comprises a fifth resistor and a first capacitor connected in series with each other.
Jitaru teaches (Figures 1-9) wherein the switching power supply further comprises an absorption circuit (36-42), wherein the absorption circuit is connected in parallel to two ends of the primary winding (12) and comprises a fifth resistor and a first capacitor connected in series with each other (36 and 40). (For example: Par. 58)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Yang to include wherein the switching power supply further comprises an absorption circuit, wherein the absorption circuit is connected in parallel to two ends of the primary winding and comprises a fifth resistor and a first capacitor connected in series with each other, as taught by Jitaru to protect the system by absorbing transient energy.
Claim(s) 10-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang in view of YE and further in view of Jitaru US 20200169180.
Regarding Claims 10-11, Yang teaches (Figures 1-8) the method.
Yang as modified does not teach wherein the switching power supply further comprises an absorption circuit, wherein the absorption circuit is connected in parallel to two ends of the primary winding and comprises a fifth resistor and a first capacitor connected in series with each other.
Jitaru teaches (Figures 1-9) wherein the switching power supply further comprises an absorption circuit (36-42), wherein the absorption circuit is connected in parallel to two ends of the primary winding (12) and comprises a fifth resistor and a first capacitor connected in series with each other (36 and 40). (For example: Par. 58)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Yang to include wherein the switching power supply further comprises an absorption circuit, wherein the absorption circuit is connected in parallel to two ends of the primary winding and comprises a fifth resistor and a first capacitor connected in series with each other, as taught by Jitaru to protect the system by absorbing transient energy.
Conclusion
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/GUSTAVO A ROSARIO-BENITEZ/Primary Examiner, Art Unit 2838