DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Group I – Claims 1-19 in the reply filed on 12/19/2025 is acknowledged. The traversal is on the ground(s) that “the Restriction Requirement does not explain why each identified invention lacks unity with each other (i.e., why there is no single general inventive concept) specifically describing the unique special technical feature of each group”. This is not found persuasive because the Examiner has done this in the listing of each group. That is, the Examiner states each group is drawn to “a photodetection element” and then further special technical features such as “circuit arrangements” of the photodetection element of group I, “details relating to components and their locations in a common diffusion layer” in group II and “specific wiring arrangements” for the photodetection element of Group III. Paragraph 6 of the restriction, mailed 10/28/2025, then makes clear the Examiner is interpreting the photodetection element circuit shared by each group (i.e. 110 in Fig. 2) as the shared technical feature and that such feature is known within the art. Therefore, the Examiner finds it unpersuasive that the did not explain why each identified invention lacks unity with each other.
The requirement is still deemed proper and is therefore made FINAL.
Claims 20-37 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected invention, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 12/19/2025.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “photoelectric conversion unit”, “charge transfer unit”, “first reset unit”, “amplification unit” and “second reset unit” in claims 1-19; “charge holding unit” in claims 1-8 and 16-18; “charge discharge unit” in claim 2 and 15; “second charge holding unit” and “coupling unit” in claim 3 and 12-14; “selection unit” in claim 4.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 4, 5, 8 and 19 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by U.S. Patent Application Publication 2024/0348947 A1 to Hasegawa et al.
The applied reference has a common assignee with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2). This rejection under 35 U.S.C. 102(a)(2) might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C. 102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B) if the same invention is not being claimed; or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed in the reference and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement.
With respect to claim 1 Hasegawa discloses, in Fig. 1-26, a photodetection element (Fig. 2 and paragraph 78), comprising: a photoelectric conversion unit (211) that is formed on a semiconductor substrate and generates a charge corresponding to incident light (Fig. 2 and paragraph 80 and 103-104); a charge transfer unit (212) that transfers the charge to a charge holding unit that holds the charge (Fig. 2 and paragraph 81); a first reset unit (213) that is disposed adjacent to the charge holding unit (FD) and resets the charge holding unit (Fig. 2 and paragraph 82); an amplification unit (221) that generates a signal corresponding to the charge held in the charge holding unit (FD) and outputs the signal to a predetermined first output node (Fig. 2 and paragraph 84); a constant current circuit (223) that is connected to the first output node and constitutes a load of the amplification unit (Fig. 2 and paragraph 84); a first capacitive element (232) that has one end connected to the first output node and holds a reset level that is a level of the signal at a time of resetting by the first reset unit (Fig. 2 and paragraph 90); a second capacitive element (233) that has one end connected to the first output node and holds an image signal level that is a level of the signal when the charge is transferred to the charge holding unit (Fig. 2 and paragraph 90); a first switch element (234) that is connected between another end of the first capacitive element and a predetermined second output node and controls a current flowing through the first capacitive element (paragraph 91); a second switch element (235) that is connected between another end of the second capacitive element and the second output node and controls a current flowing through the second capacitive element (Fig. 2 and paragraph 92); a second reset unit (236) that resets the second output node (Fig. 2 and paragraph 93); a readout circuit (240) that is connected to the second output node, reads each of the reset level held in the first capacitive element and the image signal level held in the second capacitive element, and outputs the reset level and the image signal level as a reset signal and an image signal, respectively (paragraph 94 and 119-120); and a substrate contact (VDD1) that supplies a reference potential to the semiconductor substrate (paragraph 84).
With respect to claim 4 Hasegawa discloses, in Fig 1-26, the photodetection element according to claim 1, further comprising a selection unit (222) connected between the amplification unit and the first output node (Fig. 2 and paragraph 85).
With respect to claim 5 Hasegawa discloses, in Fig 1-26, the photodetection element according to claim 1, further comprising a plurality of pixels including the photoelectric conversion unit, the charge transfer unit, the first reset unit, the amplification unit, the constant current circuit, the first capacitive element, the second capacitive element, the first switch element, the second switch element, the second reset unit, the readout circuit, and the substrate contact (paragraph 69).
With respect to claim 8 Hasegawa discloses, in Fig 1-26, the photodetection element according to claim 1, further comprising: a second semiconductor substrate (302) that is stacked on the semiconductor substrate and includes the constant current circuit, the first capacitive element, the second capacitive element, the first switch element, the second switch element, and the second reset unit (paragraph 104); and a second substrate contact that supplies a reference potential (VREG) to the second semiconductor substrate (Fig. 2 and paragraph 93), wherein the charge transfer unit, the first reset unit, the amplification unit, and the substrate contact are formed on the semiconductor substrate (paragraph 104).
With respect to claim 19 Hasegawa discloses, in Fig. 1-26, a photodetection device (Fig. 2 and paragraph 78), comprising: a photoelectric conversion unit (211) that is formed on a semiconductor substrate and generates a charge corresponding to incident light (Fig. 2 and paragraph 80 and 103-104); a charge transfer unit (212) that transfers the charge to a charge holding unit that holds the charge (Fig. 2 and paragraph 81); a first reset unit (213) that is disposed adjacent to the charge holding unit (FD) and resets the charge holding unit (Fig. 2 and paragraph 82); an amplification unit (221) that generates a signal corresponding to the charge held in the charge holding unit (FD) and outputs the signal to a predetermined first output node (Fig. 2 and paragraph 84); a constant current circuit (223) that is connected to the first output node and constitutes a load of the amplification unit (Fig. 2 and paragraph 84); a first capacitive element (232) that has one end connected to the first output node and holds a reset level that is a level of the signal at a time of resetting by the first reset unit (Fig. 2 and paragraph 90); a second capacitive element (233) that has one end connected to the first output node and holds an image signal level that is a level of the signal when the charge is transferred to the charge holding unit (Fig. 2 and paragraph 90); a first switch element (234) that is connected between another end of the first capacitive element and a predetermined second output node and controls a current flowing through the first capacitive element (paragraph 91); a second switch element (235) that is connected between another end of the second capacitive element and the second output node and controls a current flowing through the second capacitive element (Fig. 2 and paragraph 92); a second reset unit (236) that resets the second output node (Fig. 2 and paragraph 93); a readout circuit (240) that is connected to the second output node, reads each of the reset level held in the first capacitive element and the image signal level held in the second capacitive element, and outputs the reset level and the image signal level as a reset signal and an image signal, respectively (paragraph 94 and 119-120); a substrate contact (VDD1) that supplies a reference potential to the semiconductor substrate (paragraph 84); and a processing circuit that processes the reset signal and the image signal (paragraph 76).
Allowable Subject Matter
Claims 2-3, 6-7 and 9-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter regarding claims 1 and 19:
Claims 1 and 19 are currently rejected in view of Hasegawa but there appears to be a possible 102(b)(2)(C) exemption. Should Applicant successfully invoke this exemption U.S. Patent Application Publication 2022/0191416 A1 to Fowler would be the closest available prior art. However, one of ordinary skill in the art would recognize that the first and second capacitive elements and the first and second switch elements of the claims do not have the required arrangement within the circuit as claimed and the Examiner does not believe such would be obvious in view of the Fowler.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: U.S. Patent Application Publication 2020/0389614 A1 to Benjaram shows creating a constant current source within a pixel environment by using two transistors in series.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL M PASIEWICZ whose telephone number is (571)272-5516. The examiner can normally be reached M-F 9 AM - 5:30 PM EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, George Eng can be reached at (571)272-7495. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DANIEL M PASIEWICZ/Primary Examiner, Art Unit 2699
January 23, 2026