Detailed Action
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This is in response to amendment filed on 11/26/2025. Claims 1, 4, 11-12 and 15 are amended, claims 21-23 are cancelled, Claims 1-20 are pending for examination.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Response to applicant’s Arguments
Applicant's arguments filed 11/26/2025 have been fully considered but they are not persuasive.
In response to applicant’s argument that there is no disclosure in Fielding of storing any indications as to which component values are stored in the cache line in that event, or therefore of using such indications when processing lookup requests issued by the data processor (i.e. texture mapper); There is no disclosure in these paragraphs of the cache tags indicating which component values are stored, or any teaching that less than all of the component values could even be stored (page 10 of applicant’s remark). However it is noted that reference Fielding teaches the identifier is provided as a tag for the cache line in question (in which the texture data is stored); sections 0061; 0095; 0100; Fielding also teaches the graphics processing unit (e.g. texture mapper) addresses the second cache for the texture data using the appropriate texture position (as the texture data is identified in the second cache using a texture position (section 0164).
Therefore, the rejections have been maintained (using reference Fielding) and updated (because of amendment) as shown below
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 6-14 and 17-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Fielding et al., US 2019/0096027 A1.
Regarding claims 1 and 11-12, Fielding teaches a data processing system (section 0024; a graphics processing system) comprising:
a memory system (section 0025);
a data processor (section 0026; a graphics processing unit) operable to perform processing operations, wherein when performing at least some data processing operations the data processor (section 0031; a data processing unit intermediate the first cache and the second cache and operable to process data stored in the first cache and to store the processed data in the second cache for use by the graphics processing unit) is configured to use data of a first type (it is taught as texture data); and
a cache (Fig.2 and Fig.3, cache system 21) operable to transfer data of the first type that is stored in the memory to the data processor for use by the data processor when performing a processing operation (section 0035; a cache system arranged between the memory system and the graphics processing unit and operable to transfer texture data stored in the memory system to the graphics processing unit for use by the graphics processing unit), wherein data of the first type that is to be transferred from the memory to the cache can comprise multicomponent data, each multicomponent data element comprising a set of plural, respective component values (section 0070 and sections 0072-0073; it is taught as the texture data is in an embodiment stored in the second cache of the cache system in one of a number of predefined texture formats, e.g., and in an embodiment, corresponding to particular arrangements and positions for the texture data components (channels) (e.g. RGB or YUV) being used; in the case of RGB (or RGBA) texture data, each of the red, green and blue (and alpha if present) data values for a given texel (texture data element) will be stored together (in a contiguous sequence of bits) in the second cache), and the data processing system is operable to store within a cache line of the cache a subset of less than all of the component values for a multicomponent data element (sections 0151-0152), the cache being configured to further store in association with a cache line that is storing a subset of less than all of the component values for a multicomponent data element an indication of which component values from the set of plural, respective component values for the multicomponent data element are stored in the cache line (section 0061; 0095; section 0100 and section 0164; the identifier (tag) for a cache line; section 0107; 0113-0114); the data processing system being configured such that:
when the data processor requires component values for a set of one or more components of a multicomponent data element of the first type, the data processor is configured to issue a lookup request for the set of one or more component values for the data element to the cache (Fig.3 and Fig.16; section 0305), the lookup request using the stored indications of which data element component values are stored in which cache lines to determine whether the requested set of one or more component values for the data element are present in the cache (section 0305-0306):
wherein when it is determined using the stored indications that the requested set of one or more component values for the data element is present in the cache, the requested set of one or more component values are provided to the data processor from the cache (Fig.16 and section 0312).
Regarding claims 2 and 13, Fielding teaches when it is determined using the stored indications that the requested set of one or more component values for the data element is not present in the cache, one or more component values for the data element are read into the cache from memory so that the lookup request can be completed (section 0309; if the required texture data is not already stored in the second cache 23, the fetching of the required texture data into the second (texel) cache 23 is triggered (step 330), and the fetched texture data is stored in the second (texel) cache (step 340)).
Regarding claims 3 and 14, Fielding teaches the data processing system is configured such that the data processor, when performing a data processing operation, is operable to issue a lookup request for component values for a subset of less than all components of a multicomponent data element of the first type, and wherein the set of component values that are stored within a cache line of the cache for a multicomponent data element is determined in dependence on which data element components have been requested by the data processor (section 0305-0312; the texture cache lookup unit 17 checks whether the texture data for the texels corresponding to the determined four closest texels surrounding the sampling position is already stored in the second (texel) cache 23; The texture filtering unit 18 then performs bilinear interpolation of the relevant texture data read from the second cache 23 to determine texture data values for the sampling position in question (step 360). The determined values for the sample position in question are then returned to the shader core 12 for use in generating the render target (e.g. shading the fragment in question), for output to the render target 13).
Regarding claims 6 and 17, Fielding teaches the indications of which component values are stored in which cache line are stored in respective cache line tags (section 0113; a (and each) cache line in the second cache is associated with (tagged with) an indication of the position within the texture of the texture data that is stored in the cache line. The position could, as discussed above, simply comprise a 2D position (x, y coordinate), but it could also where appropriate include a vertical position (z coordinate), e.g. in the case of a three-dimensional texture. This position data is in an embodiment in the form of a position index, and in an embodiment comprises at least an (x, y) position (index), but may also comprise a z position (index) (such that the cache line will be tagged with the x, y, z position of the texture data that is stored in the cache line)).
Regarding claims 7 and 18, Fielding teaches the indication comprises a set of swizzle parameters identifying a corresponding set of data element components (section 0246-0247; section 0303; the input parameter fetching unit 15 may, for example, read in the parameters of the texture to be sampled and the parameters of how to sample the texture from appropriate state information for the texture).
Regarding claims 8 and 19, Fielding teaches the cache is constrained to store data elements according to one of a predetermined set of data formats, and wherein the indication indicates which one of these predetermined set of data formats is used for the data in the cache line (section 0070; section 0252; The second cache 23 (the texel cache) of the texture cache system 21 stores the texture data grouped as respective texels, and stores each texel using one of a set of particular, predefined, supported texel data formats. Examples of such formats would be, for example, R5G6B5, R4G4B4A4, R8G8B8A8, Y8U8V8A8, Y16U16V16A16, and so on (where the letter indicates the data channel and the number indicates the number of bits stored for that data channel)).
Regarding claims 9 and 20, Fielding teaches the data is stored in the memory in a compressed format, and wherein the data is stored in the cache in an uncompressed format in which it is used by the data processor when performing a data processing operation, wherein when data in the compressed format is decompressed for storage in the cache, the decompressed data comprises multicomponent data (section 69-0070; the texture data is stored in the second cache in an uncompressed form (e.g., and in particular, where the texture data is stored in the memory in a compressed form. The texture data is in an embodiment stored in the second cache of the cache system in one of a number of predefined texture formats, e.g., and in an embodiment, corresponding to particular arrangements and positions for the texture data components (channels) (e.g. RGB or YUV) being used).
Regarding claim 10, Fielding teaches the data processor is a graphics processor that is operable to generate a render output (section 0027-0039), wherein when generating a render output the graphics processor is configured to perform texturing operations that apply texture data to respective sampling positions within the render output (section 0184-0186); and wherein the data of the first type thus multicolour texture data including a plurality of colour channels, and wherein the cache is operable to store subsets of less than all of the colour channels of a texture data element (section 0071; the texture data is stored in the second cache such that all the texture data components (e.g. colour channels) for a given texel (texture data element) in the texture are stored together as a group (e.g. in a contiguous sequence of bits) in the second cache).
Allowable Subject Matter
Claims 4-5 and 15-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance:
The limitations not found in the prior art of record include the data processor is configured to perform, during the data processing operation, a swizzle operation that identifies which component values are required for the data processing operation, and wherein one or more swizzle parameters are included in the cache lookup request to provide the cache with an indication of which component values are presently required for the data processing operation in combination with the other claimed limitations as described in the claims 4 and 15.
The limitations not found in the prior art of record include the cache is configured to merge the component values indicated in the cache lookup request with other component values for the same data element that are already stored in the cache and to allocate a new single cache line for the merged set of component values for the data element in combination with the other claimed limitations as described in the claims 5 and 16.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
When responding to the office action, Applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present in view of the state of the art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections. See 37 C.F.R. 1.111 (c).
When responding to the office action, Applicants are advised to provide the examiner with the line numbers and page numbers in the application and/or references cited to assist examiner to locate the appropriate paragraphs.
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/HUA J SONG/Primary Examiner, Art Unit 2133