Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Examiner cites particular columns or paragraphs, and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
In reply to the Final Office Action mailed on 10/23/2025, the applicant has filed a response on 1/15/2026 amending claims 1, 3, 6 and 8. Claims 11, 13, 17-18, 24 and 26 have been cancelled. No claim has been added. Claims 1-10, 12, 14-16, 19-23 and 25 are pending in this application.
Previous claim objections are withdrawn in view of applicant’s amendments filed on 1/15/2026.
Claim Objections
Claims 6-10, 14-16, 23 and 25 are objected to because of the following informalities:
Regarding claim 6, it recites “connected to constant voltage terminal” in line 2, which appear to be “connected to the constant voltage terminal”. Appropriate correction is required.
Regarding claims 7-9 and 14-15, these are objected based on their dependence from claim 6.
Regarding claim 10, it recites “a second electrode of the second storage capacitor” in lines 1-2, which appear to be “the second electrode of the second storage capacitor”. Appropriate correction is required.
Regarding claim 16, it is objected based on its dependence from claim 10.
Regarding claim 23, it recites “… a second electrode of the second storage capacitor receives a constant voltage from a constant voltage terminal” in lines 6-7, which appears to be “… the second electrode of the second storage capacitor receives a constant voltage from the constant voltage terminal”. Appropriate correction is required.
Regarding claim 25, it is objected based on its dependence from claim 23.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 16 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 16, it carries the new limitation in claim 1 of “the second electrode of the first switching transistor and the second electrode of the second storage capacitor are not electrically connected with each other” along with “a second electrode of the second storage capacitor is electrically connected to the first electrode of the light-emitting element…” in claim 10. The new added limitations recited in claim 1 along with the limitations in claim 10 are directed to Fig 15. However, Fig. 15 does not disclose the limitation “the second compensation circuit further comprises a second switching transistor, the second electrode of the second storage capacitor is electrically connected to a first electrode of the second switching transistor, and a second electrode of the second switching transistor is electrically connected to the light-emitting element”, as claimed in claim 16, which simultaneously depends from claim 10 and amended claim 1.
The specification supports in Fig. 15 only, the newly added limitation of the second electrode of the first switching transistor (T6) and the second electrode of the second storage capacitor (C2) are not electrically connected with each other in claim 1, while the second electrode of the second storage capacitor (C2) is electrically connected to the first electrode of the light-emitting element (OLED), in claim 10, through transistor T4. However, it does not describe or show “the second compensation circuit further comprises a second switching transistor, the second electrode of the second storage capacitor is electrically connected to a first electrode of the second switching transistor, and a second electrode of the second switching transistor is electrically connected to the light-emitting element”, as claimed in claim 16, which simultaneously depends from claim 10 and amended claim 1.
Therefore, claim 16 contains subject matter which was in conflict with Fig.15, because claim 16 discloses the second compensation circuit further comprises a second switching transistor, the second electrode of the second storage capacitor is electrically connected to a first electrode of the second switching transistor, and a second electrode of the second switching transistor is electrically connected to the light-emitting element.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-10, 14-16 and 19-22 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shen et al. (CN 115966172 A), provided by the applicant on the record, machine translation provided by the examiner and referenced throughout the rejection.
Regarding claim 1, Shen discloses a pixel circuit (see pixel circuit in Fig. 2), comprising:
a driving circuit, comprising a control terminal, a first terminal and a second terminal, and configured to control a magnitude of driving current flowing through the first terminal and the second terminal (see circuit comprising transistor T1 in Fig. 2; “the first transistor T1 is a double-gate type transistor, the drain of the first transistor T1 is configured to input the power supply voltage, the source electrode of the first transistor T1 is connected with the light emitting module LED”; “That is to say, if the first transistor T1 is turned on, then the power supply voltage can be directly input to the light emitting module, LED as to light the light emitting module LED” with current I; page 5, 6th paragraph; page 6, 3rd paragraph);
a light-emitting element, configured to emit light upon being driven by the driving current, wherein the first terminal of the driving circuit is electrically connected to a first electrode of the light-emitting element, and the driving circuit is configured to control a magnitude of driving current flowing through the light-emitting element (see light emitting module LED in Fig. 2; “the source electrode of the first transistor T1 is connected with the light emitting module LED”; “That is to say, when the first transistor T1 is turned on, then the power supply voltage can be directly input to the light emitting module, LED as to light the light emitting module LED” with current I; page 5, 6th paragraph; page 6, 3rd paragraph);
a first compensation circuit (see circuit comprising transistor T4 and capacitor Cth in Fig. 2), configured to apply a reference signal to the control terminal of the driving circuit in response to a first compensation control signal (“In the compensation stage, the top gate of the first transistor T1 is connected with the source, the bottom gate of the first transistor T1 inputs the reference voltage, so that the first capacitor Cth stores the threshold voltage of the first transistor T1”; “the fourth transistor T4 is used for controlling the on-off between the Vref end and the bottom gate of the first transistor T1” in response to Sense signal; page 5, 9th paragraph; page 6, 9th paragraph), wherein the first compensation circuit comprises a first storage capacitor, and a first electrode of the first storage capacitor is electrically connected to the control terminal of the driving circuit, and a second electrode of the first storage capacitor is electrically connected to the first terminal of the driving circuit (see Cth in Fig. 2; “the first end of the first capacitor Cth is connected with the bottom gate of the first transistor T1, the second end of the first capacitor Cth is connected with the source electrode of the first transistor T1”; page 5, 8th paragraph); and
a second compensation circuit, comprising a second storage capacitor and a first switching transistor (see circuit comprising capacitor Cst and transistor T7 in Fig. 2), wherein a first electrode of the first switching transistor is connected to a first electrode of the second storage capacitor (see in Fig. 2 first electrode of T7 connected to first electrode of capacitor Cst at node s), one of a second electrode of the first switching transistor and a second electrode of the second storage capacitor is connected to the first terminal of the driving circuit (see e.g. in Fig. 2 a second electrode of Cst is connected to the source electrode of the first transistor T1 at node s, through transistor T3), and the other one of the second electrode of the first switching transistor and the second electrode of the second storage capacitor is connected to a constant voltage terminal (see e.g. in Fig. 2 a second electrode of T7 is connected to constant voltage terminal Vinit), a gate electrode of the first switching transistor is configured to receive a second compensation control signal, and the second compensation circuit is configured to compensate the driving circuit in response to the second compensation control signal (regarding Figs. 2-4, a gate electrode of T7 connected to control signal Scan and “the third transistor T3 and the fourth transistor T4 are configured to be conducted in the compensation stage”, during which T7 is turned off according to control signal Scan to compensate the first transistor T1; page 7, 2nd to 3rd paragraphs, and 6th paragraph; page 8, 1st and 8th to 9th paragraphs),
wherein the first switching transistor is connected in series with the second storage capacitor to form a series circuit with the second electrode of the first switching transistor and the second electrode of the second storage capacitor at the two ends of the series circuit, and the second electrode of the first switching transistor and the second electrode of the second storage capacitor are not electrically connected with each other (as shown in Fig. 2, and based on the broadest reasonable interpretation of the claimed limitations, T7 is connected in series with Cst to form a series circuit, with the second electrode of T7 and the second electrode of Cst at the two ends of the series circuit, and the second electrode of T7 and the second electrode of Cst not directly electrically connected with each other).
Regarding claim 2, Shen discloses all the claim limitations as applied above (see claim 1). In addition, Shen discloses the driving circuit comprises a driving transistor, a gate electrode of the driving transistor serves as the control terminal of the driving circuit and is electrically connected to a first node, and a first electrode of the driving transistor serves as the first terminal of the driving circuit and is electrically connected to a second node, and the second electrode of the driving transistor serves as the second terminal of the driving circuit and is electrically connected to a third node (see circuit comprising transistor T1 in Fig. 2; “the first transistor T1 is a double-gate type transistor, the drain of the first transistor T1 is configured to input the power supply voltage, the source electrode of the first transistor T1 is connected with the light emitting module LED”; see in Fig. 2 the control terminal of transistor T1 comprises node g and node b, and nodes at either of the two other terminals/electrodes of transistor T1; page 5, 6th paragraph; page 5, 11th paragraph to page 6, 1st paragraph; page 6, 3rd paragraph).
Regarding claim 3, Shen discloses all the claim limitations as applied above (see claim 2). In addition, Shen discloses the second electrode of the first switching transistor is electrically connected to the second node (see in Fig. 2 the second electrode of T7 is connected to node s through transistors T5 and T2).
Regarding claim 4, Shen discloses all the claim limitations as applied above (see claim 2). In addition, Shen discloses the second electrode of the second storage capacitor is electrically connected to the second node (see e.g. in Fig. 2 the second electrode of Cst is connected to node s through transistor T3).
Regarding claim 5, Shen discloses all the claim limitations as applied above (see claim 2). In addition, Shen discloses a reset circuit (see reset circuit comprising transistor T5 in Fig. 2), wherein a control terminal of the reset circuit is configured to receive a reset control signal (see in Fig. 2 a control terminal of T5 receives Sense signal), a first terminal of the reset circuit is electrically connected to the first electrode of the light-emitting element (see in Fig. 2 “end of the fifth transistor T5 is connected with the light emitting module LED”; page 7, 4th paragraph), and a second terminal of the reset circuit is electrically connected to a reset signal terminal to receive a reset signal (see in Fig. 2 “end of the fifth transistor T5… configured to input the initial signal” from Vinit; page 7, 4th to 5th paragraph), and the reset circuit is configured to apply the reset signal to the first electrode of the light-emitting element and the first terminal of the driving circuit in response to the reset control signal (“during the reset stage before the compensation stage…when the fifth transistor T5 is turned on, the initial signal can pull the potential of s point and g point, to reset the potential of the s point and g point”; “The initial signal end corresponds to the Vinit end in FIG. 2”; “the fifth transistor T5 [is] for controlling the on-off between the initial signal and the light emitting module LED”; page 7, 4th to 5th paragraphs; page 8, 6th to 7th paragraphs);
the reset circuit comprises a reset transistor, a gate electrode of the reset transistor is electrically connected to a reset control terminal to receive the reset control signal, and a first electrode of the reset transistor is electrically connected to the first electrode of the light-emitting element, a second electrode of the reset transistor is electrically connected to the reset signal terminal to receive the reset signal (see in Fig. 2 transistor T5, control terminal of T5 receives Sense signal, an “end of the fifth transistor T5 is connected with the light emitting module LED”, and another “end of the fifth transistor T5… configured to input the initial signal” from Vinit; page 7, 4th to 5th paragraph).
Regarding claim 6 Shen discloses all the claim limitations as applied above (see claim 5). In addition, Shen discloses the second electrode of the second storage capacitor is electrically connected to constant voltage terminal to receive a constant voltage from the constant voltage terminal (as shown in Figs. 2-4, see that during the reset stage “the potential signal of the Vinit end can be written to the s point and g point”, because “the second transistor T2, the third transistor T3,… and the fifth transistor T5 are conducted”, that is, e.g. the second electrode of capacitor Cst connected to node g is connected to constant voltage terminal Vinit; page 8, 6th to 7th paragraphs).
Regarding claim 7 Shen discloses all the claim limitations as applied above (see claim 6). In addition, Shen discloses the second electrode of the first switching transistor is electrically connected to the second node (see in Fig. 2 the second electrode of T7 is connected to node s through transistors T5 and T2), and the second electrode of the second storage capacitor is electrically connected to the constant voltage terminal (as shown in Figs. 2-4, see that during the reset stage “the potential signal of the Vinit end can be written to the s point and g point”, because “the second transistor T2, the third transistor T3,… and the fifth transistor T5 are conducted”, that is, e.g. the second electrode of capacitor Cst connected to node g is connected to constant voltage terminal Vinit; page 8, 6th to 7th paragraphs).
Regarding claim 8 Shen discloses all the claim limitations as applied above (see claim 6). In addition, Shen discloses the second electrode of the second storage capacitor is electrically connected to the second node (see e.g. in Fig. 2 the second electrode of Cst is connected to node s through transistor T3), the second electrode of the first switching transistor is electrically connected to the constant voltage terminal (see e.g. in Fig. 2 the second electrode of T7 is connected to the constant voltage terminal Vinit).
Regarding claim 9, Shen discloses all the claim limitations as applied above (see claim 6). In addition, Shen discloses the reset transistor serves as the first switching transistor (regarding Figs. 2-4, at the reset stage, transistor T5 serves in the same way as the claimed first switching transistor because it provides Vinit to node s, based on the broadest reasonable interpretation; page 8, 7th paragraph), and the reset control signal serves as the second compensation control signal (regarding Figs. 2-4, a control terminal of T5 receives Sense signal during compensation of the first transistor T1, thus also serving as the claimed second compensation control signal, based on the broadest reasonable interpretation; during the “Compensation Phase”, reset control signal from “Sense end in FIG. 2” connected to the control terminal of reset transistor T5 also “controls the on-off of the third transistor T3 and the fourth transistor T4” to compensate the first transistor T1; page 7, 2nd to 3rd paragraphs, and 6th paragraph; page 8, 8th to 9th paragraphs),
and the reset signal terminal which is electrically connected to the second electrode of the reset transistor serves as the constant voltage terminal (see in Fig. 2 “end of the fifth transistor T5… configured to input the initial signal” from Vinit as the constant voltage end; page 7, 4th to 5th paragraph; page 8, 6th to 7th paragraphs);
the second electrode of the second storage capacitor is electrically connected to the second node (see e.g. in Fig. 2 the second electrode of Cst is connected to node s through transistor T3), and the first electrode of the second storage capacitor is electrically connected to the first electrode of the reset transistor (see in Fig. 2 the first electrode of capacitor Cst at node s connected to the first electrode of T5 through transistor T2).
Regarding claim 10, Shen discloses all the claim limitations as applied above (see claim 5). In addition, Shen discloses a second electrode of the second storage capacitor is electrically connected to the first electrode of the light-emitting element (regarding Figs. 2-4, see e.g. the second electrode of Cst at node g is connected to the first electrode of light emitting module LED through transistors T3 and T2 since “at the reset stage,… the second transistor T2, the third transistor T3, the fourth transistor T4 and the fifth transistor T5 are conducted”; page 8, 7th paragraph), and the first electrode of the reset transistor is electrically connected to the first electrode of the light-emitting element (see in Fig. 2 “end of the fifth transistor T5… is connected with the light emitting module LED”).
Regarding claim 14, Shen discloses all the claim limitations as applied above (see claim 6). In addition, Shen discloses the gate electrode of the first switching transistor is electrically connected to the gate electrode of the reset transistor, and the first switching transistor shares the gate electrode with the reset transistor, the reset control signal serves as the second compensation control signal, and a type of the first switching transistor is the same as a type of the reset transistor; or,
the gate electrode of the first switching transistor and the gate electrode of the reset transistor are independent of each other and not electrically connected to each other (see in Fig. 2 the gate electrode of T7 connected to Scan and the gate electrode of T5 connected to Sense, thus being independent of each other and not electrically connected).
Regarding claim 15, Shen discloses all the claim limitations as applied above (see claim 6). In addition, Shen discloses the second compensation circuit further comprises a second switching transistor (see transistor T3 in Fig. 2),
a first electrode of the second switching transistor is electrically connected to the second electrode of the second storage capacitor (see in Fig. 2 a first electrode of transistor T3 is connected to the second electrode of capacitor Cst at node g), and a second electrode of the second switching transistor is electrically connected to the constant voltage terminal (regarding Fig. 2, see a second electrode of transistor T3 connected to “the potential signal of the Vinit end” e.g. through T7).
Regarding claim 16, Shen discloses all the claim limitations as applied above (see claim 10). In addition, Shen discloses the second compensation circuit further comprises a second switching transistor (see transistor T3 in Fig. 2),
the second electrode of the second storage capacitor is electrically connected to a first electrode of the second switching transistor (regarding Fig. 2, see the second electrode of capacitor Cst is connected to a first electrode of transistor T3 at node g), and a second electrode of the second switching transistor is electrically connected to the first electrode of the light-emitting element (regarding Fig. 2, see second electrode of transistor T3 connected to the first electrode of light emitting module LED through transistor T2).
Regarding claim 19, Shen discloses all the claim limitations as applied above (see claim 2). In addition, Shen discloses a control terminal of the first compensation circuit is configured to receive the first compensation control signal, and a first terminal of the first compensation circuit is electrically connected to a reference signal terminal to receive the reference signal (see in Fig. 2, control terminal of transistor T4 receives signal Sense, and a first terminal of transistor T4 is connected to terminal to receive Vref; page 6, 9th paragraph),
the first compensation circuit comprises a first compensation transistor (see transistor T4 and capacitor Cth in Fig. 2), a gate electrode of the first compensation transistor is electrically connected to a first compensation control signal terminal to receive the first compensation control signal, a first electrode of the first compensation transistor is electrically connected to the reference signal terminal to receive the reference signal, and a second electrode of the first compensation transistor is electrically connected to the first node (see in Fig. 2, control/gate terminal of transistor T4 receives signal Sense, first terminal/electrode of transistor T4 is connected to terminal to receive Vref, and second electrode of transistor T4 connected to the control terminal of transistor T1 which comprises node g and node b; page 5, 6th paragraph; page 5, 11th paragraph to page 6, 1st paragraph; page 6, 3rd paragraph; page 6, 9th paragraph).
Regarding claim 20, Shen discloses all the claim limitations as applied above (see claim 1). In addition, Shen discloses a display device, comprising the pixel circuit according to claim 1 (see Abstract; page 4, 1st paragraph; Fig. 2; “The application claims a pixel circuit, a driving method and a display device”).
Regarding claim 21, Shen discloses all the claim limitations as applied above (see claim 1). In addition, Shen discloses a driving method, suitable for the pixel circuit according to claim 1 (see Abstract; page 4, 1st paragraph; Figs. 2-4; “The application claims a pixel circuit, a driving method and a display device”), the driving method comprising:
in a data writing stage, making the second compensation control signal be a turn-on signal to turn on the first switching transistor (regarding Figs. 2-4, see that in t4 stage of a data writing stage, the control signal Scan is a turn-on signal to turn on transistor T7; page 8, 10th to 11th paragraphs);
upon entering a light-emitting stage from the data writing stage, making the second compensation control signal be switched from a turn-on signal to a turn-off signal to turn off the first switching transistor, wherein, in the light-emitting stage, the second compensation control signal remains as the turn-off signal (regarding Figs. 2-4, see upon entering a Luminescent stage at s400 at t5 stage, making the control signal Scan be switched from a turn-on signal to a turn-off signal to turn off transistor T7, wherein in the Luminescent stage 400 corresponding to t5 and t6 stages, the control signal Scan remains as the turn-off signal; page 8, 12th paragraph, to page 9, 2nd paragraph).
Regarding claim 22, Shen discloses all the claim limitations as applied above (see claim 21). In addition, Shen discloses the pixel circuit further comprises a data writing circuit, a control terminal of the data writing circuit is configured to receive a data scan signal, a first terminal of the data writing circuit is electrically connected to a data signal terminal to receive a data signal, a second terminal of the data writing circuit is electrically connected to a first node, and the data writing circuit is configured to write the data signal into the control terminal of the driving circuit in response to the data scan signal (see circuit comprising transistor T6; “the sixth transistor T6 of the first end is configured to input data signal, the sixth transistor T6 of the second end is connected between the top gate of the first transistor T1 and the second capacitor Cst. wherein the sixth transistor T6 is configured to be conducted in the writing stage”; “Specifically, the sixth transistor T6 is connected between the data input end and the second capacitor Cst. and is further provided with a third control end, the third control end is used for controlling the on-off of the sixth transistor T6, so as to control whether the data input end input data signal to the second capacitor Cst”; “The third control end corresponds to the Scan end in FIG. 2”; page 7, 10th to 11th paragraphs),
the driving method further comprises:
in the data writing stage, making the data scan signal be a turn-on signal to write the data signal to the control terminal of the driving circuit (regarding Figs. 2-4, see the Scan end provides the control signal to turn on the sixth transistor T6 to write the input data signal to the top gate of the first transistor T1 during t4 ); and
upon entering the light-emitting stage from the data writing stage, making the data scan signal be switched from the turn-on signal to a turn-off signal to turn off the data writing circuit and the first switching transistor simultaneously, wherein in the light-emitting stage, the data scan signal remains as the turn-off signal (regarding Figs. 2-4, upon entering a Luminescent stage at s400, the control signal from the Scan end is switched to and remains in an off state to turn off transistors T6 and T7).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shen et al. (CN 115966172 A), provided by the applicant on the record, machine translation provided by the examiner and referenced throughout the rejection, in view of Ma (US 2021/0366383).
Regarding claim 12, Shen discloses all the claim limitations as applied above (see claim 5). In addition, Shen discloses the pixel circuit further comprises a second light-emitting control circuit (see circuit comprising transistor T2 in Fig. 2), a control terminal of the second light-emitting control circuit is configured to receive a second light-emitting control signal (see control end of transistor T2 receives control signal from the EM end in Fig. 2 during t1 and t6 stages; page 6, 5th to 7th paragraphs), a first terminal of the second light-emitting control circuit is electrically connected to the second node (“the first end of the second transistor T2 is connected with the source of the first transistor T1” at node s, as shown in Fig. 2; page 6, 5th to 7th paragraphs), a second terminal of the second light-emitting control circuit is electrically connected to the first electrode of the light-emitting element (“the second end of the second transistor T2 is connected with the light emitting module LED”, as shown in Fig. 2; page 6, 5th to 7th paragraphs), and the second light-emitting control circuit is configured to apply the driving current to the light-emitting element in response to the second light-emitting control signal (regarding Figs. 2-4, “the source electrode of the first transistor T1 is connected with the light emitting module LED” through the second transistor T2 during t6; “the first transistor T1 is turned on, then the power supply voltage can be directly input to the light emitting module LED as to light the light emitting module LED” with current I; page 5, 6th paragraph; page 6, 3rd and 5th paragraph; page 9, 2nd paragraph) and allow the reset signal to be applied to the first terminal of the driving circuit (regarding Figs. 2-4, “the second transistor T2, the third transistor T3, the fourth transistor T4 and the fifth transistor T5 are configured to be turned on during the reset stage” such that “At this time, the potential signal of the Vinit end can be written to the s point” at the first terminal of T1);
the second light-emitting control circuit comprises a second light-emitting control transistor (see transistor T2 in Fig. 2), a gate electrode of the second light-emitting control transistor is electrically connected to a second light-emitting control terminal to receive the second light-emitting control signal (see control/gate end of transistor T2 receives control signal from the EM end in Fig. 2 during t1 and t6 stages; page 6, 5th to 7th paragraphs), and a first electrode of the second light-emitting control transistor is electrically connected to the second node (“the first end of the second transistor T2 is connected with the source of the first transistor T1” at node s, as shown in Fig. 2; page 6, 5th to 7th paragraphs), a second electrode of the light-emitting control transistor is electrically connected to the first electrode of the light-emitting element (“the second end of the second transistor T2 is connected with the light emitting module LED”, as shown in Fig. 2; page 6, 5th to 7th paragraphs), and a second electrode of the light-emitting element is electrically connected to a second voltage terminal to receive a second power supply voltage (see electrode of light emitting module LED connected to VSS end to receive a ground voltage; page 5, 5th paragraph),
wherein the gate electrode of the first switching transistor is electrically connected with the gate electrode of the second light-emitting control transistor, and the first switching transistor shares the gate electrode with the second light-emitting control transistor, the second light-emitting control signal serves as the second compensation control signal, and a type of the first switching transistor is different from a type of the second light-emitting control transistor; or
the gate electrode of the first switching transistor and the gate electrode of the second light-emitting control transistor are independent of each other and not electrically connected to each other (see in Fig. 2 the gate electrode of T7 connected to Scan and the gate electrode of T2 connected to EM, thus being independent of each other and not electrically connected).
However, Shen does not appear to expressly disclose the pixel circuit further comprises a first light-emitting control circuit, a control terminal of the first light-emitting control circuit is configured to receive a first light-emitting control signal, a first terminal of the first light-emitting control circuit is electrically connected to the second terminal of the driving circuit, and a second terminal of the first light-emitting control circuit is electrically connected to a first voltage terminal to receive a first power supply voltage, the first light-emitting control circuit is configured to apply the first power supply voltage to the second terminal of the driving circuit in response to the first light-emitting control; the second light-emitting control signal being different from the first light-emitting control signal.
Ma discloses a pixel circuit further comprises a first light-emitting control circuit, a control terminal of the first light-emitting control circuit is configured to receive a first light-emitting control signal, a first terminal of the first light-emitting control circuit is electrically connected to a second terminal of a driving circuit, and a second terminal of the first light-emitting control circuit is electrically connected to a first voltage terminal to receive a first power supply voltage, the first light-emitting control circuit is configured to apply the first power supply voltage to the second terminal of the driving circuit in response to the first light-emitting control signal (regarding Figs. 4, 6 and 7, see first light emission control circuit 700 implemented as the fourth transistor T4, receiving a first light-emitting control signal Em1, with a first terminal connected to second terminal of driving circuit comprising transistor T1, and a second terminal connected to terminal VDD, and configured to apply voltage from VDD to the second terminal of T1 in response to Em1; para[0059]; para[0069]-para[0070]); a second light-emitting control signal being different from the first light-emitting control signal (see in Figs. 4, 6 and 7 Em2 being different than Em1).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings in Shen’s invention, with the teachings in Ma’s invention, to have the pixel circuit further comprises a first light-emitting control circuit, a control terminal of the first light-emitting control circuit is configured to receive a first light-emitting control signal, a first terminal of the first light-emitting control circuit is electrically connected to the second terminal of the driving circuit, and a second terminal of the first light-emitting control circuit is electrically connected to a first voltage terminal to receive a first power supply voltage, the first light-emitting control circuit is configured to apply the first power supply voltage to the second terminal of the driving circuit in response to the first light-emitting control; the second light-emitting control signal being different from the first light-emitting control signal, for the advantage of increased control in charging the source terminal of the driving circuit/transistor by the first power supply voltage through the driving circuit during a compensation stage (e. g. before a light emitting stage), in order to compensate the threshold voltage of the driving transistor, while also allowing the light emitting element to emit light only in the light emitting stage, thus avoiding a phenomena that the light emitting element generates weak light in a non-light emitting stage (e.g., the compensation stage and the data writing stage), so that a contrast of a display device adopting the pixel circuit is increased and the display effect is improved. (para[0059]; para[0061]).
Allowable Subject Matter
Claims 23 and 25 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, and upon overcoming the above claim objections.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 23, Shen discloses all the claim limitations as applied above (see claim 21). However, the prior art, taken alone or in combination, fails to teach or suggest the following limitations in combination with the rest of the claim, that is, the claim as a whole: “in a compensation stage before the data writing stage, making the second compensation control signal be a turn-on signal to turn on the first switching transistor, and the second compensation circuit is configured to compensate the driving circuit in response to the second compensation control signal, wherein, in the compensation stage, a second electrode of the second storage capacitor receives a constant voltage from a constant voltage terminal”, as claimed in claim 23.
Regarding claim 25, it would be allowed at least based on its dependence from claim 23.
Response to Arguments
Applicant's arguments filed on 1/15/2026 have been fully considered but they are not persuasive.
Regarding claim 1, the applicant argues on pages 10-11 of the remarks that “Shen fails to disclose the… features in the amended claim 1”. The examiner respectfully disagrees. As shown in the above rejection which has been modified in the same fashion as the amended claims, Shen discloses the first switching transistor is connected in series with the second storage capacitor to form a series circuit with the second electrode of the first switching transistor and the second electrode of the second storage capacitor at the two ends of the series circuit, and the second electrode of the first switching transistor and the second electrode of the second storage capacitor are not electrically connected with each other (as shown in Fig. 2, and based on the broadest reasonable interpretation of the claimed limitations, T7 (claimed first switching transistor) is connected in series with Cst to form a series circuit, with the second electrode of T7 and the second electrode of Cst at the two ends of the series circuit, and the second electrode of T7 and the second electrode of Cst not directly electrically connected with each other).
Regarding claim 21, the applicant argues on pages 11-12 of the remarks that “the applicant respectfully disagrees with the interpretation of claim 21 because there is an action of "switching" from one signal to another signal upon entering the light-emitting stage”, and because “Shen, according to Fig. 4, discloses that during all of the stages t3, t4 and t5 and the stage t6 (emission), the sense signal is retained at the same signal, which is different from switching the signal upon entering the light-emitting stage in claim 21”. As shown in the above rejection which has been modified in the same fashion as the amended claims, Shen discloses upon entering a light-emitting stage from the data writing stage, making the second compensation control signal be switched from a turn-on signal to a turn-off signal to turn off the first switching transistor, wherein, in the light-emitting stage, the second compensation control signal remains as the turn-off signal (regarding Figs. 2-4, see upon entering a Luminescent stage at s400 at t5 stage, making the control signal Scan be switched from a turn-on signal to a turn-off signal to turn off transistor T7, wherein in the Luminescent stage 400 corresponding to t5 and t6 stages, the control signal Scan remains as the turn-off signal; page 8, 12th paragraph, to page 9, 2nd paragraph).
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/GLORYVID FIGUEROA-GIBSON/Patent Examiner, Art Unit 2623
/CHANH D NGUYEN/Supervisory Patent Examiner, Art Unit 2623