DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10/08/2025. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Response to Arguments
Applicant's arguments filed 10/14/2025 have been fully considered but they are not persuasive.
Applicant argues that Thai et al [US 2021/0075122 A1] does not teach or discloses “An antenna comprising: a printed circuit board (PCB) structure including a plurality of dielectric layers and conductive layers; a beamforming integrated circuit (IC) formed on one side of the PCB structure; and a patch antenna radiating element formed at an opposite side of the PCB structure from the beamforming IC, wherein one of the dielectric layers is formed over the radiating element so that the radiating element is buried.” (see page 4-6)
Examiner disagrees:
In response to applicant's arguments against the references individually Thai et al [US 2021/0075122 A1], one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986).
In response to applicant's argument that the references fail to show certain features of the invention that Thai et al [US 2021/0075122 A1] does not teach “beamforming”, Examiner disagree:
Thai discloses High frequency communications, such as mmWave, suffer from high free space path loss. Antenna array beamforming can be used to compensate this loss by increasing the antenna gain. However, user devices such as smart phones are highly mobile and therefore subject to being held at a variety of different orientations. Embodiments of the present techniques provide 360-degree antenna coverage to account for the device mobility. More specifically, various antenna designs are described which can be incorporated in a user device to provide both broadside and end-fire radiation relative to the phone's planar face. In this way, the antenna gain can be increased in the direction of other devices that that the device is attempting to communicate with, such as WiFi access points, cell towers, and others. (see paragraph [0040])
In response to applicant's argument that the references fail to show certain features of the invention that Thai et al [US 2021/0075122 A1] does not teach “Applicant submits that Thai does not teach or suggest a dielectric layer formed over a patch antenna radiating element as claimed.”
Thai discloses in FIG. 10A is a perspective view of an example broadside open slot antenna. The broadside open slot antenna 1000 is configured to radiate in the broadside direction, i.e. perpendicular to the plane of the antenna. Additionally, the antenna 1000 is configured to provide dual polarization. The antenna 1000 includes a conductive ground plane 1002 disposed over a reflector 1004. Instead of directing the radiation pattern to the end-fire direction, the radiation of the antenna is directed to the broadside by the reflector 1004. The antenna will also include one or more dielectric layers separating the ground layer 1002 and the reflector 1004. (see paragraph [00064])
Thai discloses wherein one of the dielectric layers is formed over the radiating element so that the radiating element is buried (in fig 10B, the dielectric layer 1018 is placed above the ground layer 1002, and in fig 10B, the ground layer 1910 is underneath the patches 1904, 1906, 1908; the combination of figs 10B and 19B show the dielectric layer formed over the ground layer formed over the patches, and therefore, the patches are buried; paras [0070], (0091]).
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as broadly as claimed, the prior art of record Thai still discloses claim1. Thai discloses an antenna (Abstract) comprising:
a printed circuit board (PCB) structure including a plurality of dielectric layers and conductive layers (the PCB includes stacked layers comprising dielectric layers 310,312 and metal layers 314, 326; figs 3A, 3B, 3C; paras [0052]-[0055]);
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Thai does not specify in Fig. 3a-c a beamforming integrated circuit (IC) formed on one side of the PCB structure; a patch antenna radiating element formed at an opposite side of the PCB structure from the beamforming IC; wherein one of the dielectric layers is formed over the radiating element so that the radiating element is buried.
Thai discloses a beamforming integrated circuit (IC) formed on one side of the PCB structure (radio frequency integrated circuit, "RFIC", die 2102 (beamforming IC) disposed (formed) on a first side of the circuit board; para [0136]); and
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a patch antenna radiating element formed at an opposite side of the PCB structure from the beamforming IC (the antenna 1900 includes three patches 1904, 1906, 1908 (radiating element) disposed over a ground layer 1910 of the circuit board; each die is coupled to an antenna on the opposite side of the circuit board; fig 19B; paras [0091], (0099]), wherein one of the dielectric layers is formed over the radiating element so that the radiating element is buried (in fig 10B, the dielectric layer 1018 is placed above the ground layer 1002, and in fig 10B, the ground layer 1910 is underneath the patches 1904, 1906, 1908; the combination of figs 10a-10B and 19B show the dielectric layer formed over the ground layer formed over the patches, and therefore, the patches are buried; paras [0070], (0091]).
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To further explain, Thai discloses In FIG. 10B, the ground plane 1002 includes circular cutouts 1016 on either side of each resonant slot 1007 to improve isolation between the resonant slots and thus the two polarizations. The cuts act as resonant chokes along the edges of the slots to isolate the excitation of one slot from the other slot. the top metal layer is the slotted ground plane 1002, the next metal layer includes the microstrip lines 1008, and the bottom layer is the reflector 1004. Also shown in FIG. 10B are the dielectric layers 1018 between the metal layers. To minimize the size of the resonant slots, the dielectric layers may be formed from substrates having a high permittivity value, for example, relative permittivity greater than 6. In some embodiments, there may be also be a layer of dielectric substrate 1018 placed above the ground layer 1002. This allows the slots to be further reduced in size by loading the resonant slots with higher dielectric material. (see paragraph [0069-70])
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Thereby Thai discloses the dielectric layers 1018 between the metal layers covers slot antenna that includes the ground plane 1002 includes circular cutouts 1016 on either side of each resonant slot 1007 to improve isolation between the resonant slots and thus the two polarizations (see figure 10a to 10b) then Thai would discloses the limitations of claim 1, wherein one of the dielectric layers is formed over the radiating element so that the radiating element is buried (in fig 10B, the dielectric layer 1018 is placed above the ground layer 1002, and in fig 10B, the ground layer 1910 is underneath the patches 1904, 1906, 1908; the combination of figs 10a-10B and 19a-19B show the dielectric layer formed over the ground layer formed over the patches, and therefore, the patches are buried; paras [0070], (0091]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to modify Thai with a beamforming integrated circuit (IC) formed on one side of the PCB structure; a patch antenna radiating element formed at an opposite side of the PCB structure from the beamforming IC; wherein one of the dielectric layers is formed over the radiating element so that the radiating element is buried for purpose of improves frequency diversity for improved reliability, reduces the antenna count per platform, minimizes the RF package size, and allows more space for the antenna array to provide more effective beam scanning coverage as disclosed by Thai (Paragraph [0041]).
as broadly as claimed, the prior art of record Thai still discloses claims 8. Thai discloses a phased array antenna (the antenna is an antenna array providing beam scanning coverage (phased); paras (0041], (0081]) comprising:
a printed circuit board (PCB) structure including a plurality of dielectric layers and conductive layers (the PCB includes stacked layers comprising dielectric layers 310,312 and metal layers 314,326; figs 3A, 3B, 3C; paras [0052]-[0055]);
Thai does not specify in Fig. 3a-c, a beamforming integrated circuit (IC) formed on one side of the PCB structure, a patch antenna radiating element formed at an opposite side of the PCB structure from the beamforming IC, wherein one of the dielectric layers is formed over the radiating element so that the radiating element is buried and another one of the dielectric layers is formed over the one dielectric layer formed over radiating element; said another one of the dielectric layers being etched to form an aperture in front of the patch antenna radiating element.
Thai discloses a beamforming integrated circuit (IC) formed on one side of the PCB structure (radio frequency integrated circuit, "RFIC", die 2102 (beamforming IC) disposed (formed) on a first side of the circuit board; para [0136]); and a patch antenna radiating element formed at an opposite side of the PCB structure from the beamforming IC (the antenna 1900 includes three patches 1904, 1906, 1908 (radiating element) disposed over a ground layer 191 0 of the circuit board; each die is coupled to an antenna on the opposite side of the circuit board; fig 19B; paras [0091 ], [0099]), wherein one of the dielectric layers is formed over the radiating element so that the radiating element is buried (in fig 10B, the dielectric layer 1018 is placed above the ground layer 1002, and in fig 10B, the ground layer 1910 is underneath the patches 1904, 1906, 1908; the combination of figs 10B and 19B show the dielectric layer formed over the ground layer formed over the patches, and therefore, the patches are buried; paras [0070], [0091]) and another one of the dielectric layers is formed over the one dielectric layer formed over radiating element (a second dielectric layer 312 is formed over the first dielectric layer 310, shown in fig 3A, which is formed over the ground layer formed over the patches; figs 3A, 10B, 19B; para [0053]), said another one of the dielectric layers being etched to form an aperture in front of the patch antenna radiating element (the second dielectric layer 312 is includes an aperture 316 formed over the first dielectric layer 310 formed over the ground layer formed over the patches; figs 3A, 3B; para [0054]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to modify Thai with a beamforming integrated circuit (IC) formed on one side of the PCB structure, a patch antenna radiating element formed at an opposite side of the PCB structure from the beamforming IC, wherein one of the dielectric layers is formed over the radiating element so that the radiating element is buried and another one of the dielectric layers is formed over the one dielectric layer formed over radiating element; said another one of the dielectric layers being etched to form an aperture in front of the patch antenna radiating element for purpose of improves frequency diversity for improved reliability, reduces the antenna count per platform, minimizes the RF package size, and allows more space for the antenna array to provide more effective beam scanning coverage as disclosed by Thai (Paragraph [0041]).
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Lim et al [US 2021/0044021 A1]
Jong et al [US 2020/0358173 A1]
Yamamoto et al [US 2020/0243947 A1]
Jeon et al [US 2019/0081404 A1]
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 5-8 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Thai et al [US 2021/0075122 A1].
In regards to claims 1. Thai discloses an antenna (Abstract) comprising:
a printed circuit board (PCB) structure including a plurality of dielectric layers and conductive layers (the PCB includes stacked layers comprising dielectric layers 310,312 and metal layers 314, 326; figs 3A, 3B, 3C; paras [0052]-[0055]);
Thai does not specify in Fig. 3a-c a beamforming integrated circuit (IC) formed on one side of the PCB structure; a patch antenna radiating element formed at an opposite side of the PCB structure from the beamforming IC; wherein one of the dielectric layers is formed over the radiating element so that the radiating element is buried.
Thai discloses a beamforming integrated circuit (IC) formed on one side of the PCB structure (radio frequency integrated circuit, "RFIC", die 2102 (beamforming IC) disposed (formed) on a first side of the circuit board; para [0136]); and a patch antenna radiating element formed at an opposite side of the PCB structure from the beamforming IC (the antenna 1900 includes three patches 1904, 1906, 1908 (radiating element) disposed over a ground layer 1910 of the circuit board; each die is coupled to an antenna on the opposite side of the circuit board; fig 19B; paras [0091], (0099]), wherein one of the dielectric layers is formed over the radiating element so that the radiating element is buried (in fig 10B, the dielectric layer 1018 is placed above the ground layer 1002, and in fig 10B, the ground layer 191 0 is underneath the patches 1904, 1906, 1908; the combination of figs 10B and 19B show the dielectric layer formed over the ground layer formed over the patches, and therefore, the patches are buried; paras [0070], (0091]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to modify Thai with a beamforming integrated circuit (IC) formed on one side of the PCB structure; a patch antenna radiating element formed at an opposite side of the PCB structure from the beamforming IC; wherein one of the dielectric layers is formed over the radiating element so that the radiating element is buried for purpose of improves frequency diversity for improved reliability, reduces the antenna count per platform, minimizes the RF package size, and allows more space for the antenna array to provide more effective beam scanning coverage as disclosed by Thai (Paragraph [0041]).
In regards to claims 3. Thai discloses the antenna according to claim 1 wherein another one of the dielectric layers is formed over the one dielectric layer formed over radiating element (a second dielectric layer 312 is formed over the first dielectric layer 310, shown in fig 3A, which is formed over the ground layer formed over the patches; figs 3A, 1 OB, 19B; para [0053]), said another one of the dielectric layers being etched to form an aperture in front of the patch antenna radiating element (the second dielectric layer 312is includes an aperture 316 formed over the first dielectric layer 310 formed over the ground layer formed over the patches; figs 3A, 3B; para [0054]).
In regards to claims 5. Thai discloses the antenna according to claim 3 wherein one of the conductive layers is formed over the another one of the dielectric layers opposite to the one dielectric layer (a conductive ground plane 314 is formed over the second dielectric layer 312, which must be opposite the first dielectric layer; combination of figs 3A, 3B; para [0054]).
In regards to claims 6. Thai discloses the antenna according to claim 1 wherein the antenna is a phased array antenna (the antenna is an antenna array providing beam scanning coverage (phased); paras [0041], [0081]).
In regards to claims 7. Thai discloses the antenna according to claim 6 wherein the antenna is part of a 5G radio (the antenna is a 5G mmWave antenna; para [0095]).
In regards to claims 8. Thai discloses a phased array antenna (the antenna is an antenna array providing beam scanning coverage (phased); paras (0041], (0081]) comprising:
a printed circuit board (PCB) structure including a plurality of dielectric layers and conductive layers (the PCB includes stacked layers comprising dielectric layers 310,312 and metal layers 314,326; figs 3A, 3B, 3C; paras [0052]-[0055]);
Thai does not specify in Fig. 3a-c, a beamforming integrated circuit (IC) formed on one side of the PCB structure, a patch antenna radiating element formed at an opposite side of the PCB structure from the beamforming IC, wherein one of the dielectric layers is formed over the radiating element so that the radiating element is buried and another one of the dielectric layers is formed over the one dielectric layer formed over radiating element; said another one of the dielectric layers being etched to form an aperture in front of the patch antenna radiating element.
Thai discloses a beamforming integrated circuit (IC) formed on one side of the PCB structure (radio frequency integrated circuit, "RFIC", die 2102 (beamforming IC) disposed (formed) on a first side of the circuit board; para [0136]); and a patch antenna radiating element formed at an opposite side of the PCB structure from the beamforming IC (the antenna 1900 includes three patches 1904, 1906, 1908 (radiating element) disposed over a ground layer 191 0 of the circuit board; each die is coupled to an antenna on the opposite side of the circuit board; fig 19B; paras [0091 ], [0099]), wherein one of the dielectric layers is formed over the radiating element so that the radiating element is buried (in fig 10B, the dielectric layer 1018 is placed above the ground layer 1002, and in fig 10B, the ground layer 1910 is underneath the patches 1904, 1906, 1908; the combination of figs 1 OB and 19B show the dielectric layer formed over the ground layer formed over the patches, and therefore, the patches are buried; paras [0070], [0091]) and another one of the dielectric layers is formed over the one dielectric layer formed over radiating element (a second dielectric layer 312 is formed over the first dielectric layer 310, shown in fig 3A, which is formed over the ground layer formed over the patches; figs 3A, 1 OB, 19B; para [0053]), said another one of the dielectric layers being etched to form an aperture in front of the patch antenna radiating element (the second dielectric layer 312 is includes an aperture 316 formed over the first dielectric layer 310 formed over the ground layer formed over the patches; figs 3A, 3B; para [0054]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to modify Thai with a beamforming integrated circuit (IC) formed on one side of the PCB structure, a patch antenna radiating element formed at an opposite side of the PCB structure from the beamforming IC, wherein one of the dielectric layers is formed over the radiating element so that the radiating element is buried and another one of the dielectric layers is formed over the one dielectric layer formed over radiating element; said another one of the dielectric layers being etched to form an aperture in front of the patch antenna radiating element for purpose of improves frequency diversity for improved reliability, reduces the antenna count per platform, minimizes the RF package size, and allows more space for the antenna array to provide more effective beam scanning coverage as disclosed by Thai (Paragraph [0041]).
In regards to claims 11. Thai discloses the antenna according to claim 8 wherein the antenna is part of a 5G radio (the antenna is a 5G mmWave antenna; para [0095]).
Claims 2, 4 and 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Thai et al [US 2021/0075122 A1] in view of Quarfoth [US 2019/0245263 A1].
In regards to claims 2. Thai discloses the antenna according to claim 1 further comprising vias formed in the one dielectric layer around the patch antenna radiating element (vias 328 shown in fig 3C connecting to the ground layer 326, therefore must be formed in the first dielectric layer 310, and also shown around the parasitic directors 320, the parasitic directors being parasitic patches; figs 3A, 3C; paras [0054], [0091]).
Thai does not fencing vias
Quarfoth discloses fencing vias (via fence disposed between sections; para [0081]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to modify Thai with fencing vias for purpose of the benefit of guarding edges of the printed circuit boards as shown in Quarfoth (Paragraph [0081])
In regards to claims 4. Thai discloses the antenna according to claim 3 further comprising vias formed through the one dielectric layer and the another one of dielectric layers around the patch antenna radiating element (vias 328 shown in fig 3C connecting to the ground layer 326, therefore must be formed in the first dielectric layer 310 and second dielectric layer 312, and also shown around the parasitic directors 320, the parasitic directors being parasitic patches; figs 3A, 3C; paras [0054], [0091]).
Thai does not fencing vias
Quarfoth discloses fencing vias (via fence disposed between sections; para [0081]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to modify Thai with fencing vias for purpose of the benefit of guarding edges of the printed circuit boards as shown in Quarfoth (Paragraph [0081])
In regards to claims 9. Thai discloses the antenna according to claim 8 further comprising fencing vias formed through the one dielectric layer and the another one of dielectric layers around the patch antenna radiating element (vias 328 shown in fig 3C connecting to the ground layer 326, therefore must be formed in the first dielectric layer 310 and second dielectric layer 312, and also shown around the parasitic directors 320, the parasitic directors being parasitic patches; figs 3A, 3C; paras [0054], [0091]).
Thai does not fencing vias
Quarfoth discloses fencing vias (via fence disposed between sections; para [0081]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to modify Thai with fencing vias for purpose of the benefit of guarding edges of the printed circuit boards as shown in Quarfoth (Paragraph [0081])
In regards to claims 10. Thai discloses the antenna according to claim 9 wherein one of the conductive layers is formed over the another one of the dielectric layers opposite to the one dielectric layer (a conductive ground plane 314 is formed over the second dielectric layer 312, which must be opposite the first dielectric layer; combination of figs 3A, 3B; para [0054]).
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WEI (VICTOR) CHAN whose telephone number is (571)272-5177. The examiner can normally be reached M-F 9:00am to 6:00pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Regis Betsch can be reached at 571-270-7101. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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WEI (VICTOR) CHAN
Primary Examiner
Art Unit 2844
/WEI (VICTOR) Y CHAN/Primary Examiner, Art Unit 2844
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