Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-14, 19, 29 and 31-40 are rejected under 35 U.S.C. 103 as being unpatentable over Zacharias et al. (US 2020/0359330) in view of Zhang et al. (US 2023/0413190). For dependent claims herein, the motivation to combine is the same as the parent claim unless otherwise noted.
Regarding claim 1, Zacharias discloses an apparatus for wireless communication at a user equipment (UE) (fig. 1, item 115; fig. 11; para. 208), comprising: a memory; and at least one processor coupled to the memory, wherein the at least one processor is configured to: detect a maximum permissible exposure (MPE) event for at least one component carrier (CC) (fig. 7, step 725; para. 158; note: an event is determining a receive uplink grant for an FR CC or CCs is limited by an MPE)
Zacharias discloses a MAC-CE for transmitting control information (para. 149, last sentence) but fails to disclose the processor configured to configure a medium access control (MAC) control element (MAC-CE) based on the MPE event, the CE including a plurality of octets and at least one information element (IE), such that each of the at least one IE includes at least one of the plurality of octets; and transmit, to a base station, the MAC-CE including the plurality of octets and the at least one IE. However, Zhang discloses MPE information sent in a MAC-CE (which includes IEs and octets (figs. 5A-5B and 8-11C; paras. 41, 49-50, 55 and 60-61). Therefore, it would have been obvious to one skilled in the art before the effective filing date of the claimed invention to configure a medium access control (MAC) control element (MAC-CE) based on the MPE event, the CE including a plurality of octets and at least one information element (IE), such that each of the at least one IE includes at least one of the plurality of octets; and transmit, to a base station, the MAC-CE including the plurality of octets and the at least one IE in the invention of Zacharias. The motivation to have the modification and/or well-known benefits of the modification include, but are not limited to, providing signaling information in a format as is known in the art (Zhang, figs. 5A-5B and 10A-11C, and paras. 41, 49-50, 55 and 60-61 ; MPEP 2143(I)(A)(B)(C)(D) - note: e.g., applying known techniques having predictable results).
Regarding claim 2, Zacharias in view of Zhang teaches and makes obvious the apparatus of claim 1, wherein the at least one processor is further configured to: reduce an output power of the UE based on the detected MPE event for the at least one CC or the at least one panel of the at least one CC (Zacharias, steps 720, 725 and 735-740; paras. 157-159; note: reduced power relative to a grant; note: reduction of power on FR2 CCs by steering data to FR1 CCs).
Regarding claim 3, Zacharias in view of Zhang teaches and makes obvious the apparatus of claim 2, wherein the at least one processor is further configured to: transmit, to the base station, an indication of the reduced output power of the UE based on the detected MPE event (Zacharias, steps 720, 725 and 735-740; paras. 157-159; note: reduced power relative to a grant; note: reduction of power on FR2 CCs by steering data to FR1 CCs; note: an event is determining a receive uplink grant for an FR CC or CCs is limited by an MPE).
Regarding claim 4, Zacharias in view of Zhang teaches and makes obvious the apparatus of claim 1, wherein the MAC-CE includes one or more of at least one resource index or at least one field (Zhang, figs. 5A-5B and 8-11C; paras. 40-41 and 60-69; note: CC as a resource and various bit fields).
Regarding claims 5-7, these limitations are rejected for failing to further define the rejected alternative of “one field” in claim 4.
Regarding claim 8, Zacharias in view of Zhang teaches and makes obvious the apparatus of claim 4, wherein the at least one IE includes a first IE and a second IE (Zhang, figs. 5A-5B and 8-11C; paras. 40-41 and 60-69; note: various bit fields as information elements).
Regarding claim 9, Zacharias in view of Zhang teaches and makes obvious the apparatus of claim 8, wherein the first IE includes the at least one field including one or more of: a power headroom (PH) value (paras. 41 and 54), a power backoff (P) value (para. 41; note: maximum power reduction, MPR; para. 49), a real transmission or a reference format (V) value (paras. 41 and 55), a power management maximum output power reduction (P-MPR) value (para. 41), or a nominal UE transmit power level (Pcmax) value (paras. 41 and 49).
Regarding claim 10, Zacharias in view of Zhang teaches and makes obvious the apparatus of claim 8, wherein the second IE includes the at least one resource index (figs. 5A-5B and 8-11C; note: component carrier bits) and one or more power management maximum output power reduction (P-MPR) values (para. 41).
Regarding claim 11, Zacharias in view of Zhang teaches and makes obvious the apparatus of claim 1, wherein the at least one processor is further configured to: identify whether the at least one IE includes a second IE (Zhang, figs. 5A-5B and 8-11C; note: an IE as two octets of bits includes the P and MPE bit fields (IEs); para. 41; note: P value indicates whether MPE is reported), wherein the at least one IE includes a first IE (Zhang, figs. 5A-5B and 8-11C; note: first IE as the P bit field (IE)) (alternatively, Ci indicating whether the ith CC is reporting PH, where the IE includes the octets of Ci and its respective PH)).
Regarding claim 12, Zacharias in view of Zhang teaches and makes obvious the apparatus of claim 11, wherein the at least one IE includes the second IE if the first IE indicates the second IE (Zhang, figs. 5A-5B and 8-11C; note: an IE as two octets of bits includes the P and MPE bit fields (IEs); para. 41; note: P value indicates whether MPE is reported).
Regarding claim 13, Zacharias in view of Zhang teaches and makes obvious the apparatus of claim 11, wherein the at least one IE includes the second IE if at least one octet of the plurality of octets indicates the second IE (Zhang, figs. 5A-5B and 8-11C; note: an IE as two octets of bits includes the P and MPE bit fields (IEs); para. 41; note: P value indicates whether MPE is reported).
Regarding claim 14, Zacharias in view of Zhang teaches and makes obvious the apparatus of claim 11, wherein the at least one IE includes the second IE, wherein the second IE includes at least one power management maximum output power reduction (P-MPR) value and at least one resource index (Zhang, figs. 5A-5B and 8-11C; paras. 41 and 49; note: CC bits as a resource index; MPE bit as the MPR value).
Regarding claim 19, Zacharias in view of Zhang teaches and makes obvious the apparatus of claim 1, further comprising a transceiver or an antenna coupled to the at least one processor (Zacharias, fig. 11), wherein the MAC-CE is a power headroom report (PHR) MAC-CE including at least one power management maximum output power reduction (P-MPR) value (Zhang, figs. 5A-5B and 8-11C; paras. 41 and 49).
Regarding claim 29, these limitations are rejected on the same ground as claim 1.
Regarding claims 31-40, these limitations are rejected on the same ground as claims 1-10, respectively. In addition, Zacharias discloses a non-transitory computer-readable medium having code stored thereon that (items 1130-1135; paras. 216 and 286-287), when executed by an apparatus, causes the apparatus to perform the functions of claims 1-10.
Allowable Subject Matter
Claims 15-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/Kevin C. Harper/
Primary Examiner, Art Unit 2462
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