Prosecution Insights
Last updated: August 17, 2026
Application No. 18/696,218

MEMORY PERFORMANCE EVALUATION USING ADDRESS MAPPING INFORMATION

Non-Final OA §102§103§112
Filed
Mar 27, 2024
Priority
Jul 25, 2022 — nonprovisional of PCTCN2022107557
Examiner
KUAN, JOHN CHUNYANG
Art Unit
Tech Center
Assignee
Micron Technology Inc.
OA Round
1 (Non-Final)
72%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allowance Rate
402 granted / 555 resolved
+12.4% vs TC avg
Strong +47% interview lift
Without
With
+46.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
39 currently pending
Career history
586
Total Applications
across all art units

Statute-Specific Performance

§101
28.4%
-11.6% vs TC avg
§103
32.3%
-7.7% vs TC avg
§102
9.1%
-30.9% vs TC avg
§112
25.0%
-15.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 555 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 3 and 17 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 3, it recites “the performance metric” in line 3. There are two antecedent bases for this limitation (in claims 1 and 2 respectively). It is unclear which is referred to. For examination purpose, “a performance metric” in line 4 of claim 2 is assumed to be --the performance metric-- to avoid creating another antecedent basis. Regarding claim 17, it recites “the performance metric” in line 3. There are two antecedent bases for this limitation (in claims 15 and 16 respectively). It is unclear which is referred to. For examination purpose, “a performance metric” in line 3 of claim 16 is assumed to be --the performance metric-- to avoid creating another antecedent basis. Claim Rejections - 35 USC § 102/103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 4, 9, 12-15, 18, 23, and 25 are rejected under 35 U.S.C. 102(a)(2) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Zilberstein et al. (US 20230195353 A1; hereinafter “Zilberstein”). Regarding claim 1, Zilberstein teaches an apparatus (i.e., “a non-volatile storage system 100”; see [0014]), comprising: a set of memory dies (i.e., “one or more non-volatile memory die 104”; see [0014]); and a controller (i.e., “controller 102”; see [0014]) coupled with the set of memory dies (see FIG. 1) and configured to cause the apparatus to: write a data file (this is implied or obvious because fragmentation is measured for the data file written/stored in the memory; see [0035]) associated with a range of logical block addresses to a first set of blocks in the set of memory dies (i.e., “for each of a plurality of logical block address ranges of the memory”; see [0012]; “a file or a portion of a file that resides sequentially on the host LBA range may be fragmented on the physical NAND level”; see [0031]; “per LBA range (which may or may not correspond to a file)”; see [0035]); determine, for a memory die of the set of memory dies that stores a portion of the data file (i.e., “one or more non-volatile memory die 104”; see [0014]), a quantity of read operations for reading the portion of the data file based at least in part on address mapping information that maps logical block addresses associated with the data file to physical addresses (i.e., “scan the logical-to-physical mapping tables of an LBA mapping. Based on this scanning, the controller 102 can determine the number of NAND senses that are required in order to read the LBA range”; see [0039]); and determine a performance metric (i.e., “physical fragmentation level”) associated with the data file and the first set of blocks based at least in part on the quantity of read operations (i.e., “the controller 102 can determine the number of NAND senses that are required in order to read the LBA range. That would be defined as the “actualNANDSenses”. In addition, the controller 102 can calculate the “bestNANDSenses” as the number of NAND senses that would have been required in order to read the LBA range if there was no physical fragmentation at all. Then, based on the “bestNANDSenses” and the “actualNANDSenses,” the controller 102 can quantify the physical fragmentation level using the below formula”; see [0039]). Regarding claim 4, Zilberstein further teaches: wherein the controller is further configured to cause the apparatus to: determine, based at least in part on performance mapping information (i.e., “use a formula based on the correlation between the NAND sense increase ratio and the expected performance drop”), that the performance metric corresponds to the quantity of read operations, wherein the performance metric is determined based at least in part on the performance metric corresponding to the quantity of read operations (i.e., “Then, based on the “bestNANDSenses” and the “actualNANDSenses,” the controller 102 can quantify the physical fragmentation level using the below formula”; see [0039]). Regarding claim 9, Zilberstein further teaches: wherein the controller is further configured to cause the apparatus to: determine a threshold quantity of access operations (i.e., “bestNANDSenses”) associated with the data file, wherein the performance metric is determined based at least in part on the threshold quantity of access operations (i.e., “Then, based on the “bestNANDSenses” and the “actualNANDSenses,” the controller 102 can quantify the physical fragmentation level using the below formula”; see [0039]). Regarding claim 12, Zilberstein further teaches: wherein the controller is further configured to cause the apparatus to: read an address mapping table from memory after writing the data file to the set of memory dies, wherein the address mapping information is included in the address mapping table (i.e., “The FTL may include a logical-to-physical address (L2P) map (sometimes referred to herein as a table or data structure) and allotted cache memory. In this way, the FTL translates logical block addresses (“LBAs”) from the host to physical addresses in the memory 104”; see [0029]). Regarding claim 13, Zilberstein further teaches: wherein the performance metric indicates an increase in latency for reading the data file relative to a threshold latency (i.e., “bestNANDSenses”; see [0039]) for reading the data file (i.e., “Then, based on the “bestNANDSenses” and the “actualNANDSenses,” the controller 102 can quantify the physical fragmentation level using the below formula: f r a g L e v e l % = 100 - B e s t N A N D S e n s e s * 100 a c t u a l N A N D S e n s e s ”; see [0039]; note that the fragment level indicates a performance drop related to the number of memory senses; see [0012]; therefore the fragment level inherently, or obviously, indicates an increase in latency due to increased number of times to read the fragmented data file, relative to the latency related to bestNANDSenses). Regarding claim 14, Zilberstein further teaches: wherein the performance metric indicates a latency for reading the data file written to the first set of blocks (note that the fragment level indicates a performance drop related to the number of memory senses; see [0012]; therefore the fragment level inherently, or obviously, indicates a latency due to the number of times required to read the fragmented data file). Regarding claim 15, the claim recites the same substantive limitations as claim 1 and is rejected by applying the same teachings. Regarding claim 18, the claim recites the same substantive further limitations as claim 4 and is rejected by applying the same teachings. Regarding claim 23, the claim recites the same substantive further limitations as claim 9 and is rejected by applying the same teachings. Regarding claim 25, the claim recites the same substantive limitations as claim 1 and is rejected by applying the same teachings. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2, 3, 16, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Zilberstein in view of JUNG et al. (US 20110099326 A1; hereinafter “JUNG”). Regarding claim 2, Zilberstein further teaches: wherein the controller is further configured to cause the apparatus to: defragging in the set of memory dies based at least in part on a performance metric (i.e., “calculate an overall defragmentation measure per LBA range (which may or may not correspond to a file) to allow prioritization between the LBA ranges for a defragmentation operation”; see [0035]). Zilberstein does not explicitly disclose (see only the underlined): wherein the controller is further configured to cause the apparatus to: write the data file to a second set of blocks in the set of memory dies based at least in part on a performance metric. But JUNG teaches: defragging by writing the data file to a second set of blocks in a memory (i.e., “writing the N fragments to fill the N free pages to thereby convert the one fragmented block to a new non-fragmented block”; see [0013]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Zilberstein in view of JUNG, such that the controller is further configured to cause the apparatus to: write the data file to a second set of blocks in the set of memory dies based at least in part on a performance metric, as claimed. The rationale would be to help defragging the data file. Regarding claim 3, as a result of modification applied to claim 2 above, Zilberstein in view of JUNG further teaches: wherein the controller is further configured to cause the apparatus to: determine that the performance metric satisfies a threshold, wherein the data file is written to the second set of blocks based at least in part on the performance metric satisfying the threshold (i.e., “to flag when an expected performance level drop is below a certain preconfigured threshold, which can indicate that a defragmentation/recovery action should be performed”; see Zilberstein, [0040]). Regarding claim 16, the claim recites the same substantive further limitations as claim 2 and is rejected by applying the same teachings. Regarding claim 17, the claim recites the same substantive further limitations as claim 3 and is rejected by applying the same teachings. Allowable Subject Matter Claims 5-8, 10, 11, 19-22, and 24 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: the further limitations in claims 5-8, 10, 11, 19-22, and 24 are related to details of determining the performance metric. Zilberstein does not teach or suggest these detailed as claimed. None of the prior art of record, singly or in combination, teaches or suggest the further limitations in combination with the rest of the claim limitations as claimed and defined by the Applicant. Prior Art The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Muthiah (US 12363312 B2) teaches a method of storage management, involving information regarding a specific operation for a current command and a current operational state of a storage system to determine a latency estimate. Zilberstein et al. (US 20220283934 A1) teaches a method of automatically defragmentation of memory, involving counting the number of data senses being performed during a host read; and, for each page size, checking if the data sense count exceeds a certain threshold. Veeraswamy et al. (US 10776317 B1) teaches a method of detecting fragmentation in Unix file system, involving considering various factors including (1) layout of various stacked objects, (2) number of backend I/O operations for a front I/O and spread across spindles, (3) metadata cache efficiency, (4) data cache efficiency, and (5) performance of the media type. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN C KUAN whose telephone number is (571)270-7066. The examiner can normally be reached M-F: 9:00AM-5:30PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew Schechter can be reached at (571) 272-2302. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOHN C KUAN/Primary Examiner, Art Unit 2857
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Prosecution Timeline

Mar 27, 2024
Application Filed
Jul 29, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
72%
Grant Probability
99%
With Interview (+46.9%)
3y 0m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 555 resolved cases by this examiner. Grant probability derived from career allowance rate.

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