Prosecution Insights
Last updated: October 02, 2026
Application No. 18/698,371

POWER AMPLIFIER

Non-Final OA §103
Filed
Apr 04, 2024
Priority
Jan 25, 2022 — nonprovisional of PCTJP2022002698
Examiner
NGUYEN, HIEU P
Art Unit
Tech Center
Assignee
Mitsubishi Electric Corporation
OA Round
1 (Non-Final)
92%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allowance Rate
1145 granted / 1243 resolved
+32.1% vs TC avg
Moderate +5% lift
Without
With
+5.1%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 10m
Avg Prosecution
19 currently pending
Career history
1258
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
55.7%
+15.7% vs TC avg
§102
28.5%
-11.5% vs TC avg
§112
5.2%
-34.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1243 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement filed on 04/04/2024 & 12/23/2024 has been considered and placed in the application file. Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 1-2, 4 and 6-8 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (U.S. 2007/0120606). Regarding claim 1, Lee et al. (hereinafter, Ref~606) discloses (please see Fig. 4 and related text for details) a power amplifier (PA of Fig. 4) comprising: a transistor (FET of Fig. 4); a main line (see the line connecting the drain of FET to the 50 ohms load as seen from Fig. 4) connected to a drain of the transistor; a branch line (see the line connecting the drain of FET to the power supply VDD as seen from Fig. 4) which branches from the main line and is connected to a drain pad (not expressly shown, but said pad would be needed to at least provide electrical connection and/or heat transfer for said FET); and a drain bias circuit (201 and/or 202 and/or RF choke inductor and/or 211 of Fig. 4 can be read as the claimed circuit OR at least they are functionally equivalent to it, since they configured to provide a drain biasing voltage for said FET) which is provided on the branch line, wherein the drain bias circuit has a first shunt capacitor (e.g., one of the capacitors 211 of Fig. 4) which is connected to the branch line and a second shunt capacitor (the other capacitor 211 of fig. 4) which is connected to the branch line between the first shunt capacitor and the drain pad, the first shunt capacitor is capacitive at an operating frequency of the transistor, the second shunt capacitor is inductive at the operating frequency (due to parasitic inductance from said capacitors as described throughout the disclosure), and the first shunt capacitor and the second shunt capacitor resonate (with nearby element(s) including matching circuit/elements as described throughout the disclosure) at the operating frequency, meeting claim 1. Regarding claim 2, Ref~606 discloses the amplifier according to claim 1, wherein each of the first shunt capacitor and the second shunt capacitor has a lower base electrode which is connected to grounding wiring and an upper base electrode which is provided above the lower base electrode as seen from Fig. 4, meeting claim 2. Regarding claim 4, Ref~606 does not expressly suggest “wherein the upper base electrode of the second shunt capacitor has a rectangular shape in a planar view”. However, these are normal design parameters in the field depending on custom specifications, meeting claim 4 Regarding claim 6, Ref~606 does not expressly suggest “wherein the first shunt capacitor or the second shunt capacitor is provided on a via hole as the grounding wiring”. However, these are normal design parameters in the field depending on custom specifications, meeting claim 6 Regarding claim 7, Ref~606 does not expressly suggest “wherein a capacitance of the first shunt capacitor is 0.3 to 0.7 pF”. However, these are normal design parameters in the field depending on custom specifications, meeting claim 7. Regarding claim 8, Ref~606 does not expressly suggest “wherein the operating frequency corresponds to a Ka band”. However, these are normal design parameters in the field depending on custom specifications, meeting claim 4 . Allowable Subject Matter Claims 3, 5 and 9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to HIEU P NGUYEN whose telephone number is 571-272-8577. The examiner can normally be reached on Monday-Friday 8:30AM-6:00PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, YOUNGHUIE HAN (Jessica) can be reached on 571-272-2078. The fax phone number for the organization where this application or proceeding is assigned is 703-872-9306. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). /HIEU P NGUYEN/Primary Examiner, Art Unit 2843
Read full office action

Prosecution Timeline

Apr 04, 2024
Application Filed
Aug 25, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
92%
Grant Probability
97%
With Interview (+5.1%)
1y 10m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1243 resolved cases by this examiner. Grant probability derived from career allowance rate.

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